On Thu, Jan 16, 2014 at 08:55:53AM +0000, WANG Cheng D wrote:
Dear Daniel,
The thirty-party PCIe card is based on the Xilinx’ FPGA which is off the shelf, the main
features are as follows:
1) x8 Gen3, 8Gb/s per lane/direction
2) MSI and legacy interrupt support
3) Scatter-gather packet DMA engine provide by Northwest Logic
We hope multiple Linux Containers to access the PCIe card in time division mode, for
example, during slot 1, lxc1 read/write the PCIe card; during slot 2, lxc2 read/write the
PCIe card.
Taking reading operation (data flows from PCIe card to host memory) as example, in native
mode, the PCIe driver should tell PCIe card the host memory address where to store the
incoming data from PCIe card. With this address, the PCIe card will transmit the data to
host memory itself.
In container case, the problem is how application running in the container knows the
expected host memory address.
I wonder if we can have a process running in the which solely operates the PCIe card, all
the containers will send/receive data to this process via socket.
Ok, so from the LXC driver POV I guess this card is accessed
via some special device node with ioctls or something ? If so
then you can just expose the device node to as many containers
as you like at the same time without restrictions.
http://libvirt.org/formatdomain.html#elementsHostDevCaps
Daniel
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