- Devel - libvirt List Archives

[libvirt PATCH] qemu: reject readonly attribute for virtiofs
by Ján Tomko 15 May '20

15 May '20

This is not yet supported by virtiofsd. Fixes #23 Signed-off-by: Ján Tomko <jtomko(a)redhat.com> --- src/qemu/qemu_validate.c | 5 +++ .../vhost-user-fs-readonly.xml | 44 +++++++++++++++++++ tests/qemuxml2argvtest.c | 1 + 3 files changed, 50 insertions(+) create mode 100644 tests/qemuxml2argvdata/vhost-user-fs-readonly.xml diff --git a/src/qemu/qemu_validate.c b/src/qemu/qemu_validate.c index fde1892d42..ac22270104 100644 --- a/src/qemu/qemu_validate.c +++ b/src/qemu/qemu_validate.c @@ -3418,6 +3418,11 @@ qemuValidateDomainDeviceDefFS(virDomainFSDefPtr fs, return -1; case VIR_DOMAIN_FS_DRIVER_TYPE_VIRTIOFS: + if (fs->readonly) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s", + _("virtiofs does not yet supported read-only mode")); + return -1; + } if (!driver->privileged) { virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s", _("virtiofs is not yet supported in session mode")); diff --git a/tests/qemuxml2argvdata/vhost-user-fs-readonly.xml b/tests/qemuxml2argvdata/vhost-user-fs-readonly.xml new file mode 100644 index 0000000000..003ed41eb3 --- /dev/null +++ b/tests/qemuxml2argvdata/vhost-user-fs-readonly.xml @@ -0,0 +1,44 @@ +<domain type='kvm'> + <name>guest</name> + <uuid>126f2720-6f8e-45ab-a886-ec9277079a67</uuid> + <memory unit='KiB'>14680064</memory> + <currentMemory unit='KiB'>14680064</currentMemory> + <memoryBacking> + <source type='file'/> + <access mode='shared'/> + </memoryBacking> + <vcpu placement='static'>2</vcpu> + <os> + <type arch='x86_64' machine='pc'>hvm</type> + <boot dev='hd'/> + </os> + <cpu mode='custom' match='exact' check='none'> + <model fallback='forbid'>qemu64</model> + <numa> + <cell id='0' cpus='0-1' memory='14680064' unit='KiB' memAccess='shared'/> + </numa> + </cpu> + <clock offset='utc'/> + <on_poweroff>destroy</on_poweroff> + <on_reboot>restart</on_reboot> + <on_crash>destroy</on_crash> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <controller type='usb' index='0' model='none'/> + <controller type='pci' index='0' model='pci-root'/> + <filesystem type='mount' accessmode='passthrough'> + <driver type='virtiofs' queue='1024'/> + <binary path='/usr/libexec/virtiofsd' xattr='on'> + <cache mode='always'/> + <lock posix='off' flock='off'/> + </binary> + <source dir='/path'/> + <target dir='mount_tag'/> + <readonly/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x0'/> + </filesystem> + <input type='mouse' bus='ps2'/> + <input type='keyboard' bus='ps2'/> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxml2argvtest.c b/tests/qemuxml2argvtest.c index 4ab664a846..8cbf3f8daf 100644 --- a/tests/qemuxml2argvtest.c +++ b/tests/qemuxml2argvtest.c @@ -3171,6 +3171,7 @@ mymain(void) DO_TEST_CAPS_LATEST("vhost-user-fs-fd-memory"); DO_TEST_CAPS_LATEST("vhost-user-fs-hugepages"); + DO_TEsT_CAPS_LATEST_PARSE_ERROR("vhost-user-fs-readonly"); DO_TEST("riscv64-virt", QEMU_CAPS_DEVICE_VIRTIO_MMIO); -- 2.25.4

6 17

[PATCH V5 0/4] Introduce getHost support for ARM CPU driver
by Zhenyu Zheng 15 May '20

15 May '20

Introduce getHost support for ARM CPU driver. First add some data about commonly used ARM CPU models, and their vendors into cpu_map, then added some helper methods as callbacks to load them. Read and parse vendor_id, part_id and CPU flags of local CPU from corresponding registers. Signed-off-by: Zhenyu Zheng <zheng.zhenyu(a)outlook.com> Zhenyu Zheng (4): cpu: Introduce virCPUarmData and related struts cpu: Add helper functions to parse vendor and model cpu: Introduce getHost support for ARM CPU driver cpu_map: Introduce ARM cpu models src/cpu/Makefile.inc.am | 1 + src/cpu/cpu.h | 2 + src/cpu/cpu_arm.c | 399 +++++++++++++++++++++++++++++- src/cpu/cpu_arm_data.h | 32 +++ src/cpu_map/Makefile.inc.am | 7 + src/cpu_map/arm_Falkor.xml | 6 + src/cpu_map/arm_Kunpeng-920.xml | 6 + src/cpu_map/arm_ThunderX299xx.xml | 6 + src/cpu_map/arm_cortex-a53.xml | 6 + src/cpu_map/arm_cortex-a57.xml | 6 + src/cpu_map/arm_cortex-a72.xml | 6 + src/cpu_map/arm_vendors.xml | 14 ++ src/cpu_map/index.xml | 15 ++ 13 files changed, 505 insertions(+), 1 deletion(-) create mode 100644 src/cpu/cpu_arm_data.h create mode 100644 src/cpu_map/arm_Falkor.xml create mode 100644 src/cpu_map/arm_Kunpeng-920.xml create mode 100644 src/cpu_map/arm_ThunderX299xx.xml create mode 100644 src/cpu_map/arm_cortex-a53.xml create mode 100644 src/cpu_map/arm_cortex-a57.xml create mode 100644 src/cpu_map/arm_cortex-a72.xml create mode 100644 src/cpu_map/arm_vendors.xml -- 2.20.1

2 1

[PATCH V5 4/4] cpu_map: Introduce ARM cpu models
by Zhenyu Zheng 15 May '20

15 May '20

Introduce vendors and some commonly used models for ARM arch, these will be used for virConnectionGetCapabilities for ARM CPUs. Signed-off-by: Zhenyu Zheng <zheng.zhenyu(a)outlook.com> --- src/cpu_map/Makefile.inc.am | 7 +++++++ src/cpu_map/arm_Falkor.xml | 6 ++++++ src/cpu_map/arm_Kunpeng-920.xml | 6 ++++++ src/cpu_map/arm_ThunderX299xx.xml | 6 ++++++ src/cpu_map/arm_cortex-a53.xml | 6 ++++++ src/cpu_map/arm_cortex-a57.xml | 6 ++++++ src/cpu_map/arm_cortex-a72.xml | 6 ++++++ src/cpu_map/arm_vendors.xml | 14 ++++++++++++++ src/cpu_map/index.xml | 15 +++++++++++++++ 9 files changed, 72 insertions(+) create mode 100644 src/cpu_map/arm_Falkor.xml create mode 100644 src/cpu_map/arm_Kunpeng-920.xml create mode 100644 src/cpu_map/arm_ThunderX299xx.xml create mode 100644 src/cpu_map/arm_cortex-a53.xml create mode 100644 src/cpu_map/arm_cortex-a57.xml create mode 100644 src/cpu_map/arm_cortex-a72.xml create mode 100644 src/cpu_map/arm_vendors.xml diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am index be64c9a0d4..5d9190e27d 100644 --- a/src/cpu_map/Makefile.inc.am +++ b/src/cpu_map/Makefile.inc.am @@ -2,7 +2,14 @@ cpumapdir = $(pkgdatadir)/cpu_map cpumap_DATA = \ + cpu_map/arm_cortex-a53.xml \ + cpu_map/arm_cortex-a57.xml \ + cpu_map/arm_cortex-a72.xml \ cpu_map/arm_features.xml \ + cpu_map/arm_Kunpeng-920.xml \ + cpu_map/arm_ThunderX299xx.xml \ + cpu_map/arm_Falkor.xml \ + cpu_map/arm_vendors.xml \ cpu_map/index.xml \ cpu_map/ppc64_vendors.xml \ cpu_map/ppc64_POWER7.xml \ diff --git a/src/cpu_map/arm_Falkor.xml b/src/cpu_map/arm_Falkor.xml new file mode 100644 index 0000000000..b8f34bbc02 --- /dev/null +++ b/src/cpu_map/arm_Falkor.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='Falkor'> + <vendor name='Qualcomm'/> + <pvr value='0xc00'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_Kunpeng-920.xml b/src/cpu_map/arm_Kunpeng-920.xml new file mode 100644 index 0000000000..e06d4744fc --- /dev/null +++ b/src/cpu_map/arm_Kunpeng-920.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='Kunpeng-920'> + <vendor name='HiSilicon'/> + <pvr value='0xd01'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_ThunderX299xx.xml b/src/cpu_map/arm_ThunderX299xx.xml new file mode 100644 index 0000000000..6c0864f601 --- /dev/null +++ b/src/cpu_map/arm_ThunderX299xx.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='ThunderX2 99xx'> + <vendor name='Cavium'/> + <pvr value='0x0af'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_cortex-a53.xml b/src/cpu_map/arm_cortex-a53.xml new file mode 100644 index 0000000000..3580236253 --- /dev/null +++ b/src/cpu_map/arm_cortex-a53.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='cortex-a53'> + <vendor name='ARM'/> + <pvr value='0xd03'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_cortex-a57.xml b/src/cpu_map/arm_cortex-a57.xml new file mode 100644 index 0000000000..3bc4324173 --- /dev/null +++ b/src/cpu_map/arm_cortex-a57.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='cortex-a57'> + <vendor name='ARM'/> + <pvr value='0xd07'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_cortex-a72.xml b/src/cpu_map/arm_cortex-a72.xml new file mode 100644 index 0000000000..c509a40567 --- /dev/null +++ b/src/cpu_map/arm_cortex-a72.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='cortex-a72'> + <vendor name='ARM'/> + <pvr value='0xd08'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_vendors.xml b/src/cpu_map/arm_vendors.xml new file mode 100644 index 0000000000..703c2112b1 --- /dev/null +++ b/src/cpu_map/arm_vendors.xml @@ -0,0 +1,14 @@ +<cpus> + <vendor name="ARM" value="0x41"/> + <vendor name="Broadcom" value="0x42"/> + <vendor name="Cavium" value="0x43"/> + <vendor name="DigitalEquipment" value="0x44"/> + <vendor name="HiSilicon" value="0x48"/> + <vendor name="Infineon" value="0x49"/> + <vendor name="Freescale" value="0x4D"/> + <vendor name="NVIDIA" value="0x4E"/> + <vendor name="APM" value="0x50"/> + <vendor name="Qualcomm" value="0x51"/> + <vendor name="Marvell" value="0x56"/> + <vendor name="Intel" value="0x69"/> +</cpus> diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index 50b030de29..20646a031c 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -85,6 +85,21 @@ </arch> <arch name='arm'> + <include filename="arm_vendors.xml"/> <include filename='arm_features.xml'/> + +  + <include filename="arm_cortex-a53.xml"/> + <include filename="arm_cortex-a57.xml"/> + <include filename="arm_cortex-a72.xml"/> + +  + <include filename='arm_Falkor.xml'/> + +  + <include filename='arm_ThunderX299xx.xml'/> + +  + <include filename="arm_Kunpeng-920.xml"/> </arch> </cpus> -- 2.20.1

3 2

[PATCH V5 3/4] cpu: Introduce getHost support for ARM CPU driver
by Zhenyu Zheng 15 May '20

15 May '20

Introduce getHost support for ARM CPU driver, read CPU vendor_id, part_id and flags from registers directly. These codes will only be compiled on aarch64 hardware. Signed-off-by: Zhenyu Zheng <zheng.zhenyu(a)outlook.com> --- src/cpu/cpu_arm.c | 162 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 162 insertions(+) diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c index c7a6abfb22..6aef568503 100644 --- a/src/cpu/cpu_arm.c +++ b/src/cpu/cpu_arm.c @@ -21,6 +21,10 @@ */ #include <config.h> +#if defined(__aarch64__) +# include <asm/hwcap.h> +# include <sys/auxv.h> +#endif #include "viralloc.h" #include "cpu.h" @@ -31,6 +35,13 @@ #include "virxml.h" #define VIR_FROM_THIS VIR_FROM_CPU +#if defined(__aarch64__) +/* Shift bit mask for parsing cpu flags */ +# define BIT_SHIFTS(n) (1UL << (n)) +/* The current max number of cpu flags on ARM is 32 */ +# define MAX_CPU_FLAGS 32 +#endif + VIR_LOG_INIT("cpu.cpu_arm"); @@ -486,11 +497,162 @@ virCPUarmValidateFeatures(virCPUDefPtr cpu) return 0; } +#if defined(__aarch64__) +/* Generate human readable flag list according to the order of */ +/* AT_HWCAP bit map */ +const char *aarch64_cpu_flags[MAX_CPU_FLAGS] = { + "fp", "asimd", "evtstrm", "aes", "pmull", "sha1", "sha2", + "crc32", "atomics", "fphp", "asimdhp", "cpuid", "asimdrdm", + "jscvt", "fcma", "lrcpc", "dcpop", "sha3", "sm3", "sm4", + "asimddp", "sha512", "sve", "asimdfhm", "dit", "uscat", + "ilrcpc", "flagm", "ssbs", "sb", "paca", "pacg"}; +/** + * virCPUarmCpuDataFromRegs: + * + * @data: 64-bit arm CPU specific data + * + * Fetches CPU vendor_id and part_id from MIDR_EL1 register, parse CPU + * flags from AT_HWCAP. There are currently 32 valid flags on ARM arch + * represented by each bit. + */ +static int +virCPUarmCpuDataFromRegs(virCPUarmData *data) +{ + unsigned long cpuid; + unsigned long hwcaps; + VIR_AUTOSTRINGLIST features = NULL; + int cpu_feature_index = 0; + size_t i; + + if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) { + virReportError(VIR_ERR_INTERNAL_ERROR, "%s", + _("CPUID registers unavailable")); + return -1; + } + + /* read the cpuid data from MIDR_EL1 register */ + asm("mrs %0, MIDR_EL1" : "=r" (cpuid)); + VIR_DEBUG("CPUID read from register: 0x%016lx", cpuid); + + /* parse the coresponding part_id bits */ + data->pvr = (cpuid >> 4) & 0xfff; + /* parse the coresponding vendor_id bits */ + data->vendor_id = (cpuid >> 24) & 0xff; + + hwcaps = getauxval(AT_HWCAP); + VIR_DEBUG("CPU flags read from register: 0x%016lx", hwcaps); + + features = g_new0(char *, MAX_CPU_FLAGS + 1); + + /* shift bit map mask to parse for CPU flags */ + for (i = 0; i < MAX_CPU_FLAGS; i++) { + if (hwcaps & BIT_SHIFTS(i)) { + features[cpu_feature_index] = g_strdup(aarch64_cpu_flags[i]); + cpu_feature_index++; + } + } + + if (cpu_feature_index > 0) { + data->features = g_steal_pointer(&features); + data->nfeatures = cpu_feature_index; + } + + return 0; +} + +static int +virCPUarmDecode(virCPUDefPtr cpu, + const virCPUarmData *cpuData, + virDomainCapsCPUModelsPtr models) +{ + size_t i; + virCPUarmMapPtr map; + virCPUarmModelPtr model; + virCPUarmVendorPtr vendor = NULL; + + if (!cpuData || !(map = virCPUarmGetMap())) + return -1; + + if (!(model = virCPUarmModelFindByPVR(map, cpuData->pvr))) { + virReportError(VIR_ERR_OPERATION_FAILED, + _("Cannot find CPU model with PVR 0x%03lx"), + cpuData->pvr); + return -1; + } + + if (!virCPUModelIsAllowed(model->name, models)) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, + _("CPU model %s is not supported by hypervisor"), + model->name); + return -1; + } + + cpu->model = g_strdup(model->name); + + if (cpuData->vendor_id && + !(vendor = virCPUarmVendorFindByID(map, cpuData->vendor_id))) { + virReportError(VIR_ERR_OPERATION_FAILED, + _("Cannot find CPU vendor with vendor id 0x%02lx"), + cpuData->vendor_id); + return -1; + } + + if (vendor) + cpu->vendor = g_strdup(vendor->name); + + if (cpuData->nfeatures) { + cpu->nfeatures = cpuData->nfeatures; + if (VIR_ALLOC_N(cpu->features, cpu->nfeatures) < 0) + goto error; + for (i = 0; i < cpu->nfeatures; i++) { + cpu->features[i].policy = VIR_CPU_FEATURE_REQUIRE; + cpu->features[i].name = g_strdup(cpuData->features[i]); + } + } + + return 0; + + error: + for (i = 0; i < cpu->nfeatures; i++) + VIR_FREE(cpu->features[i].name); + VIR_FREE(cpu->features); + cpu->nfeatures = 0; + return -1; +} + +static int +virCPUarmGetHost(virCPUDefPtr cpu, + virDomainCapsCPUModelsPtr models) +{ + virCPUDataPtr cpuData = NULL; + int ret = -1; + + if (virCPUarmDriverInitialize() < 0) + goto cleanup; + + if (!(cpuData = virCPUDataNew(archs[0]))) + goto cleanup; + + if (virCPUarmCpuDataFromRegs(&cpuData->data.arm) < 0) + goto cleanup; + + ret = virCPUarmDecode(cpu, &cpuData->data.arm, models); + + cleanup: + virCPUarmDataFree(cpuData); + return ret; +} +#endif + + struct cpuArchDriver cpuDriverArm = { .name = "arm", .arch = archs, .narch = G_N_ELEMENTS(archs), .compare = virCPUarmCompare, +#if defined(__aarch64__) + .getHost = virCPUarmGetHost, +#endif .decode = NULL, .encode = NULL, .dataFree = virCPUarmDataFree, -- 2.20.1

2 1

[PATCH V5 2/4] cpu: Add helper functions to parse vendor and model
by Zhenyu Zheng 15 May '20

15 May '20

Add helper functions to parse vendor and model for ARM CPUs, and use them as callbacks when load cpu maps. Signed-off-by: Zhenyu Zheng <zheng.zhenyu(a)outlook.com> --- src/cpu/cpu_arm.c | 159 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 158 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c index 1bb0afb762..c7a6abfb22 100644 --- a/src/cpu/cpu_arm.c +++ b/src/cpu/cpu_arm.c @@ -165,6 +165,7 @@ virCPUarmMapFree(virCPUarmMapPtr map) virCPUarmVendorFree(map->vendors[i]); g_free(map->vendors); + g_ptr_array_free(map->features, TRUE); g_free(map); @@ -210,6 +211,160 @@ virCPUarmMapFeatureParse(xmlXPathContextPtr ctxt G_GNUC_UNUSED, return 0; } +static virCPUarmVendorPtr +virCPUarmVendorFindByID(virCPUarmMapPtr map, + unsigned long vendor_id) +{ + size_t i; + + for (i = 0; i < map->nvendors; i++) { + if (map->vendors[i]->value == vendor_id) + return map->vendors[i]; + } + + return NULL; +} + + +static virCPUarmVendorPtr +virCPUarmVendorFindByName(virCPUarmMapPtr map, + const char *name) +{ + size_t i; + + for (i = 0; i < map->nvendors; i++) { + if (STREQ(map->vendors[i]->name, name)) + return map->vendors[i]; + } + + return NULL; +} + + +static int +virCPUarmVendorParse(xmlXPathContextPtr ctxt, + const char *name, + void *data) +{ + virCPUarmMapPtr map = data; + g_autoptr(virCPUarmVendor) vendor = NULL; + + vendor = g_new0(virCPUarmVendor, 1); + vendor->name = g_strdup(name); + + if (virCPUarmVendorFindByName(map, vendor->name)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("CPU vendor %s already defined"), + vendor->name); + return -1; + } + + if (virXPathULongHex("string(@value)", ctxt, &vendor->value) < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + "%s", _("Missing CPU vendor value")); + return -1; + } + + if (virCPUarmVendorFindByID(map, vendor->value)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("CPU vendor value 0x%2lx already defined"), + vendor->value); + return -1; + } + + if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0) + return -1; + + return 0; +} + +static virCPUarmModelPtr +virCPUarmModelFind(virCPUarmMapPtr map, + const char *name) +{ + size_t i; + + for (i = 0; i < map->nmodels; i++) { + if (STREQ(map->models[i]->name, name)) + return map->models[i]; + } + + return NULL; +} + +#if defined(__aarch64__) +static virCPUarmModelPtr +virCPUarmModelFindByPVR(virCPUarmMapPtr map, + unsigned long pvr) +{ + size_t i; + + for (i = 0; i < map->nmodels; i++) { + if (map->models[i]->data.pvr == pvr) + return map->models[i]; + } + + return NULL; +} +#endif + +static int +virCPUarmModelParse(xmlXPathContextPtr ctxt, + const char *name, + void *data) +{ + virCPUarmMapPtr map = data; + virCPUarmModel *model; + g_autofree xmlNodePtr *nodes = NULL; + g_autofree char *vendor = NULL; + + model = g_new0(virCPUarmModel, 1); + model->name = g_strdup(name); + + if (virCPUarmModelFind(map, model->name)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("CPU model %s already defined"), + model->name); + return -1; + } + + if (virXPathBoolean("boolean(./vendor)", ctxt)) { + vendor = virXPathString("string(./vendor/@name)", ctxt); + if (!vendor) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Invalid vendor element in CPU model %s"), + model->name); + return -1; + } + + if (!(model->vendor = virCPUarmVendorFindByName(map, vendor))) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Unknown vendor %s referenced by CPU model %s"), + vendor, model->name); + return -1; + } + } + + if (!virXPathBoolean("boolean(./pvr)", ctxt)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Missing PVR information for CPU model %s"), + model->name); + return -1; + } + + if (virXPathULongHex("string(./pvr/@value)", ctxt, &model->data.pvr) < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Missing or invalid PVR value in CPU model %s"), + model->name); + return -1; + } + + if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + return -1; + + return 0; +} + static virCPUarmMapPtr virCPUarmLoadMap(void) { @@ -217,7 +372,8 @@ virCPUarmLoadMap(void) map = virCPUarmMapNew(); - if (cpuMapLoad("arm", NULL, virCPUarmMapFeatureParse, NULL, map) < 0) + if (cpuMapLoad("arm", virCPUarmVendorParse, virCPUarmMapFeatureParse, + virCPUarmModelParse, map) < 0) return NULL; return g_steal_pointer(&map); @@ -279,6 +435,7 @@ virCPUarmUpdate(virCPUDefPtr guest, return ret; } + static virCPUDefPtr virCPUarmBaseline(virCPUDefPtr *cpus, unsigned int ncpus G_GNUC_UNUSED, -- 2.20.1

2 1

[PATCH V5 1/4] cpu: Introduce virCPUarmData and related struts
by Zhenyu Zheng 15 May '20

15 May '20

Introduce virCPUarmData to virCPUData and related structs to cpu_arm.c for ARM cpus. Signed-off-by: Zhenyu Zheng <zheng.zhenyu(a)outlook.com> --- src/cpu/Makefile.inc.am | 1 + src/cpu/cpu.h | 2 ++ src/cpu/cpu_arm.c | 80 ++++++++++++++++++++++++++++++++++++++++- src/cpu/cpu_arm_data.h | 32 +++++++++++++++++ 4 files changed, 114 insertions(+), 1 deletion(-) create mode 100644 src/cpu/cpu_arm_data.h diff --git a/src/cpu/Makefile.inc.am b/src/cpu/Makefile.inc.am index 0abeee87b6..228112a3c6 100644 --- a/src/cpu/Makefile.inc.am +++ b/src/cpu/Makefile.inc.am @@ -9,6 +9,7 @@ CPU_SOURCES = \ cpu/cpu_s390.h \ cpu/cpu_s390.c \ cpu/cpu_arm.h \ + cpu/cpu_arm_data.h \ cpu/cpu_arm.c \ cpu/cpu_ppc64.h \ cpu/cpu_ppc64.c \ diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index f779d2be17..ec22a183a1 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -27,6 +27,7 @@ #include "cpu_conf.h" #include "cpu_x86_data.h" #include "cpu_ppc64_data.h" +#include "cpu_arm_data.h" typedef struct _virCPUData virCPUData; @@ -36,6 +37,7 @@ struct _virCPUData { union { virCPUx86Data x86; virCPUppc64Data ppc64; + virCPUarmData arm; /* generic driver needs no data */ } data; }; diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c index ee5802198f..1bb0afb762 100644 --- a/src/cpu/cpu_arm.c +++ b/src/cpu/cpu_arm.c @@ -1,6 +1,7 @@ /* * cpu_arm.c: CPU driver for arm CPUs * + * Copyright (C) 2020 Huawei Technologies Co., Ltd. * Copyright (C) 2013 Red Hat, Inc. * Copyright (C) Canonical Ltd. 2012 * @@ -23,12 +24,16 @@ #include "viralloc.h" #include "cpu.h" +#include "cpu_arm.h" #include "cpu_map.h" +#include "virlog.h" #include "virstring.h" #include "virxml.h" #define VIR_FROM_THIS VIR_FROM_CPU +VIR_LOG_INIT("cpu.cpu_arm"); + static const virArch archs[] = { VIR_ARCH_ARMV6L, VIR_ARCH_ARMV7B, @@ -36,6 +41,21 @@ static const virArch archs[] = { VIR_ARCH_AARCH64, }; +typedef struct _virCPUarmVendor virCPUarmVendor; +typedef virCPUarmVendor *virCPUarmVendorPtr; +struct _virCPUarmVendor { + char *name; + unsigned long value; +}; + +typedef struct _virCPUarmModel virCPUarmModel; +typedef virCPUarmModel *virCPUarmModelPtr; +struct _virCPUarmModel { + char *name; + virCPUarmVendorPtr vendor; + virCPUarmData data; +}; + typedef struct _virCPUarmFeature virCPUarmFeature; typedef virCPUarmFeature *virCPUarmFeaturePtr; struct _virCPUarmFeature { @@ -64,6 +84,10 @@ G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUarmFeature, virCPUarmFeatureFree); typedef struct _virCPUarmMap virCPUarmMap; typedef virCPUarmMap *virCPUarmMapPtr; struct _virCPUarmMap { + size_t nvendors; + virCPUarmVendorPtr *vendors; + size_t nmodels; + virCPUarmModelPtr *models; GPtrArray *features; }; @@ -81,12 +105,66 @@ virCPUarmMapNew(void) return map; } +static void +virCPUarmDataClear(virCPUarmData *data) +{ + if (!data) + return; + + virStringListFree(data->features); +} + +static void +virCPUarmDataFree(virCPUDataPtr cpuData) +{ + if (!cpuData) + return; + + virCPUarmDataClear(&cpuData->data.arm); + g_free(cpuData); +} + +static void +virCPUarmModelFree(virCPUarmModelPtr model) +{ + if (!model) + return; + + virCPUarmDataClear(&model->data); + g_free(model->name); + g_free(model); +} + +G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUarmModel, virCPUarmModelFree); + +static void +virCPUarmVendorFree(virCPUarmVendorPtr vendor) +{ + if (!vendor) + return; + + g_free(vendor->name); + g_free(vendor); +} + +G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUarmVendor, virCPUarmVendorFree); + static void virCPUarmMapFree(virCPUarmMapPtr map) { + size_t i; + if (!map) return; + for (i = 0; i < map->nmodels; i++) + virCPUarmModelFree(map->models[i]); + g_free(map->models); + + for (i = 0; i < map->nvendors; i++) + virCPUarmVendorFree(map->vendors[i]); + g_free(map->vendors); + g_ptr_array_free(map->features, TRUE); g_free(map); @@ -201,7 +279,6 @@ virCPUarmUpdate(virCPUDefPtr guest, return ret; } - static virCPUDefPtr virCPUarmBaseline(virCPUDefPtr *cpus, unsigned int ncpus G_GNUC_UNUSED, @@ -259,6 +336,7 @@ struct cpuArchDriver cpuDriverArm = { .compare = virCPUarmCompare, .decode = NULL, .encode = NULL, + .dataFree = virCPUarmDataFree, .baseline = virCPUarmBaseline, .update = virCPUarmUpdate, .validateFeatures = virCPUarmValidateFeatures, diff --git a/src/cpu/cpu_arm_data.h b/src/cpu/cpu_arm_data.h new file mode 100644 index 0000000000..9b931cb8aa --- /dev/null +++ b/src/cpu/cpu_arm_data.h @@ -0,0 +1,32 @@ +/* + * cpu_arm_data.h: 64-bit arm CPU specific data + * + * Copyright (C) 2020 Huawei Technologies Co., Ltd. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; If not, see + * <http://www.gnu.org/licenses/>. + * + */ + +#pragma once + +#define VIR_CPU_ARM_DATA_INIT { 0 } + +typedef struct _virCPUarmData virCPUarmData; +struct _virCPUarmData { + unsigned long vendor_id; + unsigned long pvr; + char **features; + size_t nfeatures; +}; -- 2.20.1

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[libvirt-ci PATCH 0/6] guests: more projects defined for GitLab CI containers
by Daniel P. Berrangé 15 May '20

15 May '20

The changes here enable GitLab CI container builds for ruby-libvirt, libvirt-java, libvirt-csharp, libvirt-publican and libvirt-appdev-guide-python projects. It also fixes a problem with the libvirt-php build missing packages if "libvirt+devel" project is not enabled. Daniel P. Berrangé (6): guests: add ruby-libvirt project packages guests: add libvirt-java project packages guests: add libvirt-csharp project packages guests: pull in the full JDK, not merely the JRE guests: include libxml2 explicitly for libvirt-php guests: add libvirt-publican and libvirt-appdev-guide-python projects guests/vars/mappings.yml | 50 ++++++++++++++++++- .../projects/libvirt-appdev-guide-python.yml | 3 ++ guests/vars/projects/libvirt-csharp.yml | 4 ++ guests/vars/projects/libvirt-java.yml | 7 +++ guests/vars/projects/libvirt-php.yml | 1 + guests/vars/projects/libvirt-publican.yml | 3 ++ guests/vars/projects/libvirt-ruby.yml | 5 ++ 7 files changed, 71 insertions(+), 2 deletions(-) create mode 100644 guests/vars/projects/libvirt-appdev-guide-python.yml create mode 100644 guests/vars/projects/libvirt-csharp.yml create mode 100644 guests/vars/projects/libvirt-java.yml create mode 100644 guests/vars/projects/libvirt-publican.yml create mode 100644 guests/vars/projects/libvirt-ruby.yml -- 2.26.2

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[libvirt PATCH] cpu: Properly define g_autoptr for virCPUData
by Jiri Denemark 15 May '20

15 May '20

The structure is not specific to x86 and thus its cleanup function should be defined in cpu.h and be available to all users. Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com> --- src/cpu/cpu.h | 1 + src/cpu/cpu_x86.c | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index f779d2be17..1d7900a829 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -182,6 +182,7 @@ virCPUDataNew(virArch arch); void virCPUDataFree(virCPUDataPtr data); +G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUData, virCPUDataFree); bool virCPUGetHostIsSupported(virArch arch); diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index 9183259bce..e3c553e943 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -495,7 +495,6 @@ virCPUx86DataFree(virCPUDataPtr data) virCPUx86DataClear(&data->data.x86); VIR_FREE(data); } -G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUData, virCPUx86DataFree); static void -- 2.26.2

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[PATCH v2 0/6] qemu: Support iSCSI iSER
by Han Han 15 May '20

15 May '20

The iSER[1](iSCSI Extensions for RDMA) transport is introduced since QEMU 2.9 [2]. It is only valid in iscsi network disk. Note that for the legacy uri of iscsi iser transport, it will start with 'iser' instead of 'iscsi'. Diff from v1: Use iser element of the source to enable iSER instead of the transport attribute. [1]: https://tools.ietf.org/html/rfc5046#section-1.7 [2]: https://github.com/qemu/qemu/blob/ee573f5326046223b6eef4ae7fbfec31d274e093/… git repo: https://gitlab.com/hhan2/libvirt/-/commits/iser-v2 v1: https://www.redhat.com/archives/libvir-list/2020-April/msg01247.html Han Han (6): qemu_capabilities: Introduce iSCSI iSER flag conf: Parse the iser element qemu: Implement the iSCSI iSER docs: Support iSCSI iser tests: unit tests for iSCSI iSER news: Support iSCSI iSER docs/formatdomain.html.in | 5 +++ docs/news.xml | 10 +++++ docs/schemas/domaincommon.rng | 5 +++ src/conf/domain_conf.c | 10 +++++ src/qemu/qemu_block.c | 11 ++++- src/qemu/qemu_capabilities.c | 4 ++ src/qemu/qemu_capabilities.h | 3 ++ src/qemu/qemu_command.c | 3 ++ src/qemu/qemu_domain.c | 9 ++++ src/util/virstoragefile.c | 17 +++++-- src/util/virstoragefile.h | 2 + .../caps_2.10.0.aarch64.xml | 1 + .../caps_2.10.0.ppc64.xml | 1 + .../caps_2.10.0.s390x.xml | 1 + .../caps_2.10.0.x86_64.xml | 1 + .../caps_2.11.0.s390x.xml | 1 + .../caps_2.11.0.x86_64.xml | 1 + .../caps_2.12.0.aarch64.xml | 1 + .../caps_2.12.0.ppc64.xml | 1 + .../caps_2.12.0.s390x.xml | 1 + .../caps_2.12.0.x86_64.xml | 1 + .../qemucapabilitiesdata/caps_2.9.0.ppc64.xml | 1 + .../qemucapabilitiesdata/caps_2.9.0.s390x.xml | 1 + .../caps_2.9.0.x86_64.xml | 1 + .../qemucapabilitiesdata/caps_3.0.0.ppc64.xml | 1 + .../caps_3.0.0.riscv32.xml | 1 + .../caps_3.0.0.riscv64.xml | 1 + .../qemucapabilitiesdata/caps_3.0.0.s390x.xml | 1 + .../caps_3.0.0.x86_64.xml | 1 + .../qemucapabilitiesdata/caps_3.1.0.ppc64.xml | 1 + .../caps_3.1.0.x86_64.xml | 1 + .../caps_4.0.0.aarch64.xml | 1 + .../qemucapabilitiesdata/caps_4.0.0.ppc64.xml | 1 + .../caps_4.0.0.riscv32.xml | 1 + .../caps_4.0.0.riscv64.xml | 1 + .../qemucapabilitiesdata/caps_4.0.0.s390x.xml | 1 + .../caps_4.0.0.x86_64.xml | 1 + .../caps_4.1.0.x86_64.xml | 1 + .../caps_4.2.0.aarch64.xml | 1 + .../qemucapabilitiesdata/caps_4.2.0.ppc64.xml | 1 + .../qemucapabilitiesdata/caps_4.2.0.s390x.xml | 1 + .../caps_4.2.0.x86_64.xml | 1 + .../caps_5.0.0.aarch64.xml | 1 + .../qemucapabilitiesdata/caps_5.0.0.ppc64.xml | 1 + .../caps_5.0.0.riscv64.xml | 1 + .../caps_5.0.0.x86_64.xml | 1 + .../caps_5.1.0.x86_64.xml | 1 + .../qemuxml2argvdata/disk-network-iscsi.args | 8 +++- .../disk-network-iscsi.x86_64-2.12.0.args | 7 ++- .../disk-network-iscsi.x86_64-latest.args | 45 +++++++++++-------- tests/qemuxml2argvdata/disk-network-iscsi.xml | 9 ++++ tests/qemuxml2argvtest.c | 5 ++- .../qemuxml2xmloutdata/disk-network-iscsi.xml | 10 +++++ tests/qemuxml2xmltest.c | 4 +- tests/virstoragetest.c | 16 +++++++ 55 files changed, 190 insertions(+), 29 deletions(-) -- 2.25.0

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[libvirt-csharp 0/3] Enable use of GitLab CI and merge requests
by Daniel P. Berrangé 14 May '20

14 May '20

This introduces support for GitLab CI, and then recommends use of merge requests for contribution. Daniel P. Berrangé (3): Update to target newer 4.0 .NET framework version gitlab: introduce CI jobs testing git master & distro libvirt gitlab: add CONTRIBUTING.rst file to indicate use of merge requests .gitlab-ci.yml | 96 +++++++++++++++++++ .gitpublish | 4 - CONTRIBUTING.rst | 28 ++++++ ci/README.rst | 14 +++ ci/libvirt-debian-9.Dockerfile | 58 +++++++++++ ci/libvirt-fedora-31.Dockerfile | 52 ++++++++++ ci/libvirt-fedora-32.Dockerfile | 61 ++++++++++++ ci/libvirt-fedora-rawhide.Dockerfile | 53 ++++++++++ ci/refresh | 27 ++++++ .../virConnectOpen/virConnectOpen.csproj | 4 +- .../virConnectOpenAuth.csproj | 4 +- .../virConnectSetErrorFunc.csproj | 4 +- .../virDomainStats/virDomainStats.csproj | 57 ++++++++++- .../virEventRegisterImpl.csproj | 4 +- projects/MonoDevelop/LibvirtBindings.csproj | 6 +- projects/MonoDevelop/LibvirtBindings.sln | 6 +- 16 files changed, 454 insertions(+), 24 deletions(-) delete mode 100644 .gitpublish create mode 100644 CONTRIBUTING.rst create mode 100644 ci/README.rst create mode 100644 ci/libvirt-debian-9.Dockerfile create mode 100644 ci/libvirt-fedora-31.Dockerfile create mode 100644 ci/libvirt-fedora-32.Dockerfile create mode 100644 ci/libvirt-fedora-rawhide.Dockerfile create mode 100755 ci/refresh -- 2.26.2

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