Re: [libvirt] Add hyperthreaded sibling info to virsh capabilities

On Tue, Oct 30, 2012 at 7:32 PM, Eric Blake <eblake(a)redhat.com&gt; wrote: I have added thread_siblings, core_siblings, and total memory information to the virsh capabilities output for a NUMA Cell. In my opinion the most important of these are the thread_siblings and memory information, but since it was easy to add, I also included the core_sibling information. The problem with this is that some topologies will most likely have redundant information (see core_siblings below) : <cell id='0'> <memory unit='KiB'>12572412</memory> <cpus num='12'> <cpu id='0' thread_siblings='0,12' core_siblings='0,2,4,6,8,10,12,14,16,18,20,22'/> <cpu id='2' thread_siblings='2,14' core_siblings='0,2,4,6,8,10,12,14,16,18,20,22'/> <cpu id='4' thread_siblings='4,16' core_siblings='0,2,4,6,8,10,12,14,16,18,20,22'/> <cpu id='6' thread_siblings='6,18' core_siblings='0,2,4,6,8,10,12,14,16,18,20,22'/> . . </cpus> </cell> As I don't exactly have a need for the core_siblings information right now I will probably just revert it to just have the memory and thread_sibling information unless others think i should leave it in. Dusty