8:41 p.m.
This series applies on top of "Another round of CPU driver patches" I
sent earlier today.
Jiri Denemark (10):
qemumonitorjsontest: Add getcpu test data
cpu_x86: Prepare for ecx_in CPUID parameter
cpu_x86: Add full support for ecx_in CPUID parameter
cpu: Shorten eax_in values in CPU map
cpu: Sort CPU map features on eax_in
cpu: Add x86 feature flags for CPUID leaf 0xd, sub leaf 1
cpu: Add ARAT x86 CPU feature
cpu: Add Skylake-Client x86 CPU model
cputest: Rename nehalem-force to penryn-force
cpu_x86: Use signature in CPU detection code
src/cpu/cpu_map.xml | 341 +++++++++------
src/cpu/cpu_x86.c | 476 +++++++++++++++++++--
src/cpu/cpu_x86_data.h | 1 +
src/qemu/qemu_monitor_json.c | 4 +
tests/cputest.c | 4 +-
tests/cputestdata/x86-cpuid-A10-5800K-guest.xml | 2 +-
tests/cputestdata/x86-cpuid-A10-5800K-host.xml | 2 +-
tests/cputestdata/x86-cpuid-A10-5800K-json.xml | 4 +-
tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml | 2 +
tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml | 2 +
tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml | 2 +
.../cputestdata/x86-cpuid-Core-i5-2540M-guest.xml | 2 +
tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml | 2 +
tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml | 2 +
.../cputestdata/x86-cpuid-Core-i5-4670T-guest.xml | 3 +-
tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml | 3 +-
tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml | 3 +-
tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml | 10 +-
tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml | 10 +-
tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml | 10 +-
tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml | 2 +
tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml | 2 +
tests/cputestdata/x86-cpuid-Core-i7-2600-json.xml | 1 +
.../cputestdata/x86-cpuid-Core-i7-3520M-guest.xml | 2 +
tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml | 2 +
.../cputestdata/x86-cpuid-Core-i7-3740QM-guest.xml | 1 +
.../cputestdata/x86-cpuid-Core-i7-3740QM-host.xml | 1 +
.../cputestdata/x86-cpuid-Core-i7-3740QM-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml | 2 +
tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml | 2 +
tests/cputestdata/x86-cpuid-Core-i7-3770-json.xml | 1 +
.../cputestdata/x86-cpuid-Core-i7-4600U-guest.xml | 4 +-
tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml | 4 +-
tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml | 4 +-
.../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 4 +-
tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml | 4 +-
tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml | 11 +-
tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Core2-E6850-host.xml | 5 +-
tests/cputestdata/x86-cpuid-Opteron-6234-json.xml | 3 +-
.../cputestdata/x86-cpuid-Pentium-P6100-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Pentium-P6100-host.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-5110-host.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml | 10 +-
tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml | 10 +-
tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml | 9 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml | 4 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml | 4 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml | 3 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml | 4 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml | 4 +-
tests/cputestdata/x86-cpuid-Xeon-E7-4820-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E7-4820-host.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E7-4820-json.xml | 2 +-
tests/cputestdata/x86-cpuid-Xeon-W3520-json.xml | 2 +-
.../cputestdata/x86-host+nehalem-force-result.xml | 4 -
tests/cputestdata/x86-host+penryn-force-result.xml | 6 +
...{x86-nehalem-force.xml => x86-penryn-force.xml} | 0
.../qemumonitorjson-getcpu-ecx.data | 7 +
.../qemumonitorjson-getcpu-ecx.json | 57 +++
.../qemumonitorjson-getcpu-full.data | 6 +-
.../qemumonitorjson-getcpu-host.data | 8 +-
tests/qemumonitorjsontest.c | 1 +
64 files changed, 853 insertions(+), 248 deletions(-)
delete mode 100644 tests/cputestdata/x86-host+nehalem-force-result.xml
create mode 100644 tests/cputestdata/x86-host+penryn-force-result.xml
rename tests/cputestdata/{x86-nehalem-force.xml => x86-penryn-force.xml} (100%)
create mode 100644 tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
create mode 100644 tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.json
--
2.8.4
8:41 p.m.
New subject: [libvirt] [PATCH 01/10] qemumonitorjsontest: Add getcpu test data
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
.../qemumonitorjson-getcpu-ecx.data | 7 +++
.../qemumonitorjson-getcpu-ecx.json | 57 ++++++++++++++++++++++
tests/qemumonitorjsontest.c | 1 +
3 files changed, 65 insertions(+)
create mode 100644 tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
create mode 100644 tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.json
diff --git a/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
new file mode 100644
index 0000000..c39e3dc
--- /dev/null
+++ b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
@@ -0,0 +1,7 @@
+<cpudata arch='x86'>
+ <cpuid eax_in='0x00000001' eax='0x00000000' ebx='0x00000000'
ecx='0xf7fa3203' edx='0x0f8bfbff'/>
+ <cpuid eax_in='0x00000007' eax='0x00000000' ebx='0x001c0fbb'
ecx='0x00000000' edx='0x00000000'/>
+ <cpuid eax_in='0x0000000d' eax='0x00000001' ebx='0x00000000'
ecx='0x00000000' edx='0x00000000'/>
+ <cpuid eax_in='0x40000001' eax='0x010000fb' ebx='0x00000000'
ecx='0x00000000' edx='0x00000000'/>
+ <cpuid eax_in='0x80000001' eax='0x00000000' ebx='0x00000000'
ecx='0x00000121' edx='0x2c100800'/>
+</cpudata>
diff --git a/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.json
b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.json
new file mode 100644
index 0000000..9eca2de
--- /dev/null
+++ b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.json
@@ -0,0 +1,57 @@
+{
+ "return": [
+ {
+ "cpuid-register": "EAX",
+ "cpuid-input-ecx": 1,
+ "cpuid-input-eax": 13,
+ "features": 1
+ },
+ {
+ "cpuid-register": "EDX",
+ "cpuid-input-eax": 2147483658,
+ "features": 0
+ },
+ {
+ "cpuid-register": "EAX",
+ "cpuid-input-eax": 1073741825,
+ "features": 16777467
+ },
+ {
+ "cpuid-register": "EDX",
+ "cpuid-input-eax": 3221225473,
+ "features": 0
+ },
+ {
+ "cpuid-register": "EDX",
+ "cpuid-input-eax": 2147483655,
+ "features": 0
+ },
+ {
+ "cpuid-register": "ECX",
+ "cpuid-input-eax": 2147483649,
+ "features": 289
+ },
+ {
+ "cpuid-register": "EDX",
+ "cpuid-input-eax": 2147483649,
+ "features": 739248128
+ },
+ {
+ "cpuid-register": "EBX",
+ "cpuid-input-ecx": 0,
+ "cpuid-input-eax": 7,
+ "features": 1839035
+ },
+ {
+ "cpuid-register": "ECX",
+ "cpuid-input-eax": 1,
+ "features": 4160369155
+ },
+ {
+ "cpuid-register": "EDX",
+ "cpuid-input-eax": 1,
+ "features": 260832255
+ }
+ ],
+ "id": "feature-words"
+}
diff --git a/tests/qemumonitorjsontest.c b/tests/qemumonitorjsontest.c
index 819f7ce..2c6c5d9 100644
--- a/tests/qemumonitorjsontest.c
+++ b/tests/qemumonitorjsontest.c
@@ -2431,6 +2431,7 @@ mymain(void)
DO_TEST_CPU_DATA("host");
DO_TEST_CPU_DATA("full");
+ DO_TEST_CPU_DATA("ecx");
qemuTestDriverFree(&driver);
--
2.8.4
10:44 p.m.
New subject: [libvirt] [PATCH 01/10] qemumonitorjsontest: Add getcpu test data
On Wed, Jun 08, 2016 at 14:41:29 +0200, Jiri Denemark wrote:
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
.../qemumonitorjson-getcpu-ecx.data | 7 +++
.../qemumonitorjson-getcpu-ecx.json | 57 ++++++++++++++++++++++
tests/qemumonitorjsontest.c | 1 +
3 files changed, 65 insertions(+)
create mode 100644 tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
create mode 100644 tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.json
ACK
8:41 p.m.
New subject: [libvirt] [PATCH 02/10] cpu_x86: Prepare for ecx_in CPUID parameter
CPUID instruction normally takes its parameter from EAX, but sometimes
ECX is used as an additional parameter. This patch prepares the x86 CPU
driver code for the new 'ecx_in' CPUID parameter.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_x86.c | 52 +++++++++++++---------
src/cpu/cpu_x86_data.h | 1 +
src/qemu/qemu_monitor_json.c | 4 ++
.../qemumonitorjson-getcpu-ecx.data | 10 ++---
.../qemumonitorjson-getcpu-full.data | 6 +--
.../qemumonitorjson-getcpu-host.data | 8 ++--
6 files changed, 49 insertions(+), 32 deletions(-)
diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 82921db..ae809de 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -40,7 +40,7 @@ VIR_LOG_INIT("cpu.cpu_x86");
#define VENDOR_STRING_LENGTH 12
-static const virCPUx86CPUID cpuidNull = { 0, 0, 0, 0, 0 };
+static const virCPUx86CPUID cpuidNull = { 0 };
static const virArch archs[] = { VIR_ARCH_I686, VIR_ARCH_X86_64 };
@@ -250,6 +250,11 @@ virCPUx86CPUIDSorter(const void *a, const void *b)
else if (da->eax_in < db->eax_in)
return -1;
+ if (da->ecx_in > db->ecx_in)
+ return 1;
+ else if (da->ecx_in < db->ecx_in)
+ return -1;
+
return 0;
}
@@ -274,12 +279,13 @@ x86DataCpuidNext(virCPUx86DataIteratorPtr iterator)
static virCPUx86CPUID *
x86DataCpuid(const virCPUx86Data *data,
- uint32_t eax_in)
+ const virCPUx86CPUID *cpuid)
{
size_t i;
for (i = 0; i < data->len; i++) {
- if (data->data[i].eax_in == eax_in)
+ if (data->data[i].eax_in == cpuid->eax_in &&
+ data->data[i].ecx_in == cpuid->ecx_in)
return data->data + i;
}
@@ -345,7 +351,7 @@ virCPUx86DataAddCPUID(virCPUx86Data *data,
{
virCPUx86CPUID *existing;
- if ((existing = x86DataCpuid(data, cpuid->eax_in))) {
+ if ((existing = x86DataCpuid(data, cpuid))) {
x86cpuidSetBits(existing, cpuid);
} else {
if (VIR_APPEND_ELEMENT_COPY(data->data, data->len,
@@ -369,7 +375,7 @@ x86DataAdd(virCPUx86Data *data1,
virCPUx86CPUID *cpuid2;
while ((cpuid2 = x86DataCpuidNext(&iter))) {
- cpuid1 = x86DataCpuid(data1, cpuid2->eax_in);
+ cpuid1 = x86DataCpuid(data1, cpuid2);
if (cpuid1) {
x86cpuidSetBits(cpuid1, cpuid2);
@@ -392,7 +398,7 @@ x86DataSubtract(virCPUx86Data *data1,
virCPUx86CPUID *cpuid2;
while ((cpuid1 = x86DataCpuidNext(&iter))) {
- cpuid2 = x86DataCpuid(data2, cpuid1->eax_in);
+ cpuid2 = x86DataCpuid(data2, cpuid1);
x86cpuidClearBits(cpuid1, cpuid2);
}
}
@@ -407,7 +413,7 @@ x86DataIntersect(virCPUx86Data *data1,
virCPUx86CPUID *cpuid2;
while ((cpuid1 = x86DataCpuidNext(&iter))) {
- cpuid2 = x86DataCpuid(data2, cpuid1->eax_in);
+ cpuid2 = x86DataCpuid(data2, cpuid1);
if (cpuid2)
x86cpuidAndBits(cpuid1, cpuid2);
else
@@ -435,7 +441,7 @@ x86DataIsSubset(const virCPUx86Data *data,
const virCPUx86CPUID *cpuidSubset;
while ((cpuidSubset = x86DataCpuidNext(&iter))) {
- if (!(cpuid = x86DataCpuid(data, cpuidSubset->eax_in)) ||
+ if (!(cpuid = x86DataCpuid(data, cpuidSubset)) ||
!x86cpuidMatchMasked(cpuid, cpuidSubset))
return false;
}
@@ -476,7 +482,7 @@ x86DataToVendor(const virCPUx86Data *data,
for (i = 0; i < map->nvendors; i++) {
virCPUx86VendorPtr vendor = map->vendors[i];
- if ((cpuid = x86DataCpuid(data, vendor->cpuid.eax_in)) &&
+ if ((cpuid = x86DataCpuid(data, &vendor->cpuid)) &&
x86cpuidMatchMasked(cpuid, &vendor->cpuid)) {
x86cpuidClearBits(cpuid, &vendor->cpuid);
return vendor;
@@ -592,6 +598,7 @@ x86VendorParse(xmlXPathContextPtr ctxt,
}
vendor->cpuid.eax_in = 0;
+ vendor->cpuid.ecx_in = 0;
vendor->cpuid.ebx = virReadBufInt32LE(string);
vendor->cpuid.edx = virReadBufInt32LE(string + 4);
vendor->cpuid.ecx = virReadBufInt32LE(string + 8);
@@ -715,25 +722,27 @@ static int
x86ParseCPUID(xmlXPathContextPtr ctxt,
virCPUx86CPUID *cpuid)
{
- unsigned long eax_in;
+ unsigned long eax_in, ecx_in;
unsigned long eax, ebx, ecx, edx;
- int ret_eax_in, ret_eax, ret_ebx, ret_ecx, ret_edx;
+ int ret_eax_in, ret_ecx_in, ret_eax, ret_ebx, ret_ecx, ret_edx;
memset(cpuid, 0, sizeof(*cpuid));
- eax_in = 0;
+ eax_in = ecx_in = 0;
eax = ebx = ecx = edx = 0;
ret_eax_in = virXPathULongHex("string(@eax_in)", ctxt, &eax_in);
+ ret_ecx_in = virXPathULongHex("string(@ecx_in)", ctxt, &ecx_in);
ret_eax = virXPathULongHex("string(@eax)", ctxt, &eax);
ret_ebx = virXPathULongHex("string(@ebx)", ctxt, &ebx);
ret_ecx = virXPathULongHex("string(@ecx)", ctxt, &ecx);
ret_edx = virXPathULongHex("string(@edx)", ctxt, &edx);
- if (ret_eax_in < 0 ||
+ if (ret_eax_in < 0 || ret_ecx_in == -2 ||
ret_eax == -2 || ret_ebx == -2 || ret_ecx == -2 || ret_edx == -2)
return -1;
cpuid->eax_in = eax_in;
+ cpuid->ecx_in = ecx_in;
cpuid->eax = eax;
cpuid->ebx = ebx;
cpuid->ecx = ecx;
@@ -1004,7 +1013,7 @@ x86ModelCompare(virCPUx86ModelPtr model1,
while ((cpuid1 = x86DataCpuidNext(&iter1))) {
virCPUx86CompareResult match = SUPERSET;
- if ((cpuid2 = x86DataCpuid(&model2->data, cpuid1->eax_in))) {
+ if ((cpuid2 = x86DataCpuid(&model2->data, cpuid1))) {
if (x86cpuidMatch(cpuid1, cpuid2))
continue;
else if (!x86cpuidMatchMasked(cpuid1, cpuid2))
@@ -1020,7 +1029,7 @@ x86ModelCompare(virCPUx86ModelPtr model1,
while ((cpuid2 = x86DataCpuidNext(&iter2))) {
virCPUx86CompareResult match = SUBSET;
- if ((cpuid1 = x86DataCpuid(&model1->data, cpuid2->eax_in))) {
+ if ((cpuid1 = x86DataCpuid(&model1->data, cpuid2))) {
if (x86cpuidMatch(cpuid2, cpuid1))
continue;
else if (!x86cpuidMatchMasked(cpuid2, cpuid1))
@@ -1265,10 +1274,10 @@ x86CPUDataFormat(const virCPUData *data)
virBufferAddLit(&buf, "<cpudata arch='x86'>\n");
while ((cpuid = x86DataCpuidNext(&iter))) {
virBufferAsprintf(&buf,
- " <cpuid eax_in='0x%08x'"
+ " <cpuid eax_in='0x%08x'
ecx_in='0x%08x'"
" eax='0x%08x' ebx='0x%08x'"
" ecx='0x%08x' edx='0x%08x'/>\n",
- cpuid->eax_in,
+ cpuid->eax_in, cpuid->ecx_in,
cpuid->eax, cpuid->ebx, cpuid->ecx, cpuid->edx);
}
virBufferAddLit(&buf, "</cpudata>\n");
@@ -1860,7 +1869,8 @@ cpuidCall(virCPUx86CPUID *cpuid)
"=b" (cpuid->ebx),
"=c" (cpuid->ecx),
"=d" (cpuid->edx)
- : "a" (cpuid->eax_in));
+ : "a" (cpuid->eax_in),
+ "c" (cpuid->ecx_in));
# else
/* we need to avoid direct use of ebx for CPUID output as it is used
* for global offset table on i386 with -fPIC
@@ -1876,7 +1886,8 @@ cpuidCall(virCPUx86CPUID *cpuid)
"=r" (cpuid->ebx),
"=c" (cpuid->ecx),
"=d" (cpuid->edx)
- : "a" (cpuid->eax_in)
+ : "a" (cpuid->eax_in),
+ "c" (cpuid->ecx_in)
: "cc");
# endif
}
@@ -1887,13 +1898,14 @@ cpuidSet(uint32_t base, virCPUx86Data *data)
{
uint32_t max;
uint32_t i;
- virCPUx86CPUID cpuid = { base, 0, 0, 0, 0 };
+ virCPUx86CPUID cpuid = { .eax_in = base };
cpuidCall(&cpuid);
max = cpuid.eax;
for (i = base; i <= max; i++) {
cpuid.eax_in = i;
+ cpuid.ecx_in = 0;
cpuidCall(&cpuid);
if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
return -1;
diff --git a/src/cpu/cpu_x86_data.h b/src/cpu/cpu_x86_data.h
index 75f7b30..4660ab6 100644
--- a/src/cpu/cpu_x86_data.h
+++ b/src/cpu/cpu_x86_data.h
@@ -29,6 +29,7 @@
typedef struct _virCPUx86CPUID virCPUx86CPUID;
struct _virCPUx86CPUID {
uint32_t eax_in;
+ uint32_t ecx_in;
uint32_t eax;
uint32_t ebx;
uint32_t ecx;
diff --git a/src/qemu/qemu_monitor_json.c b/src/qemu/qemu_monitor_json.c
index 2cb0198..12d2e22 100644
--- a/src/qemu/qemu_monitor_json.c
+++ b/src/qemu/qemu_monitor_json.c
@@ -6364,6 +6364,7 @@ qemuMonitorJSONParseCPUx86FeatureWord(virJSONValuePtr data,
{
const char *reg;
unsigned long long eax_in;
+ unsigned long long ecx_in = 0;
unsigned long long features;
memset(cpuid, 0, sizeof(*cpuid));
@@ -6378,6 +6379,8 @@ qemuMonitorJSONParseCPUx86FeatureWord(virJSONValuePtr data,
_("missing or invalid cpuid-input-eax in CPU data"));
return -1;
}
+ ignore_value(virJSONValueObjectGetNumberUlong(data, "cpuid-input-ecx",
+ &ecx_in));
if (virJSONValueObjectGetNumberUlong(data, "features", &features) <
0) {
virReportError(VIR_ERR_INTERNAL_ERROR, "%s",
_("missing or invalid features in CPU data"));
@@ -6385,6 +6388,7 @@ qemuMonitorJSONParseCPUx86FeatureWord(virJSONValuePtr data,
}
cpuid->eax_in = eax_in;
+ cpuid->ecx_in = ecx_in;
if (STREQ(reg, "EAX")) {
cpuid->eax = features;
} else if (STREQ(reg, "EBX")) {
diff --git a/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
index c39e3dc..457bbbe 100644
--- a/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
+++ b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-ecx.data
@@ -1,7 +1,7 @@
<cpudata arch='x86'>
- <cpuid eax_in='0x00000001' eax='0x00000000' ebx='0x00000000'
ecx='0xf7fa3203' edx='0x0f8bfbff'/>
- <cpuid eax_in='0x00000007' eax='0x00000000' ebx='0x001c0fbb'
ecx='0x00000000' edx='0x00000000'/>
- <cpuid eax_in='0x0000000d' eax='0x00000001' ebx='0x00000000'
ecx='0x00000000' edx='0x00000000'/>
- <cpuid eax_in='0x40000001' eax='0x010000fb' ebx='0x00000000'
ecx='0x00000000' edx='0x00000000'/>
- <cpuid eax_in='0x80000001' eax='0x00000000' ebx='0x00000000'
ecx='0x00000121' edx='0x2c100800'/>
+ <cpuid eax_in='0x00000001' ecx_in='0x00000000'
eax='0x00000000' ebx='0x00000000' ecx='0xf7fa3203'
edx='0x0f8bfbff'/>
+ <cpuid eax_in='0x00000007' ecx_in='0x00000000'
eax='0x00000000' ebx='0x001c0fbb' ecx='0x00000000'
edx='0x00000000'/>
+ <cpuid eax_in='0x0000000d' ecx_in='0x00000001'
eax='0x00000001' ebx='0x00000000' ecx='0x00000000'
edx='0x00000000'/>
+ <cpuid eax_in='0x40000001' ecx_in='0x00000000'
eax='0x010000fb' ebx='0x00000000' ecx='0x00000000'
edx='0x00000000'/>
+ <cpuid eax_in='0x80000001' ecx_in='0x00000000'
eax='0x00000000' ebx='0x00000000' ecx='0x00000121'
edx='0x2c100800'/>
</cpudata>
diff --git a/tests/qemumonitorjsondata/qemumonitorjson-getcpu-full.data
b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-full.data
index 87a8fb1..b581821 100644
--- a/tests/qemumonitorjsondata/qemumonitorjson-getcpu-full.data
+++ b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-full.data
@@ -1,5 +1,5 @@
<cpudata arch='x86'>
- <cpuid eax_in='0x00000001' eax='0x00000000' ebx='0x00000000'
ecx='0x97ba2223' edx='0x078bfbfd'/>
- <cpuid eax_in='0x40000001' eax='0x0100003b' ebx='0x00000000'
ecx='0x00000000' edx='0x00000000'/>
- <cpuid eax_in='0x80000001' eax='0x00000000' ebx='0x00000000'
ecx='0x00000001' edx='0x28100800'/>
+ <cpuid eax_in='0x00000001' ecx_in='0x00000000'
eax='0x00000000' ebx='0x00000000' ecx='0x97ba2223'
edx='0x078bfbfd'/>
+ <cpuid eax_in='0x40000001' ecx_in='0x00000000'
eax='0x0100003b' ebx='0x00000000' ecx='0x00000000'
edx='0x00000000'/>
+ <cpuid eax_in='0x80000001' ecx_in='0x00000000'
eax='0x00000000' ebx='0x00000000' ecx='0x00000001'
edx='0x28100800'/>
</cpudata>
diff --git a/tests/qemumonitorjsondata/qemumonitorjson-getcpu-host.data
b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-host.data
index 83bafe1..a4c503e 100644
--- a/tests/qemumonitorjsondata/qemumonitorjson-getcpu-host.data
+++ b/tests/qemumonitorjsondata/qemumonitorjson-getcpu-host.data
@@ -1,6 +1,6 @@
<cpudata arch='x86'>
- <cpuid eax_in='0x00000001' eax='0x00000000' ebx='0x00000000'
ecx='0x97ba2223' edx='0x0f8bfbff'/>
- <cpuid eax_in='0x00000007' eax='0x00000000' ebx='0x00000002'
ecx='0x00000000' edx='0x00000000'/>
- <cpuid eax_in='0x40000001' eax='0x0100007b' ebx='0x00000000'
ecx='0x00000000' edx='0x00000000'/>
- <cpuid eax_in='0x80000001' eax='0x00000000' ebx='0x00000000'
ecx='0x00000001' edx='0x2993fbff'/>
+ <cpuid eax_in='0x00000001' ecx_in='0x00000000'
eax='0x00000000' ebx='0x00000000' ecx='0x97ba2223'
edx='0x0f8bfbff'/>
+ <cpuid eax_in='0x00000007' ecx_in='0x00000000'
eax='0x00000000' ebx='0x00000002' ecx='0x00000000'
edx='0x00000000'/>
+ <cpuid eax_in='0x40000001' ecx_in='0x00000000'
eax='0x0100007b' ebx='0x00000000' ecx='0x00000000'
edx='0x00000000'/>
+ <cpuid eax_in='0x80000001' ecx_in='0x00000000'
eax='0x00000000' ebx='0x00000000' ecx='0x00000001'
edx='0x2993fbff'/>
</cpudata>
--
2.8.4
11:04 p.m.
New subject: [libvirt] [PATCH 02/10] cpu_x86: Prepare for ecx_in CPUID parameter
On Wed, Jun 08, 2016 at 14:41:30 +0200, Jiri Denemark wrote:
CPUID instruction normally takes its parameter from EAX, but
sometimes
ECX is used as an additional parameter. This patch prepares the x86 CPU
driver code for the new 'ecx_in' CPUID parameter.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_x86.c | 52 +++++++++++++---------
src/cpu/cpu_x86_data.h | 1 +
src/qemu/qemu_monitor_json.c | 4 ++
.../qemumonitorjson-getcpu-ecx.data | 10 ++---
.../qemumonitorjson-getcpu-full.data | 6 +--
.../qemumonitorjson-getcpu-host.data | 8 ++--
6 files changed, 49 insertions(+), 32 deletions(-)
diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 82921db..ae809de 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
[...]
@@ -1860,7 +1869,8 @@ cpuidCall(virCPUx86CPUID *cpuid)
"=b" (cpuid->ebx),
"=c" (cpuid->ecx),
"=d" (cpuid->edx)
- : "a" (cpuid->eax_in));
+ : "a" (cpuid->eax_in),
+ "c" (cpuid->ecx_in));
# else
/* we need to avoid direct use of ebx for CPUID output as it is used
* for global offset table on i386 with -fPIC
@@ -1876,7 +1886,8 @@ cpuidCall(virCPUx86CPUID *cpuid)
"=r" (cpuid->ebx),
"=c" (cpuid->ecx),
"=d" (cpuid->edx)
- : "a" (cpuid->eax_in)
+ : "a" (cpuid->eax_in),
+ "c" (cpuid->ecx_in)
I think the removal of clearing of the ECX register from the next patch
in the asm code above actually belongs here.
: "cc");
# endif
}
ACK with the above resolved
4:07 p.m.
New subject: [libvirt] [PATCH 02/10] cpu_x86: Prepare for ecx_in CPUID parameter
On Wed, Jun 08, 2016 at 17:04:19 +0200, Peter Krempa wrote:
On Wed, Jun 08, 2016 at 14:41:30 +0200, Jiri Denemark wrote:
> CPUID instruction normally takes its parameter from EAX, but sometimes
> ECX is used as an additional parameter. This patch prepares the x86 CPU
> driver code for the new 'ecx_in' CPUID parameter.
>
> Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
> ---
> src/cpu/cpu_x86.c | 52 +++++++++++++---------
> src/cpu/cpu_x86_data.h | 1 +
> src/qemu/qemu_monitor_json.c | 4 ++
> .../qemumonitorjson-getcpu-ecx.data | 10 ++---
> .../qemumonitorjson-getcpu-full.data | 6 +--
> .../qemumonitorjson-getcpu-host.data | 8 ++--
> 6 files changed, 49 insertions(+), 32 deletions(-)
>
> diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
> index 82921db..ae809de 100644
> --- a/src/cpu/cpu_x86.c
> +++ b/src/cpu/cpu_x86.c
[...]
> @@ -1860,7 +1869,8 @@ cpuidCall(virCPUx86CPUID *cpuid)
> "=b" (cpuid->ebx),
> "=c" (cpuid->ecx),
> "=d" (cpuid->edx)
> - : "a" (cpuid->eax_in));
> + : "a" (cpuid->eax_in),
> + "c" (cpuid->ecx_in));
> # else
> /* we need to avoid direct use of ebx for CPUID output as it is used
> * for global offset table on i386 with -fPIC
> @@ -1876,7 +1886,8 @@ cpuidCall(virCPUx86CPUID *cpuid)
> "=r" (cpuid->ebx),
> "=c" (cpuid->ecx),
> "=d" (cpuid->edx)
> - : "a" (cpuid->eax_in)
> + : "a" (cpuid->eax_in),
> + "c" (cpuid->ecx_in)
I think the removal of clearing of the ECX register from the next patch
in the asm code above actually belongs here.
Good catch, apparently I was not careful enough when splitting the
changes in two patches.
Jirka
8:41 p.m.
New subject: [libvirt] [PATCH 03/10] cpu_x86: Add full support for ecx_in CPUID parameter
This patch makes our CPUID handling code up-to-date with the current
specification found in
Intel® 64 and IA-32 Architectures Developer's Manual: Vol. 2A
http://www.intel.com/content/www/us/en/processors/architectures-software-...
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 1 -
src/cpu/cpu_x86.c | 278 ++++++++++++++++++++++++++++++++++++++++++++++++++--
2 files changed, 269 insertions(+), 10 deletions(-)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 1ddc55f..14c0e0f 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -289,7 +289,6 @@
</feature>
<!-- cpuid function 0x7 ecx 0x0 features -->
- <!-- We support only ecx 0x0 now as it's done by a workaround -->
<feature name='fsgsbase'>
<cpuid eax_in='0x00000007' ebx='0x00000001'/>
</feature>
diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index ae809de..6823a27 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -259,7 +259,7 @@ virCPUx86CPUIDSorter(const void *a, const void *b)
}
-/* skips all zero CPUID leafs */
+/* skips all zero CPUID leaves */
static virCPUx86CPUID *
x86DataCpuidNext(virCPUx86DataIteratorPtr iterator)
{
@@ -1862,8 +1862,7 @@ cpuidCall(virCPUx86CPUID *cpuid)
{
# if __x86_64__
asm("xor %%ebx, %%ebx;" /* clear the other registers as some cpuid */
- "xor %%ecx, %%ecx;" /* functions may use them as additional */
- "xor %%edx, %%edx;" /* arguments */
+ "xor %%edx, %%edx;" /* functions may use them as additional arguments
*/
"cpuid;"
: "=a" (cpuid->eax),
"=b" (cpuid->ebx),
@@ -1877,8 +1876,7 @@ cpuidCall(virCPUx86CPUID *cpuid)
*/
asm("push %%ebx;"
"xor %%ebx, %%ebx;" /* clear the other registers as some cpuid */
- "xor %%ecx, %%ecx;" /* functions may use them as additional */
- "xor %%edx, %%edx;" /* arguments */
+ "xor %%edx, %%edx;" /* functions may use them as additional arguments
*/
"cpuid;"
"mov %%ebx, %1;"
"pop %%ebx;"
@@ -1893,21 +1891,283 @@ cpuidCall(virCPUx86CPUID *cpuid)
}
+/* Leaf 0x4
+ *
+ * Sub leaf n+1 is invalid if eax[4:0] in sub leaf n equals 0.
+ */
+static int
+cpuidSetLeaf4(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = *subLeaf0;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ while (cpuid.eax & 0x1f) {
+ cpuid.ecx_in++;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0x7
+ *
+ * Sub leaf n is invalid if n > eax in sub leaf 0.
+ */
+static int
+cpuidSetLeaf7(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x7 };
+ uint32_t sub;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ for (sub = 1; sub <= subLeaf0->eax; sub++) {
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0xb
+ *
+ * Sub leaf n is invalid if it returns 0 in ecx[15:8].
+ * Sub leaf n+1 is invalid if sub leaf n is invalid.
+ * Some output values do not depend on ecx, thus sub leaf 0 provides
+ * meaningful data even if it was (theoretically) considered invalid.
+ */
+static int
+cpuidSetLeafB(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = *subLeaf0;
+
+ while (cpuid.ecx & 0xff00) {
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ cpuid.ecx_in++;
+ cpuidCall(&cpuid);
+ }
+ return 0;
+}
+
+
+/* Leaf 0xd
+ *
+ * Sub leaves 0 and 1 are valid.
+ * Sub leaf n (2 <= n < 32) is invalid if eax[n] from sub leaf 0 is not set
+ * and ecx[n] from sub leaf 1 is not set.
+ * Sub leaf n (32 <= n < 64) is invalid if edx[n-32] from sub leaf 0 is not set
+ * and edx[n-32] from sub leaf 1 is not set.
+ */
+static int
+cpuidSetLeafD(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0xd };
+ virCPUx86CPUID sub0;
+ virCPUx86CPUID sub1;
+ uint32_t sub;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ cpuid.ecx_in = 1;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+
+ sub0 = *subLeaf0;
+ sub1 = cpuid;
+ for (sub = 2; sub < 64; sub++) {
+ if (sub < 32 &&
+ !(sub0.eax & (1 << sub)) &&
+ !(sub1.ecx & (1 << sub)))
+ continue;
+ if (sub >= 32 &&
+ !(sub0.edx & (1 << (sub - 32))) &&
+ !(sub1.edx & (1 << (sub - 32))))
+ continue;
+
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0xf, 0x10
+ *
+ * res reports valid resource identification (ResID) starting at bit 1.
+ * Values associated with each valid ResID are reported by ResID sub leaf.
+ *
+ * 0xf: Sub leaf n is valid if edx[n] (= res[ResID]) from sub leaf 0 is set.
+ * 0x10: Sub leaf n is valid if ebx[n] (= res[ResID]) from sub leaf 0 is set.
+ */
+static int
+cpuidSetLeafResID(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0,
+ uint32_t res)
+{
+ virCPUx86CPUID cpuid = { .eax_in = subLeaf0->eax_in };
+ uint32_t sub;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ for (sub = 1; sub < 32; sub++) {
+ if (!(res & (1 << sub)))
+ continue;
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0x12
+ *
+ * Sub leaves 0 and 1 is supported if ebx[2] from leaf 0x7 (SGX) is set.
+ * Sub leaves n >= 2 are valid as long as eax[3:0] != 0.
+ */
+static int
+cpuidSetLeaf12(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x7 };
+ virCPUx86CPUID *cpuid7;
+
+ if (!(cpuid7 = x86DataCpuid(data, &cpuid)) ||
+ !(cpuid7->ebx & (1 << 2)))
+ return 0;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ cpuid.eax_in = 0x12;
+ cpuid.ecx_in = 1;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+
+ cpuid.ecx_in = 2;
+ cpuidCall(&cpuid);
+ while (cpuid.eax & 0xf) {
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ cpuid.ecx_in++;
+ cpuidCall(&cpuid);
+ }
+ return 0;
+}
+
+
+/* Leaf 0x14
+ *
+ * Sub leaf 0 reports the maximum supported sub leaf in eax.
+ */
+static int
+cpuidSetLeaf14(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x14 };
+ uint32_t sub;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ for (sub = 1; sub <= subLeaf0->eax; sub++) {
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0x17
+ *
+ * Sub leaf 0 is valid if eax >= 3.
+ * Sub leaf 0 reports the maximum supported sub leaf in eax.
+ */
+static int
+cpuidSetLeaf17(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x17 };
+ uint32_t sub;
+
+ if (subLeaf0->eax < 3)
+ return 0;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ for (sub = 1; sub <= subLeaf0->eax; sub++) {
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
static int
cpuidSet(uint32_t base, virCPUx86Data *data)
{
+ int rc;
uint32_t max;
- uint32_t i;
+ uint32_t leaf;
virCPUx86CPUID cpuid = { .eax_in = base };
cpuidCall(&cpuid);
max = cpuid.eax;
- for (i = base; i <= max; i++) {
- cpuid.eax_in = i;
+ for (leaf = base; leaf <= max; leaf++) {
+ cpuid.eax_in = leaf;
cpuid.ecx_in = 0;
cpuidCall(&cpuid);
- if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+
+ /* Handle CPUID leaves that depend on previously queried bits or
+ * which provide additional sub leaves for ecx_in > 0
+ */
+ if (leaf == 0x4)
+ rc = cpuidSetLeaf4(data, &cpuid);
+ else if (leaf == 0x7)
+ rc = cpuidSetLeaf7(data, &cpuid);
+ else if (leaf == 0xb)
+ rc = cpuidSetLeafB(data, &cpuid);
+ else if (leaf == 0xd)
+ rc = cpuidSetLeafD(data, &cpuid);
+ else if (leaf == 0xf)
+ rc = cpuidSetLeafResID(data, &cpuid, cpuid.edx);
+ else if (leaf == 0x10)
+ rc = cpuidSetLeafResID(data, &cpuid, cpuid.ebx);
+ else if (leaf == 0x12)
+ rc = cpuidSetLeaf12(data, &cpuid);
+ else if (leaf == 0x14)
+ rc = cpuidSetLeaf14(data, &cpuid);
+ else if (leaf == 0x17)
+ rc = cpuidSetLeaf17(data, &cpuid);
+ else
+ rc = virCPUx86DataAddCPUID(data, &cpuid);
+
+ if (rc < 0)
return -1;
}
--
2.8.4
2:15 p.m.
New subject: [libvirt] [PATCH 03/10] cpu_x86: Add full support for ecx_in CPUID parameter
On Wed, Jun 08, 2016 at 14:41:31 +0200, Jiri Denemark wrote:
This patch makes our CPUID handling code up-to-date with the current
specification found in
Intel® 64 and IA-32 Architectures Developer's Manual: Vol. 2A
http://www.intel.com/content/www/us/en/processors/architectures-software-...
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 1 -
src/cpu/cpu_x86.c | 278 ++++++++++++++++++++++++++++++++++++++++++++++++++--
2 files changed, 269 insertions(+), 10 deletions(-)
[]
@@ -1862,8 +1862,7 @@ cpuidCall(virCPUx86CPUID *cpuid)
{
# if __x86_64__
asm("xor %%ebx, %%ebx;" /* clear the other registers as some cpuid */
- "xor %%ecx, %%ecx;" /* functions may use them as additional */
- "xor %%edx, %%edx;" /* arguments */
+ "xor %%edx, %%edx;" /* functions may use them as additional arguments
*/
"cpuid;"
: "=a" (cpuid->eax),
"=b" (cpuid->ebx),
@@ -1877,8 +1876,7 @@ cpuidCall(virCPUx86CPUID *cpuid)
*/
asm("push %%ebx;"
"xor %%ebx, %%ebx;" /* clear the other registers as some cpuid */
- "xor %%ecx, %%ecx;" /* functions may use them as additional */
- "xor %%edx, %%edx;" /* arguments */
+ "xor %%edx, %%edx;" /* functions may use them as additional arguments
*/
"cpuid;"
"mov %%ebx, %1;"
"pop %%ebx;"
As said. This belongs to previous patch.
@@ -1893,21 +1891,283 @@ cpuidCall(virCPUx86CPUID *cpuid)
}
+/* Leaf 0x4
Deterministic cache parameters.
This leaf is borderline useful for CPU identification.
+ *
+ * Sub leaf n+1 is invalid if eax[4:0] in sub leaf n equals 0.
+ */
+static int
+cpuidSetLeaf4(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = *subLeaf0;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ while (cpuid.eax & 0x1f) {
+ cpuid.ecx_in++;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0x7
Structured extended feature flags enumeration. Very useful. Although it
looks like all the data is currently reported with ECX == 0.
+ *
+ * Sub leaf n is invalid if n > eax in sub leaf 0.
+ */
+static int
+cpuidSetLeaf7(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x7 };
+ uint32_t sub;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ for (sub = 1; sub <= subLeaf0->eax; sub++) {
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0xb
Extended topology enumeration
+ *
+ * Sub leaf n is invalid if it returns 0 in ecx[15:8].
+ * Sub leaf n+1 is invalid if sub leaf n is invalid.
+ * Some output values do not depend on ecx, thus sub leaf 0 provides
+ * meaningful data even if it was (theoretically) considered invalid.
Mostly EDX which reports APIC ID of the current processor which is
volatile anyways. Not sure whether it's worth collecting this leaf at
all since the returned data depend very specifically on the cpu where
it's executed. Also as we don't call it for all cpus it might be
pre-empted to a different CPU while enumerating.
+ */
+static int
+cpuidSetLeafB(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = *subLeaf0;
+
+ while (cpuid.ecx & 0xff00) {
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ cpuid.ecx_in++;
+ cpuidCall(&cpuid);
+ }
+ return 0;
+}
+
+
+/* Leaf 0xd
processor extended state enumeration
+ *
+ * Sub leaves 0 and 1 are valid.
+ * Sub leaf n (2 <= n < 32) is invalid if eax[n] from sub leaf 0 is not set
+ * and ecx[n] from sub leaf 1 is not set.
+ * Sub leaf n (32 <= n < 64) is invalid if edx[n-32] from sub leaf 0 is not set
+ * and edx[n-32] from sub leaf 1 is not set.
+ */
+static int
+cpuidSetLeafD(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0xd };
+ virCPUx86CPUID sub0;
+ virCPUx86CPUID sub1;
+ uint32_t sub;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ cpuid.ecx_in = 1;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+
+ sub0 = *subLeaf0;
+ sub1 = cpuid;
+ for (sub = 2; sub < 64; sub++) {
+ if (sub < 32 &&
+ !(sub0.eax & (1 << sub)) &&
+ !(sub1.ecx & (1 << sub)))
+ continue;
+ if (sub >= 32 &&
+ !(sub0.edx & (1 << (sub - 32))) &&
+ !(sub1.edx & (1 << (sub - 32))))
+ continue;
+
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0xf, 0x10
0x0f - L3 cached RDT monitoring capability enumeration
0x10 - RDT allocation enumeration
+ *
+ * res reports valid resource identification (ResID) starting at bit 1.
+ * Values associated with each valid ResID are reported by ResID sub leaf.
+ *
+ * 0xf: Sub leaf n is valid if edx[n] (= res[ResID]) from sub leaf 0 is set.
+ * 0x10: Sub leaf n is valid if ebx[n] (= res[ResID]) from sub leaf 0 is set.
+ */
+static int
+cpuidSetLeafResID(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0,
+ uint32_t res)
+{
+ virCPUx86CPUID cpuid = { .eax_in = subLeaf0->eax_in };
+ uint32_t sub;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ for (sub = 1; sub < 32; sub++) {
+ if (!(res & (1 << sub)))
+ continue;
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0x12
SGX Capability enumeration
+ *
+ * Sub leaves 0 and 1 is supported if ebx[2] from leaf 0x7 (SGX) is set.
+ * Sub leaves n >= 2 are valid as long as eax[3:0] != 0.
+ */
+static int
+cpuidSetLeaf12(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x7 };
+ virCPUx86CPUID *cpuid7;
+
+ if (!(cpuid7 = x86DataCpuid(data, &cpuid)) ||
+ !(cpuid7->ebx & (1 << 2)))
+ return 0;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ cpuid.eax_in = 0x12;
+ cpuid.ecx_in = 1;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+
+ cpuid.ecx_in = 2;
+ cpuidCall(&cpuid);
+ while (cpuid.eax & 0xf) {
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ cpuid.ecx_in++;
+ cpuidCall(&cpuid);
+ }
+ return 0;
+}
+
+
+/* Leaf 0x14
Processor trace enumeration
This function is the same as for 0x07
+ *
+ * Sub leaf 0 reports the maximum supported sub leaf in eax.
+ */
+static int
+cpuidSetLeaf14(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x14 };
+ uint32_t sub;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ for (sub = 1; sub <= subLeaf0->eax; sub++) {
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
+
+
+/* Leaf 0x17
SOC Vendor
+ *
+ * Sub leaf 0 is valid if eax >= 3.
+ * Sub leaf 0 reports the maximum supported sub leaf in eax.
+ */
+static int
+cpuidSetLeaf17(virCPUx86Data *data,
+ virCPUx86CPUID *subLeaf0)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x17 };
+ uint32_t sub;
+
+ if (subLeaf0->eax < 3)
+ return 0;
+
+ if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
+ return -1;
+
+ for (sub = 1; sub <= subLeaf0->eax; sub++) {
+ cpuid.ecx_in = sub;
+ cpuidCall(&cpuid);
+ if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
+ return -1;
+ }
+ return 0;
+}
Most of the data collected in other leaves is not very useful for cpu
identification for our purposes but that's true also for the main leaves
(ECX=0).
ACK. I'd appreciate if you added names for the leaves for future
reference (not everyone enjoys reading through the x86_64 reference)
but it's not strictly required.
8:41 p.m.
New subject: [libvirt] [PATCH 04/10] cpu: Shorten eax_in values in CPU map
For two reasons:
- 0x00000001 is very similar to 0x80000001, but 0x01 is visually
different
- 0x01 format is consistent with CPUID manual
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 158 ++++++++++++++++++++++++++--------------------------
1 file changed, 79 insertions(+), 79 deletions(-)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 14c0e0f..e99e72f 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -6,186 +6,186 @@
<!-- standard features, EDX -->
<feature name='fpu'> <!-- CPUID_FP87 -->
- <cpuid eax_in='0x00000001' edx='0x00000001'/>
+ <cpuid eax_in='0x01' edx='0x00000001'/>
</feature>
<feature name='vme'> <!-- CPUID_VME -->
- <cpuid eax_in='0x00000001' edx='0x00000002'/>
+ <cpuid eax_in='0x01' edx='0x00000002'/>
</feature>
<feature name='de'> <!-- CPUID_DE -->
- <cpuid eax_in='0x00000001' edx='0x00000004'/>
+ <cpuid eax_in='0x01' edx='0x00000004'/>
</feature>
<feature name='pse'> <!-- CPUID_PSE -->
- <cpuid eax_in='0x00000001' edx='0x00000008'/>
+ <cpuid eax_in='0x01' edx='0x00000008'/>
</feature>
<feature name='tsc'> <!-- CPUID_TSC -->
- <cpuid eax_in='0x00000001' edx='0x00000010'/>
+ <cpuid eax_in='0x01' edx='0x00000010'/>
</feature>
<feature name='msr'> <!-- CPUID_MSR -->
- <cpuid eax_in='0x00000001' edx='0x00000020'/>
+ <cpuid eax_in='0x01' edx='0x00000020'/>
</feature>
<feature name='pae'> <!-- CPUID_PAE -->
- <cpuid eax_in='0x00000001' edx='0x00000040'/>
+ <cpuid eax_in='0x01' edx='0x00000040'/>
</feature>
<feature name='mce'> <!-- CPUID_MCE -->
- <cpuid eax_in='0x00000001' edx='0x00000080'/>
+ <cpuid eax_in='0x01' edx='0x00000080'/>
</feature>
<feature name='cx8'> <!-- CPUID_CX8 -->
- <cpuid eax_in='0x00000001' edx='0x00000100'/>
+ <cpuid eax_in='0x01' edx='0x00000100'/>
</feature>
<feature name='apic'> <!-- CPUID_APIC -->
- <cpuid eax_in='0x00000001' edx='0x00000200'/>
+ <cpuid eax_in='0x01' edx='0x00000200'/>
</feature>
<feature name='sep'> <!-- CPUID_SEP -->
- <cpuid eax_in='0x00000001' edx='0x00000800'/>
+ <cpuid eax_in='0x01' edx='0x00000800'/>
</feature>
<feature name='mtrr'> <!-- CPUID_MTRR -->
- <cpuid eax_in='0x00000001' edx='0x00001000'/>
+ <cpuid eax_in='0x01' edx='0x00001000'/>
</feature>
<feature name='pge'> <!-- CPUID_PGE -->
- <cpuid eax_in='0x00000001' edx='0x00002000'/>
+ <cpuid eax_in='0x01' edx='0x00002000'/>
</feature>
<feature name='mca'> <!-- CPUID_MCA -->
- <cpuid eax_in='0x00000001' edx='0x00004000'/>
+ <cpuid eax_in='0x01' edx='0x00004000'/>
</feature>
<feature name='cmov'> <!-- CPUID_CMOV -->
- <cpuid eax_in='0x00000001' edx='0x00008000'/>
+ <cpuid eax_in='0x01' edx='0x00008000'/>
</feature>
<feature name='pat'> <!-- CPUID_PAT -->
- <cpuid eax_in='0x00000001' edx='0x00010000'/>
+ <cpuid eax_in='0x01' edx='0x00010000'/>
</feature>
<feature name='pse36'> <!-- CPUID_PSE36 -->
- <cpuid eax_in='0x00000001' edx='0x00020000'/>
+ <cpuid eax_in='0x01' edx='0x00020000'/>
</feature>
<feature name='pn'> <!-- CPUID_PN -->
- <cpuid eax_in='0x00000001' edx='0x00040000'/>
+ <cpuid eax_in='0x01' edx='0x00040000'/>
</feature>
<feature name='clflush'> <!-- CPUID_CLFLUSH -->
- <cpuid eax_in='0x00000001' edx='0x00080000'/>
+ <cpuid eax_in='0x01' edx='0x00080000'/>
</feature>
<feature name='ds'> <!-- CPUID_DTS -->
- <cpuid eax_in='0x00000001' edx='0x00200000'/>
+ <cpuid eax_in='0x01' edx='0x00200000'/>
</feature>
<feature name='acpi'> <!-- CPUID_ACPI -->
- <cpuid eax_in='0x00000001' edx='0x00400000'/>
+ <cpuid eax_in='0x01' edx='0x00400000'/>
</feature>
<feature name='mmx'> <!-- CPUID_MMX -->
- <cpuid eax_in='0x00000001' edx='0x00800000'/>
+ <cpuid eax_in='0x01' edx='0x00800000'/>
</feature>
<feature name='fxsr'> <!-- CPUID_FXSR -->
- <cpuid eax_in='0x00000001' edx='0x01000000'/>
+ <cpuid eax_in='0x01' edx='0x01000000'/>
</feature>
<feature name='sse'> <!-- CPUID_SSE -->
- <cpuid eax_in='0x00000001' edx='0x02000000'/>
+ <cpuid eax_in='0x01' edx='0x02000000'/>
</feature>
<feature name='sse2'> <!-- CPUID_SSE2 -->
- <cpuid eax_in='0x00000001' edx='0x04000000'/>
+ <cpuid eax_in='0x01' edx='0x04000000'/>
</feature>
<feature name='ss'> <!-- CPUID_SS -->
- <cpuid eax_in='0x00000001' edx='0x08000000'/>
+ <cpuid eax_in='0x01' edx='0x08000000'/>
</feature>
<feature name='ht'> <!-- CPUID_HT -->
- <cpuid eax_in='0x00000001' edx='0x10000000'/>
+ <cpuid eax_in='0x01' edx='0x10000000'/>
</feature>
<feature name='tm'> <!-- CPUID_TM -->
- <cpuid eax_in='0x00000001' edx='0x20000000'/>
+ <cpuid eax_in='0x01' edx='0x20000000'/>
</feature>
<feature name='ia64'> <!-- CPUID_IA64 -->
- <cpuid eax_in='0x00000001' edx='0x40000000'/>
+ <cpuid eax_in='0x01' edx='0x40000000'/>
</feature>
<feature name='pbe'> <!-- CPUID_PBE -->
- <cpuid eax_in='0x00000001' edx='0x80000000'/>
+ <cpuid eax_in='0x01' edx='0x80000000'/>
</feature>
<!-- standard features, ECX -->
<feature name='pni'> <!-- CPUID_EXT_SSE3 -->
- <cpuid eax_in='0x00000001' ecx='0x00000001'/>
+ <cpuid eax_in='0x01' ecx='0x00000001'/>
</feature>
<feature name='pclmuldq'>
- <cpuid eax_in='0x00000001' ecx='0x00000002'/>
+ <cpuid eax_in='0x01' ecx='0x00000002'/>
</feature>
<feature name='dtes64'>
- <cpuid eax_in='0x00000001' ecx='0x00000004'/>
+ <cpuid eax_in='0x01' ecx='0x00000004'/>
</feature>
<feature name='monitor'> <!-- CPUID_EXT_MONITOR -->
- <cpuid eax_in='0x00000001' ecx='0x00000008'/>
+ <cpuid eax_in='0x01' ecx='0x00000008'/>
</feature>
<feature name='ds_cpl'> <!-- CPUID_EXT_DSCPL -->
- <cpuid eax_in='0x00000001' ecx='0x00000010'/>
+ <cpuid eax_in='0x01' ecx='0x00000010'/>
</feature>
<feature name='vmx'> <!-- CPUID_EXT_VMX -->
- <cpuid eax_in='0x00000001' ecx='0x00000020'/>
+ <cpuid eax_in='0x01' ecx='0x00000020'/>
</feature>
<feature name='smx'>
- <cpuid eax_in='0x00000001' ecx='0x00000040'/>
+ <cpuid eax_in='0x01' ecx='0x00000040'/>
</feature>
<feature name='est'> <!-- CPUID_EXT_EST -->
- <cpuid eax_in='0x00000001' ecx='0x00000080'/>
+ <cpuid eax_in='0x01' ecx='0x00000080'/>
</feature>
<feature name='tm2'> <!-- CPUID_EXT_TM2 -->
- <cpuid eax_in='0x00000001' ecx='0x00000100'/>
+ <cpuid eax_in='0x01' ecx='0x00000100'/>
</feature>
<feature name='ssse3'> <!-- CPUID_EXT_SSSE3 -->
- <cpuid eax_in='0x00000001' ecx='0x00000200'/>
+ <cpuid eax_in='0x01' ecx='0x00000200'/>
</feature>
<feature name='cid'> <!-- CPUID_EXT_CID -->
- <cpuid eax_in='0x00000001' ecx='0x00000400'/>
+ <cpuid eax_in='0x01' ecx='0x00000400'/>
</feature>
<feature name='fma'>
- <cpuid eax_in='0x00000001' ecx='0x00001000'/>
+ <cpuid eax_in='0x01' ecx='0x00001000'/>
</feature>
<feature name='cx16'> <!-- CPUID_EXT_CX16 -->
- <cpuid eax_in='0x00000001' ecx='0x00002000'/>
+ <cpuid eax_in='0x01' ecx='0x00002000'/>
</feature>
<feature name='xtpr'> <!-- CPUID_EXT_XTPR -->
- <cpuid eax_in='0x00000001' ecx='0x00004000'/>
+ <cpuid eax_in='0x01' ecx='0x00004000'/>
</feature>
<feature name='pdcm'>
- <cpuid eax_in='0x00000001' ecx='0x00008000'/>
+ <cpuid eax_in='0x01' ecx='0x00008000'/>
</feature>
<feature name='pcid'>
- <cpuid eax_in='0x00000001' ecx='0x00020000'/>
+ <cpuid eax_in='0x01' ecx='0x00020000'/>
</feature>
<feature name='dca'> <!-- CPUID_EXT_DCA -->
- <cpuid eax_in='0x00000001' ecx='0x00040000'/>
+ <cpuid eax_in='0x01' ecx='0x00040000'/>
</feature>
<feature name='sse4.1'> <!-- CPUID_EXT_SSE41 -->
- <cpuid eax_in='0x00000001' ecx='0x00080000'/>
+ <cpuid eax_in='0x01' ecx='0x00080000'/>
</feature>
<feature name='sse4.2'> <!-- CPUID_EXT_SSE42 -->
- <cpuid eax_in='0x00000001' ecx='0x00100000'/>
+ <cpuid eax_in='0x01' ecx='0x00100000'/>
</feature>
<feature name='x2apic'> <!-- CPUID_EXT_X2APIC -->
- <cpuid eax_in='0x00000001' ecx='0x00200000'/>
+ <cpuid eax_in='0x01' ecx='0x00200000'/>
</feature>
<feature name='movbe'>
- <cpuid eax_in='0x00000001' ecx='0x00400000'/>
+ <cpuid eax_in='0x01' ecx='0x00400000'/>
</feature>
<feature name='popcnt'> <!-- CPUID_EXT_POPCNT -->
- <cpuid eax_in='0x00000001' ecx='0x00800000'/>
+ <cpuid eax_in='0x01' ecx='0x00800000'/>
</feature>
<feature name='tsc-deadline'>
- <cpuid eax_in='0x00000001' ecx='0x01000000'/>
+ <cpuid eax_in='0x01' ecx='0x01000000'/>
</feature>
<feature name='aes'>
- <cpuid eax_in='0x00000001' ecx='0x02000000'/>
+ <cpuid eax_in='0x01' ecx='0x02000000'/>
</feature>
<feature name='xsave'>
- <cpuid eax_in='0x00000001' ecx='0x04000000'/>
+ <cpuid eax_in='0x01' ecx='0x04000000'/>
</feature>
<feature name='osxsave'>
- <cpuid eax_in='0x00000001' ecx='0x08000000'/>
+ <cpuid eax_in='0x01' ecx='0x08000000'/>
</feature>
<feature name='avx'>
- <cpuid eax_in='0x00000001' ecx='0x10000000'/>
+ <cpuid eax_in='0x01' ecx='0x10000000'/>
</feature>
<feature name='f16c'>
- <cpuid eax_in='0x00000001' ecx='0x20000000'/>
+ <cpuid eax_in='0x01' ecx='0x20000000'/>
</feature>
<feature name='rdrand'>
- <cpuid eax_in='0x00000001' ecx='0x40000000'/>
+ <cpuid eax_in='0x01' ecx='0x40000000'/>
</feature>
<feature name='hypervisor'> <!-- CPUID_EXT_HYPERVISOR -->
- <cpuid eax_in='0x00000001' ecx='0x80000000'/>
+ <cpuid eax_in='0x01' ecx='0x80000000'/>
</feature>
<!-- extended features, EDX -->
@@ -290,61 +290,61 @@
<!-- cpuid function 0x7 ecx 0x0 features -->
<feature name='fsgsbase'>
- <cpuid eax_in='0x00000007' ebx='0x00000001'/>
+ <cpuid eax_in='0x07' ebx='0x00000001'/>
</feature>
<feature name='tsc_adjust'>
- <cpuid eax_in='0x00000007' ebx='0x00000002'/>
+ <cpuid eax_in='0x07' ebx='0x00000002'/>
</feature>
<feature name='bmi1'>
- <cpuid eax_in='0x00000007' ebx='0x00000008'/>
+ <cpuid eax_in='0x07' ebx='0x00000008'/>
</feature>
<feature name='hle'>
- <cpuid eax_in='0x00000007' ebx='0x00000010'/>
+ <cpuid eax_in='0x07' ebx='0x00000010'/>
</feature>
<feature name='avx2'>
- <cpuid eax_in='0x00000007' ebx='0x00000020'/>
+ <cpuid eax_in='0x07' ebx='0x00000020'/>
</feature>
<feature name='smep'>
- <cpuid eax_in='0x00000007' ebx='0x00000080'/>
+ <cpuid eax_in='0x07' ebx='0x00000080'/>
</feature>
<feature name='bmi2'>
- <cpuid eax_in='0x00000007' ebx='0x00000100'/>
+ <cpuid eax_in='0x07' ebx='0x00000100'/>
</feature>
<feature name='erms'>
- <cpuid eax_in='0x00000007' ebx='0x00000200'/>
+ <cpuid eax_in='0x07' ebx='0x00000200'/>
</feature>
<feature name='invpcid'>
- <cpuid eax_in='0x00000007' ebx='0x00000400'/>
+ <cpuid eax_in='0x07' ebx='0x00000400'/>
</feature>
<feature name='rtm'>
- <cpuid eax_in='0x00000007' ebx='0x00000800'/>
+ <cpuid eax_in='0x07' ebx='0x00000800'/>
</feature>
<feature name='mpx'>
- <cpuid eax_in='0x00000007' ebx='0x00004000'/>
+ <cpuid eax_in='0x07' ebx='0x00004000'/>
</feature>
<feature name='avx512f'> <!-- AVX-512 Foundation -->
- <cpuid eax_in='0x00000007' ebx='0x00010000'/>
+ <cpuid eax_in='0x07' ebx='0x00010000'/>
</feature>
<feature name='rdseed'>
- <cpuid eax_in='0x00000007' ebx='0x00040000'/>
+ <cpuid eax_in='0x07' ebx='0x00040000'/>
</feature>
<feature name='adx'>
- <cpuid eax_in='0x00000007' ebx='0x00080000'/>
+ <cpuid eax_in='0x07' ebx='0x00080000'/>
</feature>
<feature name='smap'>
- <cpuid eax_in='0x00000007' ebx='0x00100000'/>
+ <cpuid eax_in='0x07' ebx='0x00100000'/>
</feature>
<feature name='clflushopt'>
- <cpuid eax_in='0x00000007' ebx='0x00800000'/>
+ <cpuid eax_in='0x07' ebx='0x00800000'/>
</feature>
<feature name='avx512pf'> <!-- AVX-512 Prefetch -->
- <cpuid eax_in='0x00000007' ebx='0x04000000'/>
+ <cpuid eax_in='0x07' ebx='0x04000000'/>
</feature>
<feature name='avx512er'> <!-- AVX-512 Exponential and Reciprocal
-->
- <cpuid eax_in='0x00000007' ebx='0x08000000'/>
+ <cpuid eax_in='0x07' ebx='0x08000000'/>
</feature>
<feature name='avx512cd'> <!-- AVX-512 Conflict Detection -->
- <cpuid eax_in='0x00000007' ebx='0x10000000'/>
+ <cpuid eax_in='0x07' ebx='0x10000000'/>
</feature>
<!-- Advanced Power Management edx features -->
--
2.8.4
11:23 p.m.
New subject: [libvirt] [PATCH 04/10] cpu: Shorten eax_in values in CPU map
On Wed, Jun 08, 2016 at 14:41:32 +0200, Jiri Denemark wrote:
For two reasons:
- 0x00000001 is very similar to 0x80000001, but 0x01 is visually
different
- 0x01 format is consistent with CPUID manual
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 158 ++++++++++++++++++++++++++--------------------------
1 file changed, 79 insertions(+), 79 deletions(-)
ACK
8:41 p.m.
New subject: [libvirt] [PATCH 05/10] cpu: Sort CPU map features on eax_in
As a side effect this changes the order of CPU features in XMLs
generated by libvirt, but that's not a big deal since the order there is
insignificant.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 118 ++++++++++-----------
tests/cputestdata/x86-cpuid-A10-5800K-guest.xml | 2 +-
tests/cputestdata/x86-cpuid-A10-5800K-host.xml | 2 +-
tests/cputestdata/x86-cpuid-A10-5800K-json.xml | 4 +-
.../cputestdata/x86-cpuid-Core-i5-4670T-guest.xml | 2 +-
tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml | 2 +-
tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml | 2 +-
tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml | 4 +-
tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml | 4 +-
tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml | 4 +-
.../cputestdata/x86-cpuid-Core-i7-4600U-guest.xml | 2 +-
tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml | 2 +-
tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml | 2 +-
.../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 2 +-
tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml | 2 +-
tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml | 2 +-
tests/cputestdata/x86-cpuid-Opteron-6234-json.xml | 2 +-
tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml | 4 +-
tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml | 4 +-
tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml | 4 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml | 2 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml | 2 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml | 2 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml | 2 +-
tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml | 2 +-
tests/cputestdata/x86-cpuid-Xeon-E7-4820-json.xml | 2 +-
tests/cputestdata/x86-cpuid-Xeon-W3520-json.xml | 2 +-
27 files changed, 92 insertions(+), 92 deletions(-)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index e99e72f..b742122 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -188,6 +188,65 @@
<cpuid eax_in='0x01' ecx='0x80000000'/>
</feature>
+ <!-- cpuid function 0x7 ecx 0x0 features -->
+ <feature name='fsgsbase'>
+ <cpuid eax_in='0x07' ebx='0x00000001'/>
+ </feature>
+ <feature name='tsc_adjust'>
+ <cpuid eax_in='0x07' ebx='0x00000002'/>
+ </feature>
+ <feature name='bmi1'>
+ <cpuid eax_in='0x07' ebx='0x00000008'/>
+ </feature>
+ <feature name='hle'>
+ <cpuid eax_in='0x07' ebx='0x00000010'/>
+ </feature>
+ <feature name='avx2'>
+ <cpuid eax_in='0x07' ebx='0x00000020'/>
+ </feature>
+ <feature name='smep'>
+ <cpuid eax_in='0x07' ebx='0x00000080'/>
+ </feature>
+ <feature name='bmi2'>
+ <cpuid eax_in='0x07' ebx='0x00000100'/>
+ </feature>
+ <feature name='erms'>
+ <cpuid eax_in='0x07' ebx='0x00000200'/>
+ </feature>
+ <feature name='invpcid'>
+ <cpuid eax_in='0x07' ebx='0x00000400'/>
+ </feature>
+ <feature name='rtm'>
+ <cpuid eax_in='0x07' ebx='0x00000800'/>
+ </feature>
+ <feature name='mpx'>
+ <cpuid eax_in='0x07' ebx='0x00004000'/>
+ </feature>
+ <feature name='avx512f'> <!-- AVX-512 Foundation -->
+ <cpuid eax_in='0x07' ebx='0x00010000'/>
+ </feature>
+ <feature name='rdseed'>
+ <cpuid eax_in='0x07' ebx='0x00040000'/>
+ </feature>
+ <feature name='adx'>
+ <cpuid eax_in='0x07' ebx='0x00080000'/>
+ </feature>
+ <feature name='smap'>
+ <cpuid eax_in='0x07' ebx='0x00100000'/>
+ </feature>
+ <feature name='clflushopt'>
+ <cpuid eax_in='0x07' ebx='0x00800000'/>
+ </feature>
+ <feature name='avx512pf'> <!-- AVX-512 Prefetch -->
+ <cpuid eax_in='0x07' ebx='0x04000000'/>
+ </feature>
+ <feature name='avx512er'> <!-- AVX-512 Exponential and Reciprocal
-->
+ <cpuid eax_in='0x07' ebx='0x08000000'/>
+ </feature>
+ <feature name='avx512cd'> <!-- AVX-512 Conflict Detection -->
+ <cpuid eax_in='0x07' ebx='0x10000000'/>
+ </feature>
+
<!-- extended features, EDX -->
<feature name='syscall'> <!-- CPUID_EXT2_SYSCALL -->
<cpuid eax_in='0x80000001' edx='0x00000800'/>
@@ -288,65 +347,6 @@
<cpuid eax_in='0x80000001' ecx='0x01000000'/>
</feature>
- <!-- cpuid function 0x7 ecx 0x0 features -->
- <feature name='fsgsbase'>
- <cpuid eax_in='0x07' ebx='0x00000001'/>
- </feature>
- <feature name='tsc_adjust'>
- <cpuid eax_in='0x07' ebx='0x00000002'/>
- </feature>
- <feature name='bmi1'>
- <cpuid eax_in='0x07' ebx='0x00000008'/>
- </feature>
- <feature name='hle'>
- <cpuid eax_in='0x07' ebx='0x00000010'/>
- </feature>
- <feature name='avx2'>
- <cpuid eax_in='0x07' ebx='0x00000020'/>
- </feature>
- <feature name='smep'>
- <cpuid eax_in='0x07' ebx='0x00000080'/>
- </feature>
- <feature name='bmi2'>
- <cpuid eax_in='0x07' ebx='0x00000100'/>
- </feature>
- <feature name='erms'>
- <cpuid eax_in='0x07' ebx='0x00000200'/>
- </feature>
- <feature name='invpcid'>
- <cpuid eax_in='0x07' ebx='0x00000400'/>
- </feature>
- <feature name='rtm'>
- <cpuid eax_in='0x07' ebx='0x00000800'/>
- </feature>
- <feature name='mpx'>
- <cpuid eax_in='0x07' ebx='0x00004000'/>
- </feature>
- <feature name='avx512f'> <!-- AVX-512 Foundation -->
- <cpuid eax_in='0x07' ebx='0x00010000'/>
- </feature>
- <feature name='rdseed'>
- <cpuid eax_in='0x07' ebx='0x00040000'/>
- </feature>
- <feature name='adx'>
- <cpuid eax_in='0x07' ebx='0x00080000'/>
- </feature>
- <feature name='smap'>
- <cpuid eax_in='0x07' ebx='0x00100000'/>
- </feature>
- <feature name='clflushopt'>
- <cpuid eax_in='0x07' ebx='0x00800000'/>
- </feature>
- <feature name='avx512pf'> <!-- AVX-512 Prefetch -->
- <cpuid eax_in='0x07' ebx='0x04000000'/>
- </feature>
- <feature name='avx512er'> <!-- AVX-512 Exponential and Reciprocal
-->
- <cpuid eax_in='0x07' ebx='0x08000000'/>
- </feature>
- <feature name='avx512cd'> <!-- AVX-512 Conflict Detection -->
- <cpuid eax_in='0x07' ebx='0x10000000'/>
- </feature>
-
<!-- Advanced Power Management edx features -->
<feature name='invtsc' migratable='no'>
<cpuid eax_in='0x80000007' edx='0x00000100'/>
diff --git a/tests/cputestdata/x86-cpuid-A10-5800K-guest.xml
b/tests/cputestdata/x86-cpuid-A10-5800K-guest.xml
index ded7b30..dacf1d0 100644
--- a/tests/cputestdata/x86-cpuid-A10-5800K-guest.xml
+++ b/tests/cputestdata/x86-cpuid-A10-5800K-guest.xml
@@ -6,6 +6,7 @@
<feature policy='require' name='ht'/>
<feature policy='require' name='monitor'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='bmi1'/>
<feature policy='require' name='mmxext'/>
<feature policy='require' name='fxsr_opt'/>
<feature policy='require' name='cmp_legacy'/>
@@ -21,6 +22,5 @@
<feature policy='require' name='topoext'/>
<feature policy='require' name='perfctr_core'/>
<feature policy='require' name='perfctr_nb'/>
- <feature policy='require' name='bmi1'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-A10-5800K-host.xml
b/tests/cputestdata/x86-cpuid-A10-5800K-host.xml
index 4ee57d2..cb90c96 100644
--- a/tests/cputestdata/x86-cpuid-A10-5800K-host.xml
+++ b/tests/cputestdata/x86-cpuid-A10-5800K-host.xml
@@ -6,6 +6,7 @@
<feature name='ht'/>
<feature name='monitor'/>
<feature name='osxsave'/>
+ <feature name='bmi1'/>
<feature name='mmxext'/>
<feature name='fxsr_opt'/>
<feature name='cmp_legacy'/>
@@ -21,6 +22,5 @@
<feature name='topoext'/>
<feature name='perfctr_core'/>
<feature name='perfctr_nb'/>
- <feature name='bmi1'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-A10-5800K-json.xml
b/tests/cputestdata/x86-cpuid-A10-5800K-json.xml
index 6ebef60..7a38f0f 100644
--- a/tests/cputestdata/x86-cpuid-A10-5800K-json.xml
+++ b/tests/cputestdata/x86-cpuid-A10-5800K-json.xml
@@ -4,13 +4,13 @@
<feature policy='require' name='vme'/>
<feature policy='require' name='x2apic'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='bmi1'/>
<feature policy='require' name='mmxext'/>
<feature policy='require' name='fxsr_opt'/>
<feature policy='require' name='cmp_legacy'/>
<feature policy='require' name='cr8legacy'/>
<feature policy='require' name='osvw'/>
- <feature policy='require' name='tsc_adjust'/>
- <feature policy='require' name='bmi1'/>
<feature policy='disable' name='rdtscp'/>
<feature policy='disable' name='svm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-4670T-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-4670T-guest.xml
index 77b1a18..66ef1e3 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-4670T-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-4670T-guest.xml
@@ -21,8 +21,8 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
- <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml
index 32051e4..31211c1 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml
@@ -21,8 +21,8 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='tsc_adjust'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
- <feature name='tsc_adjust'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml
index 32b86a1..1c2aad3 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml
@@ -7,7 +7,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
- <feature policy='require' name='tsc_adjust'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
index 0001b2d..7820007 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
@@ -21,10 +21,10 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
- <feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
+ <feature policy='require' name='pdpe1gb'/>
+ <feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
index 0c2aaee..bdf38d9 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
@@ -21,10 +21,10 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
- <feature name='pdpe1gb'/>
- <feature name='abm'/>
<feature name='tsc_adjust'/>
<feature name='mpx'/>
<feature name='clflushopt'/>
+ <feature name='pdpe1gb'/>
+ <feature name='abm'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
index bd54d9d..5409852 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
@@ -6,9 +6,9 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
- <feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
+ <feature policy='require' name='pdpe1gb'/>
+ <feature policy='require' name='abm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
index 89c95a8..40cf4c2 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
@@ -21,8 +21,8 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
- <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
index 6edbf8f..c5a410c 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
@@ -21,8 +21,8 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='tsc_adjust'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
- <feature name='tsc_adjust'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
index 2f6a925..ef49a38 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
@@ -7,7 +7,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
- <feature policy='require' name='tsc_adjust'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
index 012946d..a538f74 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
@@ -21,8 +21,8 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
- <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
index 04e7e78..9c7c791 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
@@ -21,8 +21,8 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='tsc_adjust'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
- <feature name='tsc_adjust'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
index 9a13e6e..bbe5c77 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
@@ -7,7 +7,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
- <feature policy='require' name='tsc_adjust'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Opteron-6234-json.xml
b/tests/cputestdata/x86-cpuid-Opteron-6234-json.xml
index 2bb59a3..dded6fa 100644
--- a/tests/cputestdata/x86-cpuid-Opteron-6234-json.xml
+++ b/tests/cputestdata/x86-cpuid-Opteron-6234-json.xml
@@ -5,12 +5,12 @@
<feature policy='require' name='x2apic'/>
<feature policy='require' name='tsc-deadline'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mmxext'/>
<feature policy='require' name='fxsr_opt'/>
<feature policy='require' name='cmp_legacy'/>
<feature policy='require' name='cr8legacy'/>
<feature policy='require' name='osvw'/>
- <feature policy='require' name='tsc_adjust'/>
<feature policy='disable' name='rdtscp'/>
<feature policy='disable' name='svm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
index 0001b2d..7820007 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
@@ -21,10 +21,10 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
- <feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
+ <feature policy='require' name='pdpe1gb'/>
+ <feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
index 0c2aaee..bdf38d9 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
@@ -21,10 +21,10 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
- <feature name='pdpe1gb'/>
- <feature name='abm'/>
<feature name='tsc_adjust'/>
<feature name='mpx'/>
<feature name='clflushopt'/>
+ <feature name='pdpe1gb'/>
+ <feature name='abm'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
index 81a41fb..9348334 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
@@ -7,9 +7,9 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
- <feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
+ <feature policy='require' name='pdpe1gb'/>
+ <feature policy='require' name='abm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
index ce5aa79..048161e 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
@@ -22,8 +22,8 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
- <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
index 26a3b90..f2cf8cc 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
@@ -22,8 +22,8 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='tsc_adjust'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
- <feature name='tsc_adjust'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml
index 4cf361e..62aa9a1 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml
@@ -6,7 +6,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
- <feature policy='require' name='tsc_adjust'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
index ce5aa79..048161e 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
@@ -22,8 +22,8 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
- <feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
index 26a3b90..f2cf8cc 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
@@ -22,8 +22,8 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='tsc_adjust'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
- <feature name='tsc_adjust'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E7-4820-json.xml
b/tests/cputestdata/x86-cpuid-Xeon-E7-4820-json.xml
index 67b1dc7..ff6ab65 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E7-4820-json.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E7-4820-json.xml
@@ -5,8 +5,8 @@
<feature policy='require' name='ss'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='hypervisor'/>
- <feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='pdpe1gb'/>
<feature policy='disable' name='xsave'/>
<feature policy='disable' name='avx'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-W3520-json.xml
b/tests/cputestdata/x86-cpuid-Xeon-W3520-json.xml
index 3292264..1aadbf3 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-W3520-json.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-W3520-json.xml
@@ -5,6 +5,6 @@
<feature policy='require' name='ss'/>
<feature policy='require' name='x2apic'/>
<feature policy='require' name='hypervisor'/>
- <feature policy='require' name='rdtscp'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='rdtscp'/>
</cpu>
--
2.8.4
11:25 p.m.
New subject: [libvirt] [PATCH 05/10] cpu: Sort CPU map features on eax_in
On Wed, Jun 08, 2016 at 14:41:33 +0200, Jiri Denemark wrote:
As a side effect this changes the order of CPU features in XMLs
generated by libvirt, but that's not a big deal since the order there is
insignificant.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
ACK
8:41 p.m.
New subject: [libvirt] [PATCH 06/10] cpu: Add x86 feature flags for CPUID leaf 0xd, sub leaf 1
This was implemented in QEMU by commit 0bb0b2d2fe7f645dda.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 14 ++++++++++++++
tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml | 4 ++++
tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml | 4 ++++
tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml | 4 ++++
tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-2600-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3740QM-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3770-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml | 4 ++++
tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml | 4 ++++
tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml | 3 +++
tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml | 1 +
34 files changed, 64 insertions(+)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index b742122..68cb500 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -247,6 +247,20 @@
<cpuid eax_in='0x07' ebx='0x10000000'/>
</feature>
+ <!-- Processor Extended State Enumeration sub leaf 1 -->
+ <feature name='xsaveopt'>
+ <cpuid eax_in='0x0d' ecx_in='0x01'
eax='0x00000001'/>
+ </feature>
+ <feature name='xsavec'>
+ <cpuid eax_in='0x0d' ecx_in='0x01'
eax='0x00000002'/>
+ </feature>
+ <feature name='xgetbv1'>
+ <cpuid eax_in='0x0d' ecx_in='0x01'
eax='0x00000004'/>
+ </feature>
+ <feature name='xsaves' migratable='no'>
+ <cpuid eax_in='0x0d' ecx_in='0x01'
eax='0x00000008'/>
+ </feature>
+
<!-- extended features, EDX -->
<feature name='syscall'> <!-- CPUID_EXT2_SYSCALL -->
<cpuid eax_in='0x80000001' edx='0x00000800'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml
index d12df2d..6e60106 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml
@@ -20,5 +20,6 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml
index 5572ba5..e862e82 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml
@@ -20,5 +20,6 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml
index a2ecde6..27d9f35 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml
@@ -6,4 +6,5 @@
<feature policy='require' name='pcid'/>
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml
index d12df2d..6e60106 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml
@@ -20,5 +20,6 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml
index 5572ba5..e862e82 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml
@@ -20,5 +20,6 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml
index a2ecde6..27d9f35 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml
@@ -6,4 +6,5 @@
<feature policy='require' name='pcid'/>
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml
index 1c2aad3..c93688b 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-4670T-json.xml
@@ -8,6 +8,7 @@
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
index 7820007..cb8bd76 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
@@ -24,6 +24,10 @@
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
+ <feature policy='require' name='xsaveopt'/>
+ <feature policy='require' name='xsavec'/>
+ <feature policy='require' name='xgetbv1'/>
+ <feature policy='require' name='xsaves'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
index bdf38d9..1f24dd8 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
@@ -24,6 +24,10 @@
<feature name='tsc_adjust'/>
<feature name='mpx'/>
<feature name='clflushopt'/>
+ <feature name='xsaveopt'/>
+ <feature name='xsavec'/>
+ <feature name='xgetbv1'/>
+ <feature name='xsaves'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
<feature name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
index 5409852..a17b42a 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
@@ -9,6 +9,10 @@
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
+ <feature policy='require' name='xsaveopt'/>
+ <feature policy='require' name='xsavec'/>
+ <feature policy='require' name='xgetbv1'/>
+ <feature policy='require' name='xsaves'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml
index d12df2d..6e60106 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml
@@ -20,5 +20,6 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml
index 5572ba5..e862e82 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml
@@ -20,5 +20,6 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-2600-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-2600-json.xml
index a2ecde6..27d9f35 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-2600-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-2600-json.xml
@@ -6,4 +6,5 @@
<feature policy='require' name='pcid'/>
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml
index f5125d4..61c058f 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml
@@ -19,5 +19,6 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml
index 80d3a9d..6c8a0f8 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml
@@ -19,5 +19,6 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3740QM-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3740QM-json.xml
index 64e1fc9..9adeecc 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3740QM-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3740QM-json.xml
@@ -6,4 +6,5 @@
<feature policy='require' name='pcid'/>
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml
index f5125d4..61c058f 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml
@@ -19,5 +19,6 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml
index 80d3a9d..6c8a0f8 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml
@@ -19,5 +19,6 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3770-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3770-json.xml
index 9b4086e..a70ae48 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3770-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3770-json.xml
@@ -5,4 +5,5 @@
<feature policy='require' name='pcid'/>
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
index 40cf4c2..d06e8d9 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
@@ -22,6 +22,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
index c5a410c..fc033e6 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
@@ -22,6 +22,7 @@
<feature name='f16c'/>
<feature name='rdrand'/>
<feature name='tsc_adjust'/>
+ <feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
<feature name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
index ef49a38..b52e463 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
@@ -8,6 +8,7 @@
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
index a538f74..91370c2 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
@@ -22,6 +22,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
index 9c7c791..276b5af 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
@@ -22,6 +22,7 @@
<feature name='f16c'/>
<feature name='rdrand'/>
<feature name='tsc_adjust'/>
+ <feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
<feature name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
index bbe5c77..67b48ec 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
@@ -8,6 +8,7 @@
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
index 7820007..cb8bd76 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
@@ -24,6 +24,10 @@
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
+ <feature policy='require' name='xsaveopt'/>
+ <feature policy='require' name='xsavec'/>
+ <feature policy='require' name='xgetbv1'/>
+ <feature policy='require' name='xsaves'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
index bdf38d9..1f24dd8 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
@@ -24,6 +24,10 @@
<feature name='tsc_adjust'/>
<feature name='mpx'/>
<feature name='clflushopt'/>
+ <feature name='xsaveopt'/>
+ <feature name='xsavec'/>
+ <feature name='xgetbv1'/>
+ <feature name='xsaves'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
<feature name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
index 9348334..5b9cffe 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
@@ -10,6 +10,9 @@
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
+ <feature policy='require' name='xsaveopt'/>
+ <feature policy='require' name='xsavec'/>
+ <feature policy='require' name='xgetbv1'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
index 048161e..e5f69e8 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
@@ -23,6 +23,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
index f2cf8cc..1393832 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
@@ -23,6 +23,7 @@
<feature name='f16c'/>
<feature name='rdrand'/>
<feature name='tsc_adjust'/>
+ <feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
<feature name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml
index 62aa9a1..6b4edc3 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-json.xml
@@ -7,6 +7,7 @@
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
index 048161e..e5f69e8 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
@@ -23,6 +23,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
index f2cf8cc..1393832 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
@@ -23,6 +23,7 @@
<feature name='f16c'/>
<feature name='rdrand'/>
<feature name='tsc_adjust'/>
+ <feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
<feature name='invtsc'/>
--
2.8.4
2:25 p.m.
New subject: [libvirt] [PATCH 06/10] cpu: Add x86 feature flags for CPUID leaf 0xd, sub leaf 1
On Wed, Jun 08, 2016 at 14:41:34 +0200, Jiri Denemark wrote:
This was implemented in QEMU by commit 0bb0b2d2fe7f645dda.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 14 ++++++++++++++
[...]
ACK
8:41 p.m.
New subject: [libvirt] [PATCH 07/10] cpu: Add ARAT x86 CPU feature
Implemented in QEMU by commit 28b8e4d0bf93ba176b4b7be819d537383c5a9060.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 5 +++++
tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-4670T-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3740QM-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3740QM-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml | 1 +
tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml | 1 +
tests/cputestdata/x86-cpuid-Opteron-6234-json.xml | 1 +
tests/cputestdata/x86-cpuid-Pentium-P6100-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Pentium-P6100-host.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E7-4820-guest.xml | 1 +
tests/cputestdata/x86-cpuid-Xeon-E7-4820-host.xml | 1 +
38 files changed, 42 insertions(+)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 68cb500..a623f37 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -188,6 +188,11 @@
<cpuid eax_in='0x01' ecx='0x80000000'/>
</feature>
+ <!-- Termal Power and Management -->
+ <feature name='arat'>
+ <cpuid eax_in='0x06' eax='0x00000004'/>
+ </feature>
+
<!-- cpuid function 0x7 ecx 0x0 features -->
<feature name='fsgsbase'>
<cpuid eax_in='0x07' ebx='0x00000001'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml
index 6e60106..4c249eb 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2500-guest.xml
@@ -20,6 +20,7 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml
index e862e82..a604acb 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2500-host.xml
@@ -20,6 +20,7 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='arat'/>
<feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml
index 27d9f35..980cf74 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2500-json.xml
@@ -5,6 +5,7 @@
<feature policy='require' name='ss'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='xsaveopt'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml
index 6e60106..4c249eb 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2540M-guest.xml
@@ -20,6 +20,7 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml
index e862e82..a604acb 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2540M-host.xml
@@ -20,6 +20,7 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='arat'/>
<feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml
index 27d9f35..980cf74 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-2540M-json.xml
@@ -5,6 +5,7 @@
<feature policy='require' name='ss'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='xsaveopt'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-4670T-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-4670T-guest.xml
index 66ef1e3..9c93995 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-4670T-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-4670T-guest.xml
@@ -21,6 +21,7 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml
index 31211c1..b9f95ad 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-4670T-host.xml
@@ -21,6 +21,7 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
index cb8bd76..363601a 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
@@ -21,6 +21,7 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
index 1f24dd8..fb231ae 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
@@ -21,6 +21,7 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='mpx'/>
<feature name='clflushopt'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
index a17b42a..94de218 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
@@ -6,6 +6,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml
index 6e60106..4c249eb 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-2600-guest.xml
@@ -20,6 +20,7 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml
index e862e82..a604acb 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-2600-host.xml
@@ -20,6 +20,7 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='arat'/>
<feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml
index 61c058f..776001f 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3520M-guest.xml
@@ -19,6 +19,7 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml
index 6c8a0f8..a23c651 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3520M-host.xml
@@ -19,6 +19,7 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='arat'/>
<feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3740QM-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3740QM-guest.xml
index f5125d4..90957e9 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3740QM-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3740QM-guest.xml
@@ -19,5 +19,6 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3740QM-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3740QM-host.xml
index 80d3a9d..9fec131 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3740QM-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3740QM-host.xml
@@ -19,5 +19,6 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='arat'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml
index 61c058f..776001f 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3770-guest.xml
@@ -19,6 +19,7 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml
index 6c8a0f8..a23c651 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-3770-host.xml
@@ -19,6 +19,7 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='osxsave'/>
+ <feature name='arat'/>
<feature name='xsaveopt'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
index d06e8d9..b2aac64 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-4600U-guest.xml
@@ -21,6 +21,7 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
index fc033e6..fae8e8d 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-4600U-host.xml
@@ -21,6 +21,7 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
index b52e463..5fa3146 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-4600U-json.xml
@@ -7,6 +7,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
index 91370c2..cd7b4bb 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
@@ -21,6 +21,7 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
index 276b5af..9b24941 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-host.xml
@@ -21,6 +21,7 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
index 67b48ec..8a6b828 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
@@ -7,6 +7,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Opteron-6234-json.xml
b/tests/cputestdata/x86-cpuid-Opteron-6234-json.xml
index dded6fa..2e28342 100644
--- a/tests/cputestdata/x86-cpuid-Opteron-6234-json.xml
+++ b/tests/cputestdata/x86-cpuid-Opteron-6234-json.xml
@@ -5,6 +5,7 @@
<feature policy='require' name='x2apic'/>
<feature policy='require' name='tsc-deadline'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mmxext'/>
<feature policy='require' name='fxsr_opt'/>
diff --git a/tests/cputestdata/x86-cpuid-Pentium-P6100-guest.xml
b/tests/cputestdata/x86-cpuid-Pentium-P6100-guest.xml
index 5ef6e24..f893f9f 100644
--- a/tests/cputestdata/x86-cpuid-Pentium-P6100-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Pentium-P6100-guest.xml
@@ -17,6 +17,7 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='popcnt'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='rdtscp'/>
<feature policy='require' name='lahf_lm'/>
<feature policy='require' name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Pentium-P6100-host.xml
b/tests/cputestdata/x86-cpuid-Pentium-P6100-host.xml
index 8ae2493..3975aa7 100644
--- a/tests/cputestdata/x86-cpuid-Pentium-P6100-host.xml
+++ b/tests/cputestdata/x86-cpuid-Pentium-P6100-host.xml
@@ -17,6 +17,7 @@
<feature name='pdcm'/>
<feature name='pcid'/>
<feature name='popcnt'/>
+ <feature name='arat'/>
<feature name='rdtscp'/>
<feature name='lahf_lm'/>
<feature name='invtsc'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
index cb8bd76..363601a 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
@@ -21,6 +21,7 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
index 1f24dd8..fb231ae 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
@@ -21,6 +21,7 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='mpx'/>
<feature name='clflushopt'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
index 5b9cffe..3d12f40 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
@@ -7,6 +7,7 @@
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
index e5f69e8..9ff63d7 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-guest.xml
@@ -22,6 +22,7 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
index 1393832..a651683 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2630-host.xml
@@ -22,6 +22,7 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
index e5f69e8..9ff63d7 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-guest.xml
@@ -22,6 +22,7 @@
<feature policy='require' name='osxsave'/>
<feature policy='require' name='f16c'/>
<feature policy='require' name='rdrand'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
index 1393832..a651683 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
@@ -22,6 +22,7 @@
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
+ <feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E7-4820-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E7-4820-guest.xml
index 55edce9..81bf8c8 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E7-4820-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E7-4820-guest.xml
@@ -20,6 +20,7 @@
<feature policy='require' name='pdcm'/>
<feature policy='require' name='pcid'/>
<feature policy='require' name='dca'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='invtsc'/>
<feature policy='disable' name='tsc-deadline'/>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E7-4820-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E7-4820-host.xml
index 4a033ae..5290247 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E7-4820-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E7-4820-host.xml
@@ -22,6 +22,7 @@
<feature name='pcid'/>
<feature name='dca'/>
<feature name='x2apic'/>
+ <feature name='arat'/>
<feature name='pdpe1gb'/>
<feature name='rdtscp'/>
<feature name='invtsc'/>
--
2.8.4
2:29 p.m.
New subject: [libvirt] [PATCH 07/10] cpu: Add ARAT x86 CPU feature
On Wed, Jun 08, 2016 at 14:41:35 +0200, Jiri Denemark wrote:
Implemented in QEMU by commit
28b8e4d0bf93ba176b4b7be819d537383c5a9060.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 5 +++++
[...]
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 68cb500..a623f37 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -188,6 +188,11 @@
<cpuid eax_in='0x01' ecx='0x80000000'/>
</feature>
+ <!-- Termal Power and Management -->
+ <feature name='arat'>
+ <cpuid eax_in='0x06' eax='0x00000004'/>
+ </feature>
+
<!-- cpuid function 0x7 ecx 0x0 features -->
Hmm, mixing of hex data with leaf names?
<feature name='fsgsbase'>
<cpuid eax_in='0x07' ebx='0x00000001'/>
ACK
8:41 p.m.
New subject: [libvirt] [PATCH 08/10] cpu: Add Skylake-Client x86 CPU model
The CPU model was implemented in QEMU by commit TBD (it's on x86-next
branch waiting for a pull request).
The change to i7-5600U is wrong since it's a 5th generation CPU, i.e.,
Broadwell rather than Skylake, but that's just the result of our CPU
detection code (which will be fixed by a later patch).
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 67 ++++++++++++++++++++++
tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml | 11 +---
tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml | 11 +---
tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml | 11 +---
.../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 11 ++--
tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml | 11 ++--
tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml | 11 +---
tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml | 11 +---
tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml | 11 +---
9 files changed, 81 insertions(+), 74 deletions(-)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index a623f37..0918f75 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -1161,6 +1161,73 @@
<feature name='xsave'/>
</model>
+ <model name='Skylake-Client'>
+ <vendor name='Intel'/>
+ <feature name='3dnowprefetch'/>
+ <feature name='abm'/>
+ <feature name='adx'/>
+ <feature name='aes'/>
+ <feature name='apic'/>
+ <feature name='arat'/>
+ <feature name='avx'/>
+ <feature name='avx2'/>
+ <feature name='bmi1'/>
+ <feature name='bmi2'/>
+ <feature name='clflush'/>
+ <feature name='cmov'/>
+ <feature name='cx16'/>
+ <feature name='cx8'/>
+ <feature name='de'/>
+ <feature name='erms'/>
+ <feature name='f16c'/>
+ <feature name='fma'/>
+ <feature name='fpu'/>
+ <feature name='fsgsbase'/>
+ <feature name='fxsr'/>
+ <feature name='hle'/>
+ <feature name='invpcid'/>
+ <feature name='lahf_lm'/>
+ <feature name='lm'/>
+ <feature name='mca'/>
+ <feature name='mce'/>
+ <feature name='mmx'/>
+ <feature name='movbe'/>
+ <feature name='mpx'/>
+ <feature name='msr'/>
+ <feature name='mtrr'/>
+ <feature name='nx'/>
+ <feature name='pae'/>
+ <feature name='pat'/>
+ <feature name='pcid'/>
+ <feature name='pclmuldq'/>
+ <feature name='pge'/>
+ <feature name='pni'/>
+ <feature name='popcnt'/>
+ <feature name='pse'/>
+ <feature name='pse36'/>
+ <feature name='rdrand'/>
+ <feature name='rdseed'/>
+ <feature name='rdtscp'/>
+ <feature name='rtm'/>
+ <feature name='sep'/>
+ <feature name='smap'/>
+ <feature name='smep'/>
+ <feature name='sse'/>
+ <feature name='sse2'/>
+ <feature name='sse4.1'/>
+ <feature name='sse4.2'/>
+ <feature name='ssse3'/>
+ <feature name='syscall'/>
+ <feature name='tsc'/>
+ <feature name='tsc-deadline'/>
+ <feature name='vme'/>
+ <feature name='x2apic'/>
+ <feature name='xgetbv1'/>
+ <feature name='xsave'/>
+ <feature name='xsavec'/>
+ <feature name='xsaveopt'/>
+ </model>
+
<!-- AMD CPUs -->
<model name='athlon'>
<vendor name='AMD'/>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
index 363601a..0ab5a7a 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml
@@ -1,8 +1,7 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>Broadwell</model>
+ <model fallback='forbid'>Skylake-Client</model>
<vendor>Intel</vendor>
- <feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
@@ -19,17 +18,9 @@
<feature policy='require' name='xtpr'/>
<feature policy='require' name='pdcm'/>
<feature policy='require' name='osxsave'/>
- <feature policy='require' name='f16c'/>
- <feature policy='require' name='rdrand'/>
- <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
- <feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
- <feature policy='require' name='xsaveopt'/>
- <feature policy='require' name='xsavec'/>
- <feature policy='require' name='xgetbv1'/>
<feature policy='require' name='xsaves'/>
<feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
index fb231ae..c799394 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml
@@ -1,8 +1,7 @@
<cpu>
<arch>x86_64</arch>
- <model>Broadwell</model>
+ <model>Skylake-Client</model>
<vendor>Intel</vendor>
- <feature name='vme'/>
<feature name='ds'/>
<feature name='acpi'/>
<feature name='ss'/>
@@ -19,17 +18,9 @@
<feature name='xtpr'/>
<feature name='pdcm'/>
<feature name='osxsave'/>
- <feature name='f16c'/>
- <feature name='rdrand'/>
- <feature name='arat'/>
<feature name='tsc_adjust'/>
- <feature name='mpx'/>
<feature name='clflushopt'/>
- <feature name='xsaveopt'/>
- <feature name='xsavec'/>
- <feature name='xgetbv1'/>
<feature name='xsaves'/>
<feature name='pdpe1gb'/>
- <feature name='abm'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
b/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
index 94de218..171b482 100644
--- a/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml
@@ -1,19 +1,10 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>Broadwell</model>
- <feature policy='require' name='vme'/>
+ <model fallback='forbid'>Skylake-Client</model>
<feature policy='require' name='ss'/>
- <feature policy='require' name='f16c'/>
- <feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
- <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
- <feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
- <feature policy='require' name='xsaveopt'/>
- <feature policy='require' name='xsavec'/>
- <feature policy='require' name='xgetbv1'/>
<feature policy='require' name='xsaves'/>
<feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
index cd7b4bb..78bc0a6 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
@@ -1,8 +1,7 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>Broadwell</model>
+ <model fallback='forbid'>Skylake-Client</model>
<vendor>Intel</vendor>
- <feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
@@ -19,12 +18,10 @@
<feature policy='require' name='xtpr'/>
<feature policy='require' name='pdcm'/>
<feature policy='require' name='osxsave'/>
- <feature policy='require' name='f16c'/>
- <feature policy='require' name='rdrand'/>
- <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
- <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
+ <feature policy='disable' name='mpx'/>
+ <feature policy='disable' name='xsavec'/>
+ <feature policy='disable' name='xgetbv1'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
index 8a6b828..1597971 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml
@@ -1,15 +1,12 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>Broadwell</model>
- <feature policy='require' name='vme'/>
+ <model fallback='forbid'>Skylake-Client</model>
<feature policy='require' name='ss'/>
<feature policy='require' name='vmx'/>
- <feature policy='require' name='f16c'/>
- <feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
- <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
- <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
+ <feature policy='disable' name='mpx'/>
+ <feature policy='disable' name='xsavec'/>
+ <feature policy='disable' name='xgetbv1'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
index 363601a..0ab5a7a 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml
@@ -1,8 +1,7 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>Broadwell</model>
+ <model fallback='forbid'>Skylake-Client</model>
<vendor>Intel</vendor>
- <feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
@@ -19,17 +18,9 @@
<feature policy='require' name='xtpr'/>
<feature policy='require' name='pdcm'/>
<feature policy='require' name='osxsave'/>
- <feature policy='require' name='f16c'/>
- <feature policy='require' name='rdrand'/>
- <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
- <feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
- <feature policy='require' name='xsaveopt'/>
- <feature policy='require' name='xsavec'/>
- <feature policy='require' name='xgetbv1'/>
<feature policy='require' name='xsaves'/>
<feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
index fb231ae..c799394 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml
@@ -1,8 +1,7 @@
<cpu>
<arch>x86_64</arch>
- <model>Broadwell</model>
+ <model>Skylake-Client</model>
<vendor>Intel</vendor>
- <feature name='vme'/>
<feature name='ds'/>
<feature name='acpi'/>
<feature name='ss'/>
@@ -19,17 +18,9 @@
<feature name='xtpr'/>
<feature name='pdcm'/>
<feature name='osxsave'/>
- <feature name='f16c'/>
- <feature name='rdrand'/>
- <feature name='arat'/>
<feature name='tsc_adjust'/>
- <feature name='mpx'/>
<feature name='clflushopt'/>
- <feature name='xsaveopt'/>
- <feature name='xsavec'/>
- <feature name='xgetbv1'/>
<feature name='xsaves'/>
<feature name='pdpe1gb'/>
- <feature name='abm'/>
<feature name='invtsc'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
index 3d12f40..7a8246e 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml
@@ -1,19 +1,10 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>Broadwell</model>
- <feature policy='require' name='vme'/>
+ <model fallback='forbid'>Skylake-Client</model>
<feature policy='require' name='ss'/>
<feature policy='require' name='vmx'/>
- <feature policy='require' name='f16c'/>
- <feature policy='require' name='rdrand'/>
<feature policy='require' name='hypervisor'/>
- <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
- <feature policy='require' name='mpx'/>
<feature policy='require' name='clflushopt'/>
- <feature policy='require' name='xsaveopt'/>
- <feature policy='require' name='xsavec'/>
- <feature policy='require' name='xgetbv1'/>
<feature policy='require' name='pdpe1gb'/>
- <feature policy='require' name='abm'/>
</cpu>
--
2.8.4
3:28 p.m.
New subject: [libvirt] [PATCH 08/10] cpu: Add Skylake-Client x86 CPU model
On Wed, Jun 08, 2016 at 14:41:36 +0200, Jiri Denemark wrote:
The CPU model was implemented in QEMU by commit TBD (it's on
x86-next
branch waiting for a pull request).
The change to i7-5600U is wrong since it's a 5th generation CPU, i.e.,
Broadwell rather than Skylake, but that's just the result of our CPU
detection code (which will be fixed by a later patch).
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 67 ++++++++++++++++++++++
tests/cputestdata/x86-cpuid-Core-i5-6600-guest.xml | 11 +---
tests/cputestdata/x86-cpuid-Core-i5-6600-host.xml | 11 +---
tests/cputestdata/x86-cpuid-Core-i5-6600-json.xml | 11 +---
.../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 11 ++--
tests/cputestdata/x86-cpuid-Core-i7-5600U-json.xml | 11 ++--
tests/cputestdata/x86-cpuid-Xeon-E3-1245-guest.xml | 11 +---
tests/cputestdata/x86-cpuid-Xeon-E3-1245-host.xml | 11 +---
tests/cputestdata/x86-cpuid-Xeon-E3-1245-json.xml | 11 +---
9 files changed, 81 insertions(+), 74 deletions(-)
ACK
8:41 p.m.
New subject: [libvirt] [PATCH 09/10] cputest: Rename nehalem-force to penryn-force
The actual CPU model in the data files is Penryn which makes the file
name look rather strange. Well, one of them contains Nehalem, but that's
a bug which will be fixed in the following patch.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
tests/cputest.c | 4 ++--
...host+nehalem-force-result.xml => x86-host+penryn-force-result.xml} | 0
tests/cputestdata/{x86-nehalem-force.xml => x86-penryn-force.xml} | 0
3 files changed, 2 insertions(+), 2 deletions(-)
rename tests/cputestdata/{x86-host+nehalem-force-result.xml =>
x86-host+penryn-force-result.xml} (100%)
rename tests/cputestdata/{x86-nehalem-force.xml => x86-penryn-force.xml} (100%)
diff --git a/tests/cputest.c b/tests/cputest.c
index b0e63b3..99f4ed3 100644
--- a/tests/cputest.c
+++ b/tests/cputest.c
@@ -745,7 +745,7 @@ mymain(void)
DO_TEST_COMPARE("x86", "host", "guest",
VIR_CPU_COMPARE_SUPERSET);
DO_TEST_COMPARE("x86", "host", "pentium3-amd",
VIR_CPU_COMPARE_INCOMPATIBLE);
DO_TEST_COMPARE("x86", "host-amd", "pentium3-amd",
VIR_CPU_COMPARE_SUPERSET);
- DO_TEST_COMPARE("x86", "host-worse", "nehalem-force",
VIR_CPU_COMPARE_IDENTICAL);
+ DO_TEST_COMPARE("x86", "host-worse", "penryn-force",
VIR_CPU_COMPARE_IDENTICAL);
DO_TEST_COMPARE("x86", "host-SandyBridge",
"exact-force-Haswell", VIR_CPU_COMPARE_IDENTICAL);
DO_TEST_COMPARE("ppc64", "host", "guest-strict",
VIR_CPU_COMPARE_IDENTICAL);
@@ -816,7 +816,7 @@ mymain(void)
DO_TEST_GUESTDATA("x86", "host-better", "pentium3",
NULL, "core2duo", 0);
DO_TEST_GUESTDATA("x86", "host-worse", "guest", NULL,
NULL, 0);
DO_TEST_GUESTDATA("x86", "host", "strict-force-extra",
NULL, NULL, 0);
- DO_TEST_GUESTDATA("x86", "host", "nehalem-force", NULL,
NULL, 0);
+ DO_TEST_GUESTDATA("x86", "host", "penryn-force", NULL,
NULL, 0);
DO_TEST_GUESTDATA("x86", "host", "guest", model486,
NULL, 0);
DO_TEST_GUESTDATA("x86", "host", "guest", models, NULL,
0);
DO_TEST_GUESTDATA("x86", "host", "guest", models,
"Penryn", 0);
diff --git a/tests/cputestdata/x86-host+nehalem-force-result.xml
b/tests/cputestdata/x86-host+penryn-force-result.xml
similarity index 100%
rename from tests/cputestdata/x86-host+nehalem-force-result.xml
rename to tests/cputestdata/x86-host+penryn-force-result.xml
diff --git a/tests/cputestdata/x86-nehalem-force.xml
b/tests/cputestdata/x86-penryn-force.xml
similarity index 100%
rename from tests/cputestdata/x86-nehalem-force.xml
rename to tests/cputestdata/x86-penryn-force.xml
--
2.8.4
2:40 p.m.
New subject: [libvirt] [PATCH 09/10] cputest: Rename nehalem-force to penryn-force
On Wed, Jun 08, 2016 at 14:41:37 +0200, Jiri Denemark wrote:
The actual CPU model in the data files is Penryn which makes the
file
name look rather strange. Well, one of them contains Nehalem, but that's
a bug which will be fixed in the following patch.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
tests/cputest.c | 4 ++--
...host+nehalem-force-result.xml => x86-host+penryn-force-result.xml} | 0
tests/cputestdata/{x86-nehalem-force.xml => x86-penryn-force.xml} | 0
3 files changed, 2 insertions(+), 2 deletions(-)
rename tests/cputestdata/{x86-host+nehalem-force-result.xml =>
x86-host+penryn-force-result.xml} (100%)
rename tests/cputestdata/{x86-nehalem-force.xml => x86-penryn-force.xml} (100%)
ACK
8:41 p.m.
New subject: [libvirt] [PATCH 10/10] cpu_x86: Use signature in CPU detection code
Our current detection code uses just the number of CPU features which
need to be added/removed from the CPU model to fully describe the CPUID
data. The smallest number wins. But this may sometimes generate wrong
results as one can see from the fixed test cases. This patch modifies
the algorithm to prefer the CPU model with matching signature even if
this model results in a longer list of additional features.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 16 +++
src/cpu/cpu_x86.c | 146 +++++++++++++++++++--
.../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 11 +-
tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Core2-E6850-host.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-5110-host.xml | 5 +-
tests/cputestdata/x86-host+penryn-force-result.xml | 4 +-
8 files changed, 174 insertions(+), 23 deletions(-)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 0918f75..bf2dfc6 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -717,6 +717,7 @@
<!-- Intel CPU models -->
<model name='Conroe'>
+ <signature family='6' model='15'/>
<vendor name='Intel'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -748,6 +749,7 @@
</model>
<model name='Penryn'>
+ <signature family='6' model='23'/>
<vendor name='Intel'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -781,6 +783,7 @@
</model>
<model name='Nehalem'>
+ <signature family='6' model='26'/>
<vendor name='Intel'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -816,6 +819,7 @@
</model>
<model name='Westmere'>
+ <signature family='6' model='44'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -852,6 +856,7 @@
</model>
<model name='SandyBridge'>
+ <signature family='6' model='42'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -894,6 +899,7 @@
</model>
<model name='IvyBridge'>
+ <signature family='6' model='58'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -942,6 +948,7 @@
</model>
<model name='Haswell-noTSX'>
+ <signature family='6' model='60'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -994,6 +1001,7 @@
</model>
<model name='Haswell'>
+ <signature family='6' model='60'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -1048,6 +1056,7 @@
</model>
<model name='Broadwell-noTSX'>
+ <signature family='6' model='61'/>
<vendor name='Intel'/>
<feature name='3dnowprefetch'/>
<feature name='adx'/>
@@ -1104,6 +1113,7 @@
</model>
<model name='Broadwell'>
+ <signature family='6' model='61'/>
<vendor name='Intel'/>
<feature name='3dnowprefetch'/>
<feature name='adx'/>
@@ -1162,6 +1172,7 @@
</model>
<model name='Skylake-Client'>
+ <signature family='6' model='94'/>
<vendor name='Intel'/>
<feature name='3dnowprefetch'/>
<feature name='abm'/>
@@ -1292,6 +1303,7 @@
</model>
<model name='Opteron_G1'>
+ <signature family='15' model='6'/>
<vendor name='AMD'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -1321,6 +1333,7 @@
</model>
<model name='Opteron_G2'>
+ <signature family='15' model='6'/>
<vendor name='AMD'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -1354,6 +1367,7 @@
</model>
<model name='Opteron_G3'>
+ <signature family='15' model='6'/>
<vendor name='AMD'/>
<feature name='abm'/>
<feature name='apic'/>
@@ -1392,6 +1406,7 @@
</model>
<model name='Opteron_G4'>
+ <signature family='21' model='1'/>
<vendor name='AMD'/>
<feature name='3dnowprefetch'/>
<feature name='abm'/>
@@ -1440,6 +1455,7 @@
</model>
<model name='Opteron_G5'>
+ <signature family='21' model='2'/>
<vendor name='AMD'/>
<feature name='3dnowprefetch'/>
<feature name='abm'/>
diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 6823a27..b1a4b93 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -135,6 +135,7 @@ typedef virCPUx86Model *virCPUx86ModelPtr;
struct _virCPUx86Model {
char *name;
virCPUx86VendorPtr vendor;
+ uint32_t signature;
virCPUx86Data data;
};
@@ -493,6 +494,75 @@ x86DataToVendor(const virCPUx86Data *data,
}
+static uint32_t
+x86MakeSignature(unsigned int family,
+ unsigned int model)
+{
+ uint32_t sig = 0;
+
+ /*
+ * CPU signature (eax from 0x1 CPUID leaf):
+ *
+ * |31 .. 28|27 .. 20|19 .. 16|15 .. 14|13 .. 12|11 .. 8|7 .. 4|3 .. 0|
+ * | R | extFam | extMod | R | PType | Fam | Mod | Step |
+ *
+ * R reserved
+ * extFam extended family (valid only if Fam == 0xf)
+ * extMod extended model
+ * PType processor type
+ * Fam family
+ * Mod model
+ * Step stepping
+ *
+ * family = eax[27:20] + eax[11:8]
+ * model = eax[19:16] << 4 + eax[7:4]
+ */
+
+ /* extFam */
+ if (family > 0xf) {
+ sig |= (family - 0xf) << 20;
+ family = 0xf;
+ }
+
+ /* extMod */
+ sig |= (model >> 4) << 16;
+
+ /* Fam */
+ sig |= family << 8;
+
+ /* Mod */
+ sig |= (model & 0xf) << 4;
+
+ return sig;
+}
+
+
+/* Mask out irrelevant bits (R and Step) from processor signature. */
+#define SIGNATURE_MASK 0x0fff3ff0
+
+static uint32_t
+x86DataToSignature(const virCPUx86Data *data)
+{
+ virCPUx86CPUID leaf1 = { .eax_in = 0x1 };
+ virCPUx86CPUID *cpuid;
+
+ if (!(cpuid = x86DataCpuid(data, &leaf1)))
+ return 0;
+
+ return cpuid->eax & SIGNATURE_MASK;
+}
+
+
+static int
+x86DataAddSignature(virCPUx86Data *data,
+ uint32_t signature)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x1, .eax = signature };
+
+ return virCPUx86DataAddCPUID(data, &cpuid);
+}
+
+
static virCPUDefPtr
x86DataToCPU(const virCPUx86Data *data,
virCPUx86ModelPtr model,
@@ -898,6 +968,7 @@ x86ModelCopy(virCPUx86ModelPtr model)
}
copy->vendor = model->vendor;
+ copy->signature = model->signature;
return copy;
}
@@ -1093,6 +1164,34 @@ x86ModelParse(xmlXPathContextPtr ctxt,
goto error;
}
+ if (virXPathBoolean("boolean(./signature)", ctxt)) {
+ unsigned int sigFamily = 0;
+ unsigned int sigModel = 0;
+ int rc;
+
+ rc = virXPathUInt("string(./signature/@family)", ctxt,
&sigFamily);
+ if (rc < 0) {
+ if (rc == -2 || (rc == 0 && !sigFamily)) {
+ virReportError(VIR_ERR_INTERNAL_ERROR,
+ _("Invalid CPU family in model %s"),
+ model->name);
+ }
+ goto cleanup;
+ }
+
+ rc = virXPathUInt("string(./signature/@model)", ctxt, &sigModel);
+ if (rc < 0) {
+ if (rc == -2 || (rc == 0 && !sigModel)) {
+ virReportError(VIR_ERR_INTERNAL_ERROR,
+ _("Invalid CPU model in model %s"),
+ model->name);
+ }
+ goto cleanup;
+ }
+
+ model->signature = x86MakeSignature(sigFamily, sigModel);
+ }
+
if (virXPathBoolean("boolean(./vendor)", ctxt)) {
vendor = virXPathString("string(./vendor/@name)", ctxt);
if (!vendor) {
@@ -1480,6 +1579,9 @@ x86Compute(virCPUDefPtr host,
&host_model->vendor->cpuid) < 0)
goto error;
+ if (x86DataAddSignature(&guest_model->data, host_model->signature) <
0)
+ goto error;
+
if (cpu->type == VIR_CPU_TYPE_GUEST
&& cpu->match == VIR_CPU_MATCH_EXACT)
x86DataSubtract(&guest_model->data, &diff->data);
@@ -1549,16 +1651,19 @@ x86GuestData(virCPUDefPtr host,
/*
- * Checks whether cpuCandidate is a better fit for the CPU data than the
- * currently selected one from cpuCurrent.
+ * Checks whether a candidate model is a better fit for the CPU data than the
+ * current model.
*
- * Returns 0 if cpuCurrent is better,
- * 1 if cpuCandidate is better,
- * 2 if cpuCandidate is the best one (search should stop now).
+ * Returns 0 if current is better,
+ * 1 if candidate is better,
+ * 2 if candidate is the best one (search should stop now).
*/
static int
-x86DecodeUseCandidate(virCPUDefPtr cpuCurrent,
+x86DecodeUseCandidate(virCPUx86ModelPtr current,
+ virCPUDefPtr cpuCurrent,
+ virCPUx86ModelPtr candidate,
virCPUDefPtr cpuCandidate,
+ uint32_t signature,
const char *preferred,
bool checkPolicy)
{
@@ -1578,9 +1683,26 @@ x86DecodeUseCandidate(virCPUDefPtr cpuCurrent,
if (!cpuCurrent)
return 1;
+ /* Ideally we want to select a model with family/model equal to
+ * family/model of the real CPU. Once we found such model, we only
+ * consider candidates with matching family/model.
+ */
+ if (signature &&
+ current->signature == signature &&
+ candidate->signature != signature)
+ return 0;
+
if (cpuCurrent->nfeatures > cpuCandidate->nfeatures)
return 1;
+ /* Prefer a candidate with matching signature even though it would
+ * result in longer list of features.
+ */
+ if (signature &&
+ candidate->signature == signature &&
+ current->signature != signature)
+ return 1;
+
return 0;
}
@@ -1597,11 +1719,12 @@ x86Decode(virCPUDefPtr cpu,
virCPUx86MapPtr map;
virCPUx86ModelPtr candidate;
virCPUDefPtr cpuCandidate;
+ virCPUx86ModelPtr model = NULL;
virCPUDefPtr cpuModel = NULL;
virCPUx86Data copy = VIR_CPU_X86_DATA_INIT;
virCPUx86Data features = VIR_CPU_X86_DATA_INIT;
- const virCPUx86Data *cpuData = NULL;
virCPUx86VendorPtr vendor;
+ uint32_t signature;
ssize_t i;
int rc;
@@ -1612,6 +1735,7 @@ x86Decode(virCPUDefPtr cpu,
return -1;
vendor = x86DataToVendor(data, map);
+ signature = x86DataToSignature(data);
/* Walk through the CPU models in reverse order to check newest
* models first.
@@ -1650,11 +1774,13 @@ x86Decode(virCPUDefPtr cpu,
goto cleanup;
cpuCandidate->type = cpu->type;
- if ((rc = x86DecodeUseCandidate(cpuModel, cpuCandidate, preferred,
+ if ((rc = x86DecodeUseCandidate(model, cpuModel,
+ candidate, cpuCandidate,
+ signature, preferred,
cpu->type == VIR_CPU_TYPE_HOST))) {
virCPUDefFree(cpuModel);
cpuModel = cpuCandidate;
- cpuData = &candidate->data;
+ model = candidate;
if (rc == 2)
break;
} else {
@@ -1686,7 +1812,7 @@ x86Decode(virCPUDefPtr cpu,
}
if (flags & VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES) {
- if (x86DataCopy(©, cpuData) < 0 ||
+ if (x86DataCopy(©, &model->data) < 0 ||
x86DataFromCPUFeatures(&features, cpuModel, map) < 0)
goto cleanup;
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
index 78bc0a6..cd7b4bb 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
@@ -1,7 +1,8 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>Skylake-Client</model>
+ <model fallback='forbid'>Broadwell</model>
<vendor>Intel</vendor>
+ <feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
@@ -18,10 +19,12 @@
<feature policy='require' name='xtpr'/>
<feature policy='require' name='pdcm'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='f16c'/>
+ <feature policy='require' name='rdrand'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
+ <feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
- <feature policy='disable' name='mpx'/>
- <feature policy='disable' name='xsavec'/>
- <feature policy='disable' name='xgetbv1'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml
b/tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml
index d9df03e..dfcbe24 100644
--- a/tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml
@@ -1,7 +1,8 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>core2duo</model>
+ <model fallback='forbid'>Conroe</model>
<vendor>Intel</vendor>
+ <feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
@@ -9,6 +10,7 @@
<feature policy='require' name='tm'/>
<feature policy='require' name='pbe'/>
<feature policy='require' name='dtes64'/>
+ <feature policy='require' name='monitor'/>
<feature policy='require' name='ds_cpl'/>
<feature policy='require' name='vmx'/>
<feature policy='require' name='smx'/>
@@ -17,5 +19,4 @@
<feature policy='require' name='cx16'/>
<feature policy='require' name='xtpr'/>
<feature policy='require' name='pdcm'/>
- <feature policy='require' name='lahf_lm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core2-E6850-host.xml
b/tests/cputestdata/x86-cpuid-Core2-E6850-host.xml
index c5ca1cb..e7ddc39 100644
--- a/tests/cputestdata/x86-cpuid-Core2-E6850-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core2-E6850-host.xml
@@ -1,7 +1,8 @@
<cpu>
<arch>x86_64</arch>
- <model>core2duo</model>
+ <model>Conroe</model>
<vendor>Intel</vendor>
+ <feature name='vme'/>
<feature name='ds'/>
<feature name='acpi'/>
<feature name='ss'/>
@@ -9,6 +10,7 @@
<feature name='tm'/>
<feature name='pbe'/>
<feature name='dtes64'/>
+ <feature name='monitor'/>
<feature name='ds_cpl'/>
<feature name='vmx'/>
<feature name='smx'/>
@@ -17,5 +19,4 @@
<feature name='cx16'/>
<feature name='xtpr'/>
<feature name='pdcm'/>
- <feature name='lahf_lm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml
index 0b9e3f6..28d112b 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml
@@ -1,7 +1,8 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>core2duo</model>
+ <model fallback='forbid'>Conroe</model>
<vendor>Intel</vendor>
+ <feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
@@ -9,6 +10,7 @@
<feature policy='require' name='tm'/>
<feature policy='require' name='pbe'/>
<feature policy='require' name='dtes64'/>
+ <feature policy='require' name='monitor'/>
<feature policy='require' name='ds_cpl'/>
<feature policy='require' name='vmx'/>
<feature policy='require' name='tm2'/>
@@ -16,5 +18,4 @@
<feature policy='require' name='xtpr'/>
<feature policy='require' name='pdcm'/>
<feature policy='require' name='dca'/>
- <feature policy='require' name='lahf_lm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-5110-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-5110-host.xml
index 88c61c4..ca3a84c 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-5110-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-5110-host.xml
@@ -1,7 +1,8 @@
<cpu>
<arch>x86_64</arch>
- <model>core2duo</model>
+ <model>Conroe</model>
<vendor>Intel</vendor>
+ <feature name='vme'/>
<feature name='ds'/>
<feature name='acpi'/>
<feature name='ss'/>
@@ -9,6 +10,7 @@
<feature name='tm'/>
<feature name='pbe'/>
<feature name='dtes64'/>
+ <feature name='monitor'/>
<feature name='ds_cpl'/>
<feature name='vmx'/>
<feature name='tm2'/>
@@ -16,5 +18,4 @@
<feature name='xtpr'/>
<feature name='pdcm'/>
<feature name='dca'/>
- <feature name='lahf_lm'/>
</cpu>
diff --git a/tests/cputestdata/x86-host+penryn-force-result.xml
b/tests/cputestdata/x86-host+penryn-force-result.xml
index 000bc0d..ef0a2c0 100644
--- a/tests/cputestdata/x86-host+penryn-force-result.xml
+++ b/tests/cputestdata/x86-host+penryn-force-result.xml
@@ -1,4 +1,6 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='allow'>Nehalem</model>
+ <model fallback='allow'>Penryn</model>
+ <feature policy='require' name='sse4.2'/>
+ <feature policy='require' name='popcnt'/>
</cpu>
--
2.8.4
3:17 p.m.
New subject: [libvirt] [PATCH 10/10] cpu_x86: Use signature in CPU detection code
On Wed, Jun 08, 2016 at 14:41:38 +0200, Jiri Denemark wrote:
Our current detection code uses just the number of CPU features
which
need to be added/removed from the CPU model to fully describe the CPUID
data. The smallest number wins. But this may sometimes generate wrong
results as one can see from the fixed test cases. This patch modifies
the algorithm to prefer the CPU model with matching signature even if
this model results in a longer list of additional features.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 16 +++
src/cpu/cpu_x86.c | 146 +++++++++++++++++++--
.../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 11 +-
tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Core2-E6850-host.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-5110-host.xml | 5 +-
tests/cputestdata/x86-host+penryn-force-result.xml | 4 +-
8 files changed, 174 insertions(+), 23 deletions(-)
[...]
diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 6823a27..b1a4b93 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -493,6 +494,75 @@ x86DataToVendor(const virCPUx86Data *data,
}
+static uint32_t
+x86MakeSignature(unsigned int family,
+ unsigned int model)
+{
+ uint32_t sig = 0;
+
+ /*
+ * CPU signature (eax from 0x1 CPUID leaf):
+ *
+ * |31 .. 28|27 .. 20|19 .. 16|15 .. 14|13 .. 12|11 .. 8|7 .. 4|3 .. 0|
+ * | R | extFam | extMod | R | PType | Fam | Mod | Step |
+ *
+ * R reserved
+ * extFam extended family (valid only if Fam == 0xf)
+ * extMod extended model
+ * PType processor type
+ * Fam family
+ * Mod model
+ * Step stepping
+ *
+ * family = eax[27:20] + eax[11:8]
+ * model = eax[19:16] << 4 + eax[7:4]
+ */
+
+ /* extFam */
+ if (family > 0xf) {
+ sig |= (family - 0xf) << 20;
+ family = 0xf;
+ }
+
+ /* extMod */
+ sig |= (model >> 4) << 16;
+
+ /* Fam */
+ sig |= family << 8;
+
+ /* Mod */
+ sig |= (model & 0xf) << 4;
+
+ return sig;
+}
+
+
+/* Mask out irrelevant bits (R and Step) from processor signature. */
+#define SIGNATURE_MASK 0x0fff3ff0
This mask is not removing bits 12 and 13 corresponding to the processor
type, but we don't take them into account in our code. If that's
intentional please note it in the comment
+
+static uint32_t
+x86DataToSignature(const virCPUx86Data *data)
+{
+ virCPUx86CPUID leaf1 = { .eax_in = 0x1 };
+ virCPUx86CPUID *cpuid;
+
+ if (!(cpuid = x86DataCpuid(data, &leaf1)))
+ return 0;
+
+ return cpuid->eax & SIGNATURE_MASK;
+}
+
+
@@ -1093,6 +1164,34 @@ x86ModelParse(xmlXPathContextPtr ctxt,
goto error;
}
+ if (virXPathBoolean("boolean(./signature)", ctxt)) {
+ unsigned int sigFamily = 0;
+ unsigned int sigModel = 0;
+ int rc;
+
+ rc = virXPathUInt("string(./signature/@family)", ctxt,
&sigFamily);
+ if (rc < 0) {
+ if (rc == -2 || (rc == 0 && !sigFamily)) {
Second part of the condition is a contradiction. Could you please
clarify your intent here?
+ virReportError(VIR_ERR_INTERNAL_ERROR,
+ _("Invalid CPU family in model %s"),
+ model->name);
+ }
+ goto cleanup;
+ }
+
+ rc = virXPathUInt("string(./signature/@model)", ctxt, &sigModel);
+ if (rc < 0) {
+ if (rc == -2 || (rc == 0 && !sigModel)) {
Same here.
+ virReportError(VIR_ERR_INTERNAL_ERROR,
+ _("Invalid CPU model in model %s"),
+ model->name);
+ }
+ goto cleanup;
+ }
+
+ model->signature = x86MakeSignature(sigFamily, sigModel);
+ }
+
if (virXPathBoolean("boolean(./vendor)", ctxt)) {
vendor = virXPathString("string(./vendor/@name)", ctxt);
if (!vendor) {
I want to see a clarification on the code here before I approve it.
5:56 p.m.
New subject: [libvirt] [PATCH v2 10/10] cpu_x86: Use signature in CPU detection code
Our current detection code uses just the number of CPU features which
need to be added/removed from the CPU model to fully describe the CPUID
data. The smallest number wins. But this may sometimes generate wrong
results as one can see from the fixed test cases. This patch modifies
the algorithm to prefer the CPU model with matching signature even if
this model results in a longer list of additional features.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 16 +++
src/cpu/cpu_x86.c | 148 +++++++++++++++++++--
.../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 11 +-
tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Core2-E6850-host.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-5110-host.xml | 5 +-
tests/cputestdata/x86-host+penryn-force-result.xml | 4 +-
8 files changed, 176 insertions(+), 23 deletions(-)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 0918f75..bf2dfc6 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -717,6 +717,7 @@
<!-- Intel CPU models -->
<model name='Conroe'>
+ <signature family='6' model='15'/>
<vendor name='Intel'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -748,6 +749,7 @@
</model>
<model name='Penryn'>
+ <signature family='6' model='23'/>
<vendor name='Intel'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -781,6 +783,7 @@
</model>
<model name='Nehalem'>
+ <signature family='6' model='26'/>
<vendor name='Intel'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -816,6 +819,7 @@
</model>
<model name='Westmere'>
+ <signature family='6' model='44'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -852,6 +856,7 @@
</model>
<model name='SandyBridge'>
+ <signature family='6' model='42'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -894,6 +899,7 @@
</model>
<model name='IvyBridge'>
+ <signature family='6' model='58'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -942,6 +948,7 @@
</model>
<model name='Haswell-noTSX'>
+ <signature family='6' model='60'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -994,6 +1001,7 @@
</model>
<model name='Haswell'>
+ <signature family='6' model='60'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
@@ -1048,6 +1056,7 @@
</model>
<model name='Broadwell-noTSX'>
+ <signature family='6' model='61'/>
<vendor name='Intel'/>
<feature name='3dnowprefetch'/>
<feature name='adx'/>
@@ -1104,6 +1113,7 @@
</model>
<model name='Broadwell'>
+ <signature family='6' model='61'/>
<vendor name='Intel'/>
<feature name='3dnowprefetch'/>
<feature name='adx'/>
@@ -1162,6 +1172,7 @@
</model>
<model name='Skylake-Client'>
+ <signature family='6' model='94'/>
<vendor name='Intel'/>
<feature name='3dnowprefetch'/>
<feature name='abm'/>
@@ -1292,6 +1303,7 @@
</model>
<model name='Opteron_G1'>
+ <signature family='15' model='6'/>
<vendor name='AMD'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -1321,6 +1333,7 @@
</model>
<model name='Opteron_G2'>
+ <signature family='15' model='6'/>
<vendor name='AMD'/>
<feature name='apic'/>
<feature name='clflush'/>
@@ -1354,6 +1367,7 @@
</model>
<model name='Opteron_G3'>
+ <signature family='15' model='6'/>
<vendor name='AMD'/>
<feature name='abm'/>
<feature name='apic'/>
@@ -1392,6 +1406,7 @@
</model>
<model name='Opteron_G4'>
+ <signature family='21' model='1'/>
<vendor name='AMD'/>
<feature name='3dnowprefetch'/>
<feature name='abm'/>
@@ -1440,6 +1455,7 @@
</model>
<model name='Opteron_G5'>
+ <signature family='21' model='2'/>
<vendor name='AMD'/>
<feature name='3dnowprefetch'/>
<feature name='abm'/>
diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 1d0e7a7..d9646eb 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -135,6 +135,7 @@ typedef virCPUx86Model *virCPUx86ModelPtr;
struct _virCPUx86Model {
char *name;
virCPUx86VendorPtr vendor;
+ uint32_t signature;
virCPUx86Data data;
};
@@ -493,6 +494,81 @@ x86DataToVendor(const virCPUx86Data *data,
}
+static uint32_t
+x86MakeSignature(unsigned int family,
+ unsigned int model)
+{
+ uint32_t sig = 0;
+
+ /*
+ * CPU signature (eax from 0x1 CPUID leaf):
+ *
+ * |31 .. 28|27 .. 20|19 .. 16|15 .. 14|13 .. 12|11 .. 8|7 .. 4|3 .. 0|
+ * | R | extFam | extMod | R | PType | Fam | Mod | Step |
+ *
+ * R reserved
+ * extFam extended family (valid only if Fam == 0xf)
+ * extMod extended model
+ * PType processor type
+ * Fam family
+ * Mod model
+ * Step stepping
+ *
+ * family = eax[27:20] + eax[11:8]
+ * model = eax[19:16] << 4 + eax[7:4]
+ */
+
+ /* extFam */
+ if (family > 0xf) {
+ sig |= (family - 0xf) << 20;
+ family = 0xf;
+ }
+
+ /* extMod */
+ sig |= (model >> 4) << 16;
+
+ /* PType is always 0 */
+
+ /* Fam */
+ sig |= family << 8;
+
+ /* Mod */
+ sig |= (model & 0xf) << 4;
+
+ /* Step is irrelevant, it is used to distinguish different revisions
+ * of the same CPU model
+ */
+
+ return sig;
+}
+
+
+/* Mask out irrelevant bits (R and Step) from processor signature. */
+#define SIGNATURE_MASK 0x0fff3ff0
+
+static uint32_t
+x86DataToSignature(const virCPUx86Data *data)
+{
+ virCPUx86CPUID leaf1 = { .eax_in = 0x1 };
+ virCPUx86CPUID *cpuid;
+
+ if (!(cpuid = x86DataCpuid(data, &leaf1)))
+ return 0;
+
+ return cpuid->eax & SIGNATURE_MASK;
+}
+
+
+static int
+x86DataAddSignature(virCPUx86Data *data,
+ uint32_t signature)
+{
+ virCPUx86CPUID cpuid = { .eax_in = 0x1, .eax = signature };
+
+ return virCPUx86DataAddCPUID(data, &cpuid);
+}
+
+
static virCPUDefPtr
x86DataToCPU(const virCPUx86Data *data,
virCPUx86ModelPtr model,
@@ -898,6 +974,7 @@ x86ModelCopy(virCPUx86ModelPtr model)
}
copy->vendor = model->vendor;
+ copy->signature = model->signature;
return copy;
}
@@ -1093,6 +1170,30 @@ x86ModelParse(xmlXPathContextPtr ctxt,
goto error;
}
+ if (virXPathBoolean("boolean(./signature)", ctxt)) {
+ unsigned int sigFamily = 0;
+ unsigned int sigModel = 0;
+ int rc;
+
+ rc = virXPathUInt("string(./signature/@family)", ctxt,
&sigFamily);
+ if (rc < 0 || sigFamily == 0) {
+ virReportError(VIR_ERR_INTERNAL_ERROR,
+ _("Invalid CPU signature family in model %s"),
+ model->name);
+ goto cleanup;
+ }
+
+ rc = virXPathUInt("string(./signature/@model)", ctxt, &sigModel);
+ if (rc < 0 || sigModel == 0) {
+ virReportError(VIR_ERR_INTERNAL_ERROR,
+ _("Invalid CPU signature model in model %s"),
+ model->name);
+ goto cleanup;
+ }
+
+ model->signature = x86MakeSignature(sigFamily, sigModel);
+ }
+
if (virXPathBoolean("boolean(./vendor)", ctxt)) {
vendor = virXPathString("string(./vendor/@name)", ctxt);
if (!vendor) {
@@ -1480,6 +1581,9 @@ x86Compute(virCPUDefPtr host,
&host_model->vendor->cpuid) < 0)
goto error;
+ if (x86DataAddSignature(&guest_model->data, host_model->signature) <
0)
+ goto error;
+
if (cpu->type == VIR_CPU_TYPE_GUEST
&& cpu->match == VIR_CPU_MATCH_EXACT)
x86DataSubtract(&guest_model->data, &diff->data);
@@ -1549,16 +1653,19 @@ x86GuestData(virCPUDefPtr host,
/*
- * Checks whether cpuCandidate is a better fit for the CPU data than the
- * currently selected one from cpuCurrent.
+ * Checks whether a candidate model is a better fit for the CPU data than the
+ * current model.
*
- * Returns 0 if cpuCurrent is better,
- * 1 if cpuCandidate is better,
- * 2 if cpuCandidate is the best one (search should stop now).
+ * Returns 0 if current is better,
+ * 1 if candidate is better,
+ * 2 if candidate is the best one (search should stop now).
*/
static int
-x86DecodeUseCandidate(virCPUDefPtr cpuCurrent,
+x86DecodeUseCandidate(virCPUx86ModelPtr current,
+ virCPUDefPtr cpuCurrent,
+ virCPUx86ModelPtr candidate,
virCPUDefPtr cpuCandidate,
+ uint32_t signature,
const char *preferred,
bool checkPolicy)
{
@@ -1578,9 +1685,26 @@ x86DecodeUseCandidate(virCPUDefPtr cpuCurrent,
if (!cpuCurrent)
return 1;
+ /* Ideally we want to select a model with family/model equal to
+ * family/model of the real CPU. Once we found such model, we only
+ * consider candidates with matching family/model.
+ */
+ if (signature &&
+ current->signature == signature &&
+ candidate->signature != signature)
+ return 0;
+
if (cpuCurrent->nfeatures > cpuCandidate->nfeatures)
return 1;
+ /* Prefer a candidate with matching signature even though it would
+ * result in longer list of features.
+ */
+ if (signature &&
+ candidate->signature == signature &&
+ current->signature != signature)
+ return 1;
+
return 0;
}
@@ -1597,11 +1721,12 @@ x86Decode(virCPUDefPtr cpu,
virCPUx86MapPtr map;
virCPUx86ModelPtr candidate;
virCPUDefPtr cpuCandidate;
+ virCPUx86ModelPtr model = NULL;
virCPUDefPtr cpuModel = NULL;
virCPUx86Data copy = VIR_CPU_X86_DATA_INIT;
virCPUx86Data features = VIR_CPU_X86_DATA_INIT;
- const virCPUx86Data *cpuData = NULL;
virCPUx86VendorPtr vendor;
+ uint32_t signature;
ssize_t i;
int rc;
@@ -1612,6 +1737,7 @@ x86Decode(virCPUDefPtr cpu,
return -1;
vendor = x86DataToVendor(data, map);
+ signature = x86DataToSignature(data);
/* Walk through the CPU models in reverse order to check newest
* models first.
@@ -1650,11 +1776,13 @@ x86Decode(virCPUDefPtr cpu,
goto cleanup;
cpuCandidate->type = cpu->type;
- if ((rc = x86DecodeUseCandidate(cpuModel, cpuCandidate, preferred,
+ if ((rc = x86DecodeUseCandidate(model, cpuModel,
+ candidate, cpuCandidate,
+ signature, preferred,
cpu->type == VIR_CPU_TYPE_HOST))) {
virCPUDefFree(cpuModel);
cpuModel = cpuCandidate;
- cpuData = &candidate->data;
+ model = candidate;
if (rc == 2)
break;
} else {
@@ -1686,7 +1814,7 @@ x86Decode(virCPUDefPtr cpu,
}
if (flags & VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES) {
- if (x86DataCopy(©, cpuData) < 0 ||
+ if (x86DataCopy(©, &model->data) < 0 ||
x86DataFromCPUFeatures(&features, cpuModel, map) < 0)
goto cleanup;
diff --git a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
index 78bc0a6..cd7b4bb 100644
--- a/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core-i7-5600U-guest.xml
@@ -1,7 +1,8 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>Skylake-Client</model>
+ <model fallback='forbid'>Broadwell</model>
<vendor>Intel</vendor>
+ <feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
@@ -18,10 +19,12 @@
<feature policy='require' name='xtpr'/>
<feature policy='require' name='pdcm'/>
<feature policy='require' name='osxsave'/>
+ <feature policy='require' name='f16c'/>
+ <feature policy='require' name='rdrand'/>
+ <feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
+ <feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
+ <feature policy='require' name='abm'/>
<feature policy='require' name='invtsc'/>
- <feature policy='disable' name='mpx'/>
- <feature policy='disable' name='xsavec'/>
- <feature policy='disable' name='xgetbv1'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml
b/tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml
index d9df03e..dfcbe24 100644
--- a/tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml
@@ -1,7 +1,8 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>core2duo</model>
+ <model fallback='forbid'>Conroe</model>
<vendor>Intel</vendor>
+ <feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
@@ -9,6 +10,7 @@
<feature policy='require' name='tm'/>
<feature policy='require' name='pbe'/>
<feature policy='require' name='dtes64'/>
+ <feature policy='require' name='monitor'/>
<feature policy='require' name='ds_cpl'/>
<feature policy='require' name='vmx'/>
<feature policy='require' name='smx'/>
@@ -17,5 +19,4 @@
<feature policy='require' name='cx16'/>
<feature policy='require' name='xtpr'/>
<feature policy='require' name='pdcm'/>
- <feature policy='require' name='lahf_lm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Core2-E6850-host.xml
b/tests/cputestdata/x86-cpuid-Core2-E6850-host.xml
index c5ca1cb..e7ddc39 100644
--- a/tests/cputestdata/x86-cpuid-Core2-E6850-host.xml
+++ b/tests/cputestdata/x86-cpuid-Core2-E6850-host.xml
@@ -1,7 +1,8 @@
<cpu>
<arch>x86_64</arch>
- <model>core2duo</model>
+ <model>Conroe</model>
<vendor>Intel</vendor>
+ <feature name='vme'/>
<feature name='ds'/>
<feature name='acpi'/>
<feature name='ss'/>
@@ -9,6 +10,7 @@
<feature name='tm'/>
<feature name='pbe'/>
<feature name='dtes64'/>
+ <feature name='monitor'/>
<feature name='ds_cpl'/>
<feature name='vmx'/>
<feature name='smx'/>
@@ -17,5 +19,4 @@
<feature name='cx16'/>
<feature name='xtpr'/>
<feature name='pdcm'/>
- <feature name='lahf_lm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml
b/tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml
index 0b9e3f6..28d112b 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml
@@ -1,7 +1,8 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='forbid'>core2duo</model>
+ <model fallback='forbid'>Conroe</model>
<vendor>Intel</vendor>
+ <feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
@@ -9,6 +10,7 @@
<feature policy='require' name='tm'/>
<feature policy='require' name='pbe'/>
<feature policy='require' name='dtes64'/>
+ <feature policy='require' name='monitor'/>
<feature policy='require' name='ds_cpl'/>
<feature policy='require' name='vmx'/>
<feature policy='require' name='tm2'/>
@@ -16,5 +18,4 @@
<feature policy='require' name='xtpr'/>
<feature policy='require' name='pdcm'/>
<feature policy='require' name='dca'/>
- <feature policy='require' name='lahf_lm'/>
</cpu>
diff --git a/tests/cputestdata/x86-cpuid-Xeon-5110-host.xml
b/tests/cputestdata/x86-cpuid-Xeon-5110-host.xml
index 88c61c4..ca3a84c 100644
--- a/tests/cputestdata/x86-cpuid-Xeon-5110-host.xml
+++ b/tests/cputestdata/x86-cpuid-Xeon-5110-host.xml
@@ -1,7 +1,8 @@
<cpu>
<arch>x86_64</arch>
- <model>core2duo</model>
+ <model>Conroe</model>
<vendor>Intel</vendor>
+ <feature name='vme'/>
<feature name='ds'/>
<feature name='acpi'/>
<feature name='ss'/>
@@ -9,6 +10,7 @@
<feature name='tm'/>
<feature name='pbe'/>
<feature name='dtes64'/>
+ <feature name='monitor'/>
<feature name='ds_cpl'/>
<feature name='vmx'/>
<feature name='tm2'/>
@@ -16,5 +18,4 @@
<feature name='xtpr'/>
<feature name='pdcm'/>
<feature name='dca'/>
- <feature name='lahf_lm'/>
</cpu>
diff --git a/tests/cputestdata/x86-host+penryn-force-result.xml
b/tests/cputestdata/x86-host+penryn-force-result.xml
index 000bc0d..ef0a2c0 100644
--- a/tests/cputestdata/x86-host+penryn-force-result.xml
+++ b/tests/cputestdata/x86-host+penryn-force-result.xml
@@ -1,4 +1,6 @@
<cpu mode='custom' match='exact'>
<arch>x86_64</arch>
- <model fallback='allow'>Nehalem</model>
+ <model fallback='allow'>Penryn</model>
+ <feature policy='require' name='sse4.2'/>
+ <feature policy='require' name='popcnt'/>
</cpu>
--
2.8.4
6:12 p.m.
New subject: [libvirt] [PATCH v2 10/10] cpu_x86: Use signature in CPU detection code
On Thu, Jun 09, 2016 at 11:56:17 +0200, Jiri Denemark wrote:
Our current detection code uses just the number of CPU features
which
need to be added/removed from the CPU model to fully describe the CPUID
data. The smallest number wins. But this may sometimes generate wrong
results as one can see from the fixed test cases. This patch modifies
the algorithm to prefer the CPU model with matching signature even if
this model results in a longer list of additional features.
Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
---
src/cpu/cpu_map.xml | 16 +++
src/cpu/cpu_x86.c | 148 +++++++++++++++++++--
.../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 11 +-
tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Core2-E6850-host.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml | 5 +-
tests/cputestdata/x86-cpuid-Xeon-5110-host.xml | 5 +-
tests/cputestdata/x86-host+penryn-force-result.xml | 4 +-
8 files changed, 176 insertions(+), 23 deletions(-)
ACK
6:25 p.m.
New subject: [libvirt] [PATCH v2 10/10] cpu_x86: Use signature in CPU detection code
On Thu, Jun 09, 2016 at 12:12:19 +0200, Peter Krempa wrote:
On Thu, Jun 09, 2016 at 11:56:17 +0200, Jiri Denemark wrote:
> Our current detection code uses just the number of CPU features which
> need to be added/removed from the CPU model to fully describe the CPUID
> data. The smallest number wins. But this may sometimes generate wrong
> results as one can see from the fixed test cases. This patch modifies
> the algorithm to prefer the CPU model with matching signature even if
> this model results in a longer list of additional features.
>
> Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
> ---
> src/cpu/cpu_map.xml | 16 +++
> src/cpu/cpu_x86.c | 148 +++++++++++++++++++--
> .../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 11 +-
> tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml | 5 +-
> tests/cputestdata/x86-cpuid-Core2-E6850-host.xml | 5 +-
> tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml | 5 +-
> tests/cputestdata/x86-cpuid-Xeon-5110-host.xml | 5 +-
> tests/cputestdata/x86-host+penryn-force-result.xml | 4 +-
> 8 files changed, 176 insertions(+), 23 deletions(-)
ACK
Thanks, I pushed all but 8/10 and 10/10 which need to wait until
Eduardo's queue is pulled into QEMU master.
Jirka
5:48 p.m.
New subject: [libvirt] [PATCH v2 10/10] cpu_x86: Use signature in CPU detection code
On Thu, Jun 09, 2016 at 12:25:26 +0200, Jiri Denemark wrote:
On Thu, Jun 09, 2016 at 12:12:19 +0200, Peter Krempa wrote:
> On Thu, Jun 09, 2016 at 11:56:17 +0200, Jiri Denemark wrote:
> > Our current detection code uses just the number of CPU features which
> > need to be added/removed from the CPU model to fully describe the CPUID
> > data. The smallest number wins. But this may sometimes generate wrong
> > results as one can see from the fixed test cases. This patch modifies
> > the algorithm to prefer the CPU model with matching signature even if
> > this model results in a longer list of additional features.
> >
> > Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com>
> > ---
> > src/cpu/cpu_map.xml | 16 +++
> > src/cpu/cpu_x86.c | 148
+++++++++++++++++++--
> > .../cputestdata/x86-cpuid-Core-i7-5600U-guest.xml | 11 +-
> > tests/cputestdata/x86-cpuid-Core2-E6850-guest.xml | 5 +-
> > tests/cputestdata/x86-cpuid-Core2-E6850-host.xml | 5 +-
> > tests/cputestdata/x86-cpuid-Xeon-5110-guest.xml | 5 +-
> > tests/cputestdata/x86-cpuid-Xeon-5110-host.xml | 5 +-
> > tests/cputestdata/x86-host+penryn-force-result.xml | 4 +-
> > 8 files changed, 176 insertions(+), 23 deletions(-)
>
> ACK
Thanks, I pushed all but 8/10 and 10/10 which need to wait until
Eduardo's queue is pulled into QEMU master.
Since Skylake-Client was pushed to QEMU master yesterday I pushed the
remaining two patches in this series.
Jirka
5:58 p.m.
New subject: [libvirt] [PATCH 10/10] cpu_x86: Use signature in CPU detection code
On Thu, Jun 09, 2016 at 09:17:30 +0200, Peter Krempa wrote:
On Wed, Jun 08, 2016 at 14:41:38 +0200, Jiri Denemark wrote:
> Our current detection code uses just the number of CPU features which
> need to be added/removed from the CPU model to fully describe the CPUID
> data. The smallest number wins. But this may sometimes generate wrong
> results as one can see from the fixed test cases. This patch modifies
> the algorithm to prefer the CPU model with matching signature even if
> this model results in a longer list of additional features.
...
> +/* Mask out irrelevant bits (R and Step) from processor
signature. */
> +#define SIGNATURE_MASK 0x0fff3ff0
This mask is not removing bits 12 and 13 corresponding to the processor
type, but we don't take them into account in our code. If that's
intentional please note it in the comment
Yes, it's intentional.
> +
> +static uint32_t
> +x86DataToSignature(const virCPUx86Data *data)
> +{
> + virCPUx86CPUID leaf1 = { .eax_in = 0x1 };
> + virCPUx86CPUID *cpuid;
> +
> + if (!(cpuid = x86DataCpuid(data, &leaf1)))
> + return 0;
> +
> + return cpuid->eax & SIGNATURE_MASK;
> +}
> +
> +
> @@ -1093,6 +1164,34 @@ x86ModelParse(xmlXPathContextPtr ctxt,
> goto error;
> }
>
> + if (virXPathBoolean("boolean(./signature)", ctxt)) {
> + unsigned int sigFamily = 0;
> + unsigned int sigModel = 0;
> + int rc;
> +
> + rc = virXPathUInt("string(./signature/@family)", ctxt,
&sigFamily);
> + if (rc < 0) {
> + if (rc == -2 || (rc == 0 && !sigFamily)) {
Second part of the condition is a contradiction. Could you please
clarify your intent here?
Heh, I guess I should be more careful when reusing patches I hacked up a
year ago :-)
See v2.
Jirka
3059
days inactive
3068
days old
26 comments
2 participants
participants (2)
-
Jiri Denemark -
Peter Krempa