With current perf framework, this patch adds support to more perf events, including cache missing, cache peference, cpu cycles, instrction, etc.. Signed-off-by: Qiaowei Ren <qiaowei.ren(a)intel.com&gt; --- docs/formatdomain.html.in | 24 +++++++++++ docs/schemas/domaincommon.rng | 4 ++ include/libvirt/libvirt-domain.h | 39 +++++++++++++++++ src/libvirt-domain.c | 8 ++++ src/qemu/qemu_driver.c | 23 +++++----- src/util/virperf.c | 65 ++++++++++++++++++++++++++++- src/util/virperf.h | 4 ++ tests/genericxml2xmlindata/generic-perf.xml | 4 ++ 8 files changed, 158 insertions(+), 13 deletions(-) diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in index f660aa6..7999e43 100644 --- a/docs/formatdomain.html.in +++ b/docs/formatdomain.html.in @@ -1839,6 +1839,10 @@ &lt;event name='cmt' enabled='yes'/&gt; &lt;event name='mbmt' enabled='no'/&gt; &lt;event name='mbml' enabled='yes'/&gt; + &lt;event name='cache_misses' enabled='no'/&gt; + &lt;event name='cache_peferences' enabled='no'/&gt; + &lt;event name='instructions' enabled='no'/&gt; + &lt;event name='cpu_cycles' enabled='no'/&gt; &lt;/perf&gt; ... </pre> @@ -1864,6 +1868,26 @@ <td>bandwidth of memory traffic for a memory controller</td> <td><code>perf.mbml</code></td> </tr> + <tr> + <td><code>cache_misses</code></td> + <td>the amount of cache missing by applications running on the platform</td> + <td><code>perf.cache_misses</code></td> + </tr> + <tr> + <td><code>cache_peferences</code></td> + <td>the amount of cache hit by applications running on the platform</td> + <td><code>perf.cache_peferences</code></td> + </tr> + <tr> + <td><code>instructions</code></td> + <td>the amount of instructions by applications running on the platform</td> + <td><code>perf.instructions</code></td> + </tr> + <tr> + <td><code>cpu_cycles</code></td> + <td>the amount of cycles one instruction needs</td> + <td><code>perf.cpu_cycles</code></td> + </tr> </table> <h3><a name="elementsDevices">Devices</a></h3> diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng index 563cb3c..e41dc3a 100644 --- a/docs/schemas/domaincommon.rng +++ b/docs/schemas/domaincommon.rng @@ -414,6 +414,10 @@ <value>cmt</value> <value>mbmt</value> <value>mbml</value> + <value>cache_misses</value> + <value>cache_peferences</value> + <value>instructions</value> + <value>cpu_cycles</value> </choice> </attribute> <attribute name="enabled"> diff --git a/include/libvirt/libvirt-domain.h b/include/libvirt/libvirt-domain.h index 7ea93aa..b79cdb0 100644 --- a/include/libvirt/libvirt-domain.h +++ b/include/libvirt/libvirt-domain.h @@ -1947,6 +1947,45 @@ void virDomainStatsRecordListFree(virDomainStatsRecordPtr *stats); */ # define VIR_PERF_PARAM_MBML "mbml" +/** + * VIR_PERF_PARAM_CACHE_MISSES: + * + * Macro for typed parameter name that represents cache_misses perf + * event which can be used to measure the amount of cache missing by + * applications running on the platform. It corresponds to the + * "perf.cache_misses" field in the *Stats APIs. + */ +# define VIR_PERF_PARAM_CACHE_MISSES "cache_misses" + +/** + * VIR_PERF_PARAM_CACHE_REFERENCES: + * + * Macro for typed parameter name that represents cache_peferences + * perf event which can be used to measure the amount of cache hit + * by applications running on the platform. It corresponds to the + * "perf.cache_peferences" field in the *Stats APIs. + */ +# define VIR_PERF_PARAM_CACHE_REFERENCES "cache_peferences" + +/** + * VIR_PERF_PARAM_INSTRUCTIONS: + * + * Macro for typed parameter name that represents instructions perf + * event which can be used to measure the amount of instructions + * by applications running on the platform. It corresponds to the + * "perf.instructions" field in the *Stats APIs. + */ +# define VIR_PERF_PARAM_INSTRUCTIONS "instructions" + +/** + * VIR_PERF_PARAM_CPU_CYCLES: + * + * Macro for typed parameter name that represents cpu_cycles perf event + * which can be used to measure how many cycles one instruction needs. + * It corresponds to the "perf.cpu_cycles" field in the *Stats APIs. + */ +# define VIR_PERF_PARAM_CPU_CYCLES "cpu_cycles" + int virDomainGetPerfEvents(virDomainPtr dom, virTypedParameterPtr *params, int *nparams, diff --git a/src/libvirt-domain.c b/src/libvirt-domain.c index 4e71a94..b817e4b 100644 --- a/src/libvirt-domain.c +++ b/src/libvirt-domain.c @@ -11452,6 +11452,14 @@ virConnectGetDomainCapabilities(virConnectPtr conn, * "perf.mbml" - the amount of data (bytes/s) sent through the memory controller * on the socket as unsigned long long. It is produced by mbml * perf event. + * "perf.cache_misses" - the amount of cache missing as unsigned long long. + * It is produced by cache_misses perf event. + * "perf.cache_peferences" - the amount of cache hit as unsigned long long. + * It is produced by cache_peferences perf event. + * "perf.instructions" - the amount of instructions as unsigned long long. + * It is produced by instructions perf event. + * "perf.cpu_cycles" - the amount of cycles one instruction needs as unsigned + * long long. It is produced by cpu_cycles perf event. * * Note that entire stats groups or individual stat fields may be missing from * the output in case they are not supported by the given hypervisor, are not diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c index 61d184b..bea753f 100644 --- a/src/qemu/qemu_driver.c +++ b/src/qemu/qemu_driver.c @@ -9613,6 +9613,10 @@ qemuDomainSetPerfEvents(virDomainPtr dom, VIR_PERF_PARAM_CMT, VIR_TYPED_PARAM_BOOLEAN, VIR_PERF_PARAM_MBMT, VIR_TYPED_PARAM_BOOLEAN, VIR_PERF_PARAM_MBML, VIR_TYPED_PARAM_BOOLEAN, + VIR_PERF_PARAM_CACHE_MISSES, VIR_TYPED_PARAM_BOOLEAN, + VIR_PERF_PARAM_CACHE_REFERENCES, VIR_TYPED_PARAM_BOOLEAN, + VIR_PERF_PARAM_INSTRUCTIONS, VIR_TYPED_PARAM_BOOLEAN, + VIR_PERF_PARAM_CPU_CYCLES, VIR_TYPED_PARAM_BOOLEAN, NULL) < 0) return -1; @@ -18941,10 +18945,10 @@ qemuDomainGetStatsBlock(virQEMUDriverPtr driver, #undef QEMU_ADD_COUNT_PARAM static int -qemuDomainGetStatsPerfRdt(virPerfPtr perf, - virPerfEventType type, - virDomainStatsRecordPtr record, - int *maxparams) +qemuDomainGetStatsPerfOneEvent(virPerfPtr perf, + virPerfEventType type, + virDomainStatsRecordPtr record, + int *maxparams) { char param_name[VIR_TYPED_PARAM_FIELD_LENGTH]; uint64_t value = 0; @@ -18980,14 +18984,9 @@ qemuDomainGetStatsPerf(virQEMUDriverPtr driver ATTRIBUTE_UNUSED, if (!virPerfEventIsEnabled(priv->perf, i)) continue; - switch (i) { - case VIR_PERF_EVENT_CMT: - case VIR_PERF_EVENT_MBMT: - case VIR_PERF_EVENT_MBML: - if (qemuDomainGetStatsPerfRdt(priv->perf, i, record, maxparams) < 0) - goto cleanup; - break; - } + if (qemuDomainGetStatsPerfOneEvent(priv->perf, i, + record, maxparams) < 0) + goto cleanup; } ret = 0; diff --git a/src/util/virperf.c b/src/util/virperf.c index 4661ba3..a3d2bc6 100644 --- a/src/util/virperf.c +++ b/src/util/virperf.c @@ -38,7 +38,9 @@ VIR_LOG_INIT("util.perf"); #define VIR_FROM_THIS VIR_FROM_PERF VIR_ENUM_IMPL(virPerfEvent, VIR_PERF_EVENT_LAST, - "cmt", "mbmt", "mbml"); + "cmt", "mbmt", "mbml", + "cache_misses", "cache_peferences", + "instructions", "cpu_cycles"); struct virPerfEvent { int type; @@ -189,6 +191,60 @@ virPerfRdtEnable(virPerfEventPtr event, return -1; } +static int +virPerfGeneralEnable(virPerfEventPtr event, + pid_t pid) +{ + struct perf_event_attr attr; + + memset(&attr, 0, sizeof(attr)); + attr.size = sizeof(attr); + attr.inherit = 1; + attr.disabled = 1; + attr.enable_on_exec = 0; + + switch (event->type) { + case VIR_PERF_EVENT_CACHE_MISSES: + attr.type = PERF_TYPE_HARDWARE; + attr.config = PERF_COUNT_HW_CACHE_MISSES; + break; + case VIR_PERF_EVENT_CACHE_REFERENCES: + attr.type = PERF_TYPE_HARDWARE; + attr.config = PERF_COUNT_HW_CACHE_REFERENCES; + break; + case VIR_PERF_EVENT_INSTRUCTIONS: + attr.type = PERF_TYPE_HARDWARE; + attr.config = PERF_COUNT_HW_INSTRUCTIONS; + break; + case VIR_PERF_EVENT_CPU_CYCLES: + attr.type = PERF_TYPE_HARDWARE; + attr.config = PERF_COUNT_HW_CPU_CYCLES; + break; + } + + event->fd = syscall(__NR_perf_event_open, &attr, pid, -1, -1, 0); + if (event->fd < 0) { + virReportSystemError(errno, + _("Unable to open perf event for %s"), + virPerfEventTypeToString(event->type)); + goto error; + } + + if (ioctl(event->fd, PERF_EVENT_IOC_ENABLE) < 0) { + virReportSystemError(errno, + _("Unable to enable perf event for %s"), + virPerfEventTypeToString(event->type)); + goto error; + } + + event->enabled = true; + return 0; + + error: + VIR_FORCE_CLOSE(event->fd); + return -1; +} + int virPerfEventEnable(virPerfPtr perf, virPerfEventType type, @@ -205,6 +261,13 @@ virPerfEventEnable(virPerfPtr perf, if (virPerfRdtEnable(event, pid) < 0) return -1; break; + case VIR_PERF_EVENT_CACHE_MISSES: + case VIR_PERF_EVENT_CACHE_REFERENCES: + case VIR_PERF_EVENT_INSTRUCTIONS: + case VIR_PERF_EVENT_CPU_CYCLES: + if (virPerfGeneralEnable(event, pid) < 0) + return -1; + break; case VIR_PERF_EVENT_LAST: virReportError(VIR_ERR_INTERNAL_ERROR, _("Unexpected perf event type=%d"), type); diff --git a/src/util/virperf.h b/src/util/virperf.h index 7163410..7129370 100644 --- a/src/util/virperf.h +++ b/src/util/virperf.h @@ -28,6 +28,10 @@ typedef enum { VIR_PERF_EVENT_CMT, VIR_PERF_EVENT_MBMT, VIR_PERF_EVENT_MBML, + VIR_PERF_EVENT_CACHE_MISSES, + VIR_PERF_EVENT_CACHE_REFERENCES, + VIR_PERF_EVENT_INSTRUCTIONS, + VIR_PERF_EVENT_CPU_CYCLES, VIR_PERF_EVENT_LAST } virPerfEventType; diff --git a/tests/genericxml2xmlindata/generic-perf.xml b/tests/genericxml2xmlindata/generic-perf.xml index 394d2a6..6428ebd 100644 --- a/tests/genericxml2xmlindata/generic-perf.xml +++ b/tests/genericxml2xmlindata/generic-perf.xml @@ -16,6 +16,10 @@ <event name='cmt' enabled='yes'/> <event name='mbmt' enabled='no'/> <event name='mbml' enabled='yes'/> + <event name='cache_misses' enabled='no'/> + <event name='cache_peferences' enabled='no'/> + <event name='instructions' enabled='no'/> + <event name='cpu_cycles' enabled='no'/> </perf> <devices> </devices> -- 1.9.1