On 2012年09月01日 02:16, Eric Blake wrote:
On 08/31/2012 07:17 AM, Osier Yang wrote:
> Though I don't quite understand it well enough, but it looks
> wrong to read the control register from the device, and then
> write to its parent twice, while doing the secondary bus reset.
> ---
> src/util/pci.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/src/util/pci.c b/src/util/pci.c
> index 0742d07..c3f1b2b 100644
> --- a/src/util/pci.c
> +++ b/src/util/pci.c
> @@ -642,7 +642,7 @@ pciTrySecondaryBusReset(pciDevice *dev,
> /* Read the control register, set the reset flag, wait 200ms,
> * unset the reset flag and wait 200ms.
> */
> - ctl = pciRead16(dev, PCI_BRIDGE_CONTROL);
> + ctl = pciRead16(parent, PCI_BRIDGE_CONTROL);
ACK. Unfortunately, I, like you, have no idea how to really test this,
and am reviewing solely based on the code comments.
Thanks, but I squashed this into a new patch, which is the full solution
for the secondary bus reset problems:
https://www.redhat.com/archives/libvir-list/2012-September/msg00023.html
Regards,
Osier