[libvirt] [PATCH 1/7] perf: add cache_l1dra perf event support

This patch adds support and documentation for a generalized hardware cache event named as cache_l1dra perf event for measuring read accesses on level 1 data cache Signed-off-by: Nitesh Konkar <nitkon12(a)linux.vnet.ibm.com&gt; --- docs/formatdomain.html.in | 7 +++++++ docs/news.xml | 4 ++-- docs/schemas/domaincommon.rng | 1 + include/libvirt/libvirt-domain.h | 11 +++++++++++ src/libvirt-domain.c | 3 +++ src/qemu/qemu_driver.c | 1 + src/util/virperf.c | 8 +++++++- src/util/virperf.h | 1 + tests/genericxml2xmlindata/generic-perf.xml | 1 + tools/virsh.pod | 5 ++++- 10 files changed, 38 insertions(+), 4 deletions(-) diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in index 3f7f875..20ef976 100644 --- a/docs/formatdomain.html.in +++ b/docs/formatdomain.html.in @@ -1937,6 +1937,7 @@ &lt;event name='stalled_cycles_frontend' enabled='no'/&gt; &lt;event name='stalled_cycles_backend' enabled='no'/&gt; &lt;event name='ref_cpu_cycles' enabled='no'/&gt; + &lt;event name='cache_l1dra' enabled='no'/&gt; &lt;/perf&gt; ... </pre> @@ -2015,6 +2016,12 @@ by applications running on the platform</td> <td><code>perf.ref_cpu_cycles</code></td> </tr> + <tr> + <td><code>cache_l1dra</code></td> + <td>the count of total read accesses for level 1 data cache by + applications running on the platform</td> + <td><code>perf.cache_l1dra</code></td> + </tr> </table> <h3><a name="elementsDevices">Devices</a></h3> diff --git a/docs/news.xml b/docs/news.xml index 26efa3e..b31d0a4 100644 --- a/docs/news.xml +++ b/docs/news.xml @@ -106,8 +106,8 @@ <description> Add support to get the count of branch instructions executed, branch misses, bus cycles, stalled frontend - cpu cycles, stalled backend cpu cycles, and ref cpu - cycles by applications running on the platform. + cpu cycles, stalled backend cpu cycles, ref cpu cycles + and cache l1dra by applications running on the platform. </description> </change> <change> diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng index 4d76315..a65ad13 100644 --- a/docs/schemas/domaincommon.rng +++ b/docs/schemas/domaincommon.rng @@ -433,6 +433,7 @@ <value>stalled_cycles_frontend</value> <value>stalled_cycles_backend</value> <value>ref_cpu_cycles</value> + <value>cache_l1dra</value> </choice> </attribute> <attribute name="enabled"> diff --git a/include/libvirt/libvirt-domain.h b/include/libvirt/libvirt-domain.h index e303140..e2ba6ce 100644 --- a/include/libvirt/libvirt-domain.h +++ b/include/libvirt/libvirt-domain.h @@ -2188,6 +2188,17 @@ void virDomainStatsRecordListFree(virDomainStatsRecordPtr *stats); */ # define VIR_PERF_PARAM_REF_CPU_CYCLES "ref_cpu_cycles" + /** + * VIR_PERF_PARAM_CACHE_L1DRA: + * + * Macro for typed parameter name that represents cache_l1dra + * perf event which can be used to measure the count of total + * read accesses for level 1 data cache by applications running + * on the platform. It corresponds to the "perf.cache_l1dra" + * field in the *Stats APIs. + */ +# define VIR_PERF_PARAM_CACHE_L1DRA "cache_l1dra" + int virDomainGetPerfEvents(virDomainPtr dom, virTypedParameterPtr *params, int *nparams, diff --git a/src/libvirt-domain.c b/src/libvirt-domain.c index 5b3e842..fa39069 100644 --- a/src/libvirt-domain.c +++ b/src/libvirt-domain.c @@ -11250,6 +11250,9 @@ virConnectGetDomainCapabilities(virConnectPtr conn, * CPU frequency scaling by applications running * as unsigned long long. It is produced by the * ref_cpu_cycles perf event. + * "perf.cache_l1dra" - The count of total read accesses for level 1 data + * cache as unsigned long long. It is produced by + * cache_l1dra perf event. * * Note that entire stats groups or individual stat fields may be missing from * the output in case they are not supported by the given hypervisor, are not diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c index d4422f3..7e2ea96 100644 --- a/src/qemu/qemu_driver.c +++ b/src/qemu/qemu_driver.c @@ -9877,6 +9877,7 @@ qemuDomainSetPerfEvents(virDomainPtr dom, VIR_PERF_PARAM_STALLED_CYCLES_FRONTEND, VIR_TYPED_PARAM_BOOLEAN, VIR_PERF_PARAM_STALLED_CYCLES_BACKEND, VIR_TYPED_PARAM_BOOLEAN, VIR_PERF_PARAM_REF_CPU_CYCLES, VIR_TYPED_PARAM_BOOLEAN, + VIR_PERF_PARAM_CACHE_L1DRA, VIR_TYPED_PARAM_BOOLEAN, NULL) < 0) return -1; diff --git a/src/util/virperf.c b/src/util/virperf.c index f64692b..11e64df 100644 --- a/src/util/virperf.c +++ b/src/util/virperf.c @@ -43,7 +43,8 @@ VIR_ENUM_IMPL(virPerfEvent, VIR_PERF_EVENT_LAST, "cache_references", "cache_misses", "branch_instructions", "branch_misses", "bus_cycles", "stalled_cycles_frontend", - "stalled_cycles_backend", "ref_cpu_cycles"); + "stalled_cycles_backend", "ref_cpu_cycles", + "cache_l1dra"); struct virPerfEvent { int type; @@ -112,6 +113,11 @@ static struct virPerfEventAttr attrs[] = { .attrConfig = 0, # endif }, + {.type = VIR_PERF_EVENT_CACHE_L1DRA, + .attrType = PERF_TYPE_HW_CACHE, + .attrConfig = (PERF_COUNT_HW_CACHE_L1D) | + (PERF_COUNT_HW_CACHE_OP_READ << 8) | + (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)}, }; typedef struct virPerfEventAttr *virPerfEventAttrPtr; diff --git a/src/util/virperf.h b/src/util/virperf.h index 1f43c92..36ceb3a 100644 --- a/src/util/virperf.h +++ b/src/util/virperf.h @@ -47,6 +47,7 @@ typedef enum { the backend of the instruction processor pipeline */ VIR_PERF_EVENT_REF_CPU_CYCLES, /* Count of ref cpu cycles */ + VIR_PERF_EVENT_CACHE_L1DRA, /* Count of read accesses for level 1 data cache */ VIR_PERF_EVENT_LAST } virPerfEventType; diff --git a/tests/genericxml2xmlindata/generic-perf.xml b/tests/genericxml2xmlindata/generic-perf.xml index 437cd65..9b01aef 100644 --- a/tests/genericxml2xmlindata/generic-perf.xml +++ b/tests/genericxml2xmlindata/generic-perf.xml @@ -26,6 +26,7 @@ <event name='stalled_cycles_frontend' enabled='yes'/> <event name='stalled_cycles_backend' enabled='yes'/> <event name='ref_cpu_cycles' enabled='yes'/> + <event name='cache_l1dra' enabled='yes'/> </perf> <devices> </devices> diff --git a/tools/virsh.pod b/tools/virsh.pod index 0e434c0..798c02e 100644 --- a/tools/virsh.pod +++ b/tools/virsh.pod @@ -945,7 +945,8 @@ I<--perf> returns the statistics of all enabled perf events: "perf.bus_cycles" - the count of bus cycles, "perf.stalled_cycles_frontend" - the count of stalled frontend cpu cycles, "perf.stalled_cycles_backend" - the count of stalled backend cpu cycles, -"perf.ref_cpu_cycles" - the count of ref cpu cycles +"perf.ref_cpu_cycles" - the count of ref cpu cycles, +"perf.cache_l1dra" - the count of read accesses for level 1 data cache See the B<perf> command for more details about each event. @@ -2310,6 +2311,8 @@ B<Valid perf event names> ref_cpu_cycles - Provides the count of total cpu cycles not affected by CPU frequency scaling by applications running on the platform. + cache_l1dra - Provides the count of total read accesses for level 1 + data cache by applications running on the platform. B<Note>: The statistics can be retrieved using the B<domstats> command using the I<--perf> flag. -- 1.9.3