On 2019/12/16 下午6:12, Daniel P. Berrangé wrote:
On Sun, Dec 15, 2019 at 02:39:20AM +0000, Wang, Huaqiang wrote:
> Hi Daniel,
>
> Thanks for your review.
>
> About patch 1/5, I understand we should be very cautious when we changes the
determined
> interface.
>
> I'd like to reserved the old 32bit interface and propose a new 64bit interface
just as you
> suggested if you still think so after you got my intention.
> Here actually I want to fix a bug, maybe I should title this patch as *bug fixing*.
Reason is the
> underlying hardware, the cache monitor and memory bandwidth counters, are 64bit
width.
> Using 32bit interface to access these counters are problematic. This bug is not found
because
> this interface is only used for tracking the amount of cache that used before this
patch, normally
> the occupied cache will not exceed 4GB range. (32bit counter can counter value up to
4GB).
> But for memory, this counter records the data passing through the memory controller
issued
> by this CPU in bytes and accumulatively, this value can easily exceed the 4GB bound,
so I
> don’t want to reserve the old 32 bit interface and let user use it, because it will
report incorrect value.
We simply have to document the limitati onof the old interface. We can
*NOT* change it, because it WILL break API compatibility for apps that
deserailize the current data.
Got. I'll resend new patches for review.
Thanks
Huaqiang
Regards,
Daniel