[PATCH 0/3] ppc64: QEMU 7.0.0 caps + POWER10 support
by Daniel Henrique Barboza
Hi,
Small series to update ppc64 caps after the 7.0.0 release and to add
support for the recently released IBM POWER10 chip.
Daniel Henrique Barboza (3):
tests: qemucapabilities: update ppc64 qemu caps for 7.0.0 release
cpu_map: add POWER10 cpu model
cpu_ppc64: add support for host-model on POWER10
src/cpu/cpu_ppc64.c | 8 +-
src/cpu_map/index.xml | 1 +
src/cpu_map/meson.build | 1 +
src/cpu_map/ppc64_POWER10.xml | 6 +
tests/domaincapsdata/qemu_5.0.0.ppc64.xml | 1 +
tests/domaincapsdata/qemu_5.2.0.ppc64.xml | 1 +
tests/domaincapsdata/qemu_6.2.0.ppc64.xml | 1 +
tests/domaincapsdata/qemu_7.0.0.ppc64.xml | 3 +-
.../qemucapabilitiesdata/caps_5.0.0.ppc64.xml | 4 +-
.../qemucapabilitiesdata/caps_5.2.0.ppc64.xml | 4 +-
.../qemucapabilitiesdata/caps_6.2.0.ppc64.xml | 4 +-
.../caps_7.0.0.ppc64.replies | 8039 ++++++++---------
.../qemucapabilitiesdata/caps_7.0.0.ppc64.xml | 1180 ++-
...default-video-type-ppc64.ppc64-latest.args | 1 -
...ault-cpu-kvm-pseries-2.7.ppc64-latest.args | 1 -
...ault-cpu-kvm-pseries-3.1.ppc64-latest.args | 1 -
...ault-cpu-kvm-pseries-4.2.ppc64-latest.args | 1 -
...ault-cpu-tcg-pseries-2.7.ppc64-latest.args | 1 -
...ault-cpu-tcg-pseries-3.1.ppc64-latest.args | 1 -
...ault-cpu-tcg-pseries-4.2.ppc64-latest.args | 1 -
.../ppc64-pseries-graphics.ppc64-latest.args | 1 -
.../ppc64-pseries-headless.ppc64-latest.args | 1 -
.../ppc64-tpmproxy-single.ppc64-latest.args | 1 -
.../ppc64-tpmproxy-with-tpm.ppc64-latest.args | 1 -
.../pseries-cpu-compat-power10.args | 32 +
.../pseries-cpu-compat-power10.err | 1 +
.../pseries-cpu-compat-power10.xml | 21 +
.../tpm-emulator-spapr.ppc64-latest.args | 1 -
tests/qemuxml2argvtest.c | 11 +
tests/testutilshostcpus.h | 11 +
tests/testutilsqemu.c | 4 +-
tests/testutilsqemu.h | 1 +
32 files changed, 4523 insertions(+), 4823 deletions(-)
create mode 100644 src/cpu_map/ppc64_POWER10.xml
create mode 100644 tests/qemuxml2argvdata/pseries-cpu-compat-power10.args
create mode 100644 tests/qemuxml2argvdata/pseries-cpu-compat-power10.err
create mode 100644 tests/qemuxml2argvdata/pseries-cpu-compat-power10.xml
--
2.35.1
2 years, 6 months
[PATCH] Support cpu0-id of Qemu QMP query-sev-capabilities
by Niteesh Dubey
It allows libvirt to provide the value of cpu0-id retuned by the Qemu QMP
command query-sev-capabilities as implemented by the Qemu Patch [1] which
is merged to Qemu master branch and should be available with Qemu 7.1.
This is used to get the signed Chip Endorsement Key (CEK) of the CPU of AMD
system from AMD's Key Distribution Service (KDS).
Similar to cbitpos, reducedPhysBits, maxGuests & maxESGuests;
the value of cpu0-id is also provided using 'virsh domcapability'.
[1] https://lore.kernel.org/all/20220228093014.882288-1-dovmurik@linux.ibm.com/
Signed-off-by: Niteesh Dubey <niteesh(a)linux.ibm.com>
---
include/libvirt/libvirt-host.h | 11 +++++++++++
src/conf/domain_capabilities.c | 4 ++++
src/conf/domain_capabilities.h | 1 +
src/qemu/qemu_capabilities.c | 12 ++++++++++++
src/qemu/qemu_driver.c | 5 +++++
src/qemu/qemu_monitor_json.c | 6 ++++++
6 files changed, 39 insertions(+)
diff --git a/include/libvirt/libvirt-host.h b/include/libvirt/libvirt-host.h
index b5cf8a4a4a..d35abbd9aa 100644
--- a/include/libvirt/libvirt-host.h
+++ b/include/libvirt/libvirt-host.h
@@ -537,6 +537,17 @@ typedef virNodeMemoryStats *virNodeMemoryStatsPtr;
*/
# define VIR_NODE_SEV_CERT_CHAIN "cert-chain"
+/**
+ * VIR_NODE_SEV_CPU0_ID:
+ *
+ * Macro represents the unique ID of CPU0 (socket 0) needed to retrieve
+ * the signed CEK of the CPU from AMD's Key Distribution Service (KDS),
+ * as VIR_TYPED_PARAMS_STRING.
+ *
+ * Since: v8.3.1
+ */
+# define VIR_NODE_SEV_CPU0_ID "cpu0-id"
+
/**
* VIR_NODE_SEV_CBITPOS:
*
diff --git a/src/conf/domain_capabilities.c b/src/conf/domain_capabilities.c
index c394a7a390..2a888da1a9 100644
--- a/src/conf/domain_capabilities.c
+++ b/src/conf/domain_capabilities.c
@@ -601,6 +601,10 @@ virDomainCapsFeatureSEVFormat(virBuffer *buf,
sev->max_guests);
virBufferAsprintf(buf, "<maxESGuests>%d</maxESGuests>\n",
sev->max_es_guests);
+ if (sev->cpu0_id != NULL) {
+ virBufferAsprintf(buf, "<cpu0Id>%s</cpu0Id>\n",
+ sev->cpu0_id);
+ }
virBufferAdjustIndent(buf, -2);
virBufferAddLit(buf, "</sev>\n");
}
diff --git a/src/conf/domain_capabilities.h b/src/conf/domain_capabilities.h
index 1d2f4ac7a5..f2eed80b15 100644
--- a/src/conf/domain_capabilities.h
+++ b/src/conf/domain_capabilities.h
@@ -185,6 +185,7 @@ typedef struct _virSEVCapability virSEVCapability;
struct _virSEVCapability {
char *pdh;
char *cert_chain;
+ char *cpu0_id;
unsigned int cbitpos;
unsigned int reduced_phys_bits;
unsigned int max_guests;
diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
index b91db851bb..2d3165e74a 100644
--- a/src/qemu/qemu_capabilities.c
+++ b/src/qemu/qemu_capabilities.c
@@ -1957,6 +1957,9 @@ virQEMUCapsSEVInfoCopy(virSEVCapability **dst,
tmp->pdh = g_strdup(src->pdh);
tmp->cert_chain = g_strdup(src->cert_chain);
+ if (src->cpu0_id != NULL) {
+ tmp->cpu0_id = g_strdup(src->cpu0_id);
+ }
tmp->cbitpos = src->cbitpos;
tmp->reduced_phys_bits = src->reduced_phys_bits;
@@ -4693,6 +4696,11 @@ virQEMUCapsFormatSEVInfo(virQEMUCaps *qemuCaps, virBuffer *buf)
virBufferEscapeString(buf, "<pdh>%s</pdh>\n", sev->pdh);
virBufferEscapeString(buf, "<certChain>%s</certChain>\n",
sev->cert_chain);
+ if (sev->cpu0_id != NULL) {
+ virBufferEscapeString(buf, "<cpu0Id>%s</cpu0Id>\n",
+ sev->cpu0_id);
+ }
+
virBufferAdjustIndent(buf, -2);
virBufferAddLit(buf, "</sev>\n");
}
@@ -6478,6 +6486,10 @@ virQEMUCapsFillDomainFeatureSEVCaps(virQEMUCaps *qemuCaps,
domCaps->sev->pdh = g_strdup(cap->pdh);
domCaps->sev->cert_chain = g_strdup(cap->cert_chain);
+ if (cap->cpu0_id != NULL) {
+ domCaps->sev->cpu0_id = g_strdup(cap->cpu0_id);
+ }
+
domCaps->sev->cbitpos = cap->cbitpos;
domCaps->sev->reduced_phys_bits = cap->reduced_phys_bits;
domCaps->sev->max_guests = cap->max_guests;
diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c
index ee0963c30d..464c080409 100644
--- a/src/qemu/qemu_driver.c
+++ b/src/qemu/qemu_driver.c
@@ -19861,6 +19861,11 @@ qemuGetSEVInfoToParams(virQEMUCaps *qemuCaps,
VIR_NODE_SEV_CERT_CHAIN, sev->cert_chain) < 0)
goto cleanup;
+ if ((sev->cpu0_id != NULL) &&
+ (virTypedParamsAddString(&sevParams, &n, &maxpar,
+ VIR_NODE_SEV_CPU0_ID, sev->cpu0_id) < 0))
+ goto cleanup;
+
if (virTypedParamsAddUInt(&sevParams, &n, &maxpar,
VIR_NODE_SEV_CBITPOS, sev->cbitpos) < 0)
goto cleanup;
diff --git a/src/qemu/qemu_monitor_json.c b/src/qemu/qemu_monitor_json.c
index 776f4ab2ea..9e611e93e8 100644
--- a/src/qemu/qemu_monitor_json.c
+++ b/src/qemu/qemu_monitor_json.c
@@ -6400,6 +6400,7 @@ qemuMonitorJSONGetSEVCapabilities(qemuMonitor *mon,
virJSONValue *caps;
const char *pdh = NULL;
const char *cert_chain = NULL;
+ const char *cpu0_id = NULL;
unsigned int cbitpos;
unsigned int reduced_phys_bits;
g_autoptr(virSEVCapability) capability = NULL;
@@ -6457,6 +6458,11 @@ qemuMonitorJSONGetSEVCapabilities(qemuMonitor *mon,
capability->cert_chain = g_strdup(cert_chain);
+ cpu0_id = virJSONValueObjectGetString(caps, "cpu0-id");
+ if (cpu0_id != NULL) {
+ capability->cpu0_id = g_strdup(cpu0_id);
+ }
+
capability->cbitpos = cbitpos;
capability->reduced_phys_bits = reduced_phys_bits;
*capabilities = g_steal_pointer(&capability);
--
2.25.1
2 years, 6 months
[libvirt PATCH 0/2] API documentation fixes
by Andrea Bolognani
Andrea Bolognani (2):
lib: Drop "type hint" comments
include: Explicitly reserve values for overlapping flag types
include/libvirt/libvirt-common.h.in | 19 +++++++++++++++++--
include/libvirt/libvirt-domain.h | 8 ++++----
src/libvirt-network.c | 4 ++--
3 files changed, 23 insertions(+), 8 deletions(-)
--
2.35.1
2 years, 6 months
[PATCH 0/2] virnetdev: Fix regression in setting VLAN tag
by Michal Privoznik
*** BLURB HERE ***
Michal Prívozník (2):
virNetDevSetVfMac: Fix error message on invalid args
virnetdev: Fix regression in setting VLAN tag
src/util/virnetdev.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
--
2.35.1
2 years, 6 months
[libvirt PATCH 0/8] Improve heuristics for computing baseline CPU models
by Jiri Denemark
See 7/8 and 8/8 for details.
https://bugzilla.redhat.com/show_bug.cgi?id=1851227
Jiri Denemark (8):
cpu_map: Disable cpu64-rhel* for host-model and baseline
cputest: Drop some old artificial baseline tests
cputest: Give better names to baseline tests
cputest: Add some real world baseline tests
cpu_x86: Consolidate signature match in x86DecodeUseCandidate
cpu_x86: Refactor feature list comparison in x86DecodeUseCandidate
cpu_x86: Penalize disabled features when computing CPU model
cpu_x86: Ignore enabled features for input models in
x86DecodeUseCandidate
src/cpu/cpu_x86.c | 156 ++++++++++++------
src/cpu_map/x86_cpu64-rhel5.xml | 2 +-
src/cpu_map/x86_cpu64-rhel6.xml | 2 +-
tests/cputest.c | 136 ++++++++++++---
.../cputestdata/x86_64-baseline-1-result.xml | 5 -
tests/cputestdata/x86_64-baseline-1.xml | 20 ---
.../cputestdata/x86_64-baseline-2-result.xml | 4 -
tests/cputestdata/x86_64-baseline-2.xml | 22 ---
.../x86_64-baseline-5-expanded.xml | 47 ------
tests/cputestdata/x86_64-baseline-5.xml | 35 ----
.../x86_64-baseline-6-migratable.xml | 10 --
.../cputestdata/x86_64-baseline-7-result.xml | 4 -
tests/cputestdata/x86_64-baseline-7.xml | 24 ---
.../cputestdata/x86_64-baseline-8-result.xml | 4 -
tests/cputestdata/x86_64-baseline-8.xml | 28 ----
...-baseline-Westmere+Nehalem-migratable.xml} | 8 +-
...6_64-baseline-Westmere+Nehalem-result.xml} | 8 +-
...l => x86_64-baseline-Westmere+Nehalem.xml} | 0
... => x86_64-baseline-features-expanded.xml} | 0
...ml => x86_64-baseline-features-result.xml} | 0
...ine-4.xml => x86_64-baseline-features.xml} | 0
.../x86_64-baseline-no-vendor-result.xml | 3 +-
...ml => x86_64-baseline-simple-expanded.xml} | 0
....xml => x86_64-baseline-simple-result.xml} | 0
...eline-3.xml => x86_64-baseline-simple.xml} | 0
.../x86_64-cpuid-Atom-D510-guest.xml | 5 +-
.../x86_64-cpuid-Atom-N450-guest.xml | 5 +-
.../x86_64-cpuid-Phenom-B95-json.xml | 21 ++-
...id-baseline-Broadwell-IBRS+Cascadelake.xml | 14 ++
..._64-cpuid-baseline-Cascadelake+Icelake.xml | 15 ++
...puid-baseline-Cascadelake+Skylake-IBRS.xml | 13 ++
..._64-cpuid-baseline-Cascadelake+Skylake.xml | 8 +
...-cpuid-baseline-Cooperlake+Cascadelake.xml | 22 +++
...6_64-cpuid-baseline-Cooperlake+Icelake.xml | 15 ++
.../x86_64-cpuid-baseline-EPYC+Rome.xml | 13 ++
.../x86_64-cpuid-baseline-Haswell+Skylake.xml | 14 ++
...-baseline-Haswell-noTSX-IBRS+Broadwell.xml | 14 ++
...seline-Haswell-noTSX-IBRS+Skylake-IBRS.xml | 14 ++
...id-baseline-Haswell-noTSX-IBRS+Skylake.xml | 14 ++
.../x86_64-cpuid-baseline-Ryzen+Rome.xml | 13 ++
...4-cpuid-baseline-Skylake-Client+Server.xml | 9 +
.../x86_64-host+guest,models-result.xml | 10 +-
.../domaincapsdata/qemu_3.1.0-tcg.x86_64.xml | 35 ++--
.../domaincapsdata/qemu_4.0.0-tcg.x86_64.xml | 36 ++--
.../domaincapsdata/qemu_4.1.0-tcg.x86_64.xml | 37 +++--
.../domaincapsdata/qemu_4.2.0-tcg.x86_64.xml | 37 +++--
.../domaincapsdata/qemu_5.0.0-tcg.x86_64.xml | 36 ++--
.../domaincapsdata/qemu_5.1.0-tcg.x86_64.xml | 36 ++--
.../domaincapsdata/qemu_5.2.0-tcg.x86_64.xml | 36 ++--
.../domaincapsdata/qemu_6.0.0-tcg.x86_64.xml | 36 ++--
.../domaincapsdata/qemu_6.1.0-tcg.x86_64.xml | 36 ++--
.../domaincapsdata/qemu_6.2.0-tcg.x86_64.xml | 36 ++--
.../domaincapsdata/qemu_7.0.0-tcg.x86_64.xml | 36 ++--
tests/qemuxml2argvdata/cpu-fallback.args | 2 +-
.../cpu-host-model-cmt.x86_64-4.0.0.args | 2 +-
.../cpu-host-model-fallback.args | 2 +-
56 files changed, 681 insertions(+), 459 deletions(-)
delete mode 100644 tests/cputestdata/x86_64-baseline-1-result.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-1.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-2-result.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-2.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-5-expanded.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-5.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-6-migratable.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-7-result.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-7.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-8-result.xml
delete mode 100644 tests/cputestdata/x86_64-baseline-8.xml
rename tests/cputestdata/{x86_64-baseline-5-result.xml => x86_64-baseline-Westmere+Nehalem-migratable.xml} (51%)
rename tests/cputestdata/{x86_64-baseline-6-result.xml => x86_64-baseline-Westmere+Nehalem-result.xml} (54%)
rename tests/cputestdata/{x86_64-baseline-6.xml => x86_64-baseline-Westmere+Nehalem.xml} (100%)
rename tests/cputestdata/{x86_64-baseline-4-expanded.xml => x86_64-baseline-features-expanded.xml} (100%)
rename tests/cputestdata/{x86_64-baseline-4-result.xml => x86_64-baseline-features-result.xml} (100%)
rename tests/cputestdata/{x86_64-baseline-4.xml => x86_64-baseline-features.xml} (100%)
rename tests/cputestdata/{x86_64-baseline-3-expanded.xml => x86_64-baseline-simple-expanded.xml} (100%)
rename tests/cputestdata/{x86_64-baseline-3-result.xml => x86_64-baseline-simple-result.xml} (100%)
rename tests/cputestdata/{x86_64-baseline-3.xml => x86_64-baseline-simple.xml} (100%)
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml
--
2.35.1
2 years, 6 months
[PATCH] include: Fix unmatched parentheses in comment
by Andrea Bolognani
Signed-off-by: Andrea Bolognani <abologna(a)redhat.com>
---
Pushed as trivial.
include/libvirt/libvirt-network.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/libvirt/libvirt-network.h b/include/libvirt/libvirt-network.h
index d3e3fdeecf..90cde0cf24 100644
--- a/include/libvirt/libvirt-network.h
+++ b/include/libvirt/libvirt-network.h
@@ -176,7 +176,7 @@ int virNetworkUndefine (virNetworkPtr network);
* Since: 0.10.2
*/
typedef enum {
- VIR_NETWORK_UPDATE_COMMAND_NONE = 0, /* (invalid (Since: 0.10.2) */
+ VIR_NETWORK_UPDATE_COMMAND_NONE = 0, /* invalid (Since: 0.10.2) */
VIR_NETWORK_UPDATE_COMMAND_MODIFY = 1, /* modify an existing element (Since: 0.10.2) */
VIR_NETWORK_UPDATE_COMMAND_DELETE = 2, /* delete an existing element (Since: 0.10.2) */
VIR_NETWORK_UPDATE_COMMAND_ADD_LAST = 3, /* add an element at end of list (Since: 0.10.2) */
@@ -195,7 +195,7 @@ typedef enum {
* Since: 0.10.2
*/
typedef enum {
- VIR_NETWORK_SECTION_NONE = 0, /* (invalid (Since: 0.10.2) */
+ VIR_NETWORK_SECTION_NONE = 0, /* invalid (Since: 0.10.2) */
VIR_NETWORK_SECTION_BRIDGE = 1, /* <bridge> (Since: 0.10.2) */
VIR_NETWORK_SECTION_DOMAIN = 2, /* <domain> (Since: 0.10.2) */
VIR_NETWORK_SECTION_IP = 3, /* <ip> (Since: 0.10.2) */
--
2.35.1
2 years, 6 months
