November 2019 - Devel - Libvirt List Archives

[libvirt] [PATCH 0/2] qemuProcessStop: Simulate blockjob --abort on destroy

by Michal Privoznik

See 2/2 for explanation. Michal Prívozník (2): qemu: Separate image metadata removal into a function qemuProcessStop: Simulate blockjob --abort on destroy src/qemu/qemu_block.c | 25 ++++++++++++++++++++++ src/qemu/qemu_block.h | 6 ++++++ src/qemu/qemu_blockjob.c | 45 ++++------------------------------------ src/qemu/qemu_process.c | 9 ++++++++ 4 files changed, 44 insertions(+), 41 deletions(-) -- 2.23.0

5 years

2
13
0 / 0

[libvirt] [PATCH 0/7] docs: fix various problems in docs and cleanup rules

by Daniel P. Berrangé

There were a few problems in the docs build from the vpath build https://www.redhat.com/archives/libvir-list/2019-November/msg00308.html - We can't browse the website from the build dir - Including of the acl permissions was broken This series fixes those two problems and also fixes the generation of API reference docs for admin, qemu & lxc APIs. Finally there's a bunch of cleanups / simplifications in build rules Daniel P. Berrangé (7): docs: stop using custom rules for building / installing web pages Drop building of API -refs.xml files docs: use variable for referencing API XML filenames docs: generate API reference pages for admin, qemu & lxc libraries docs: remove unused make targets docs: fix ability to view web pages from build tree docs: fix include of ACL permissions files docs/Makefile.am | 180 +++++++++++++++++++++++----------------------- docs/apibuild.py | 170 ------------------------------------------- docs/docs.html.in | 4 ++ docs/newapi.xsl | 14 ++-- docs/page.xsl | 4 +- 5 files changed, 103 insertions(+), 269 deletions(-) -- 2.23.0

5 years

2
9
0 / 0

[libvirt] [PATCH 4/4] domaincapstest: Add CPU model Dhyana to QEMU

by Yingle Hou

Add CPU model Dhyana to QEMU 4.1.0 and QEMU 4.2.0 in tests/domaincapstest/. Signed-off-by: Yingle Hou <houyingle(a)hygon.cn> --- tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.1.0.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.2.0.x86_64.xml | 1 + 6 files changed, 6 insertions(+) diff --git a/tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml b/tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml index c87c6ea..5f0f1ba 100644 --- a/tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml @@ -87,6 +87,7 @@ <model usable='yes'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='yes'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml index 9b03dac..22eeb26 100644 --- a/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml @@ -97,6 +97,7 @@ <model usable='no'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='no'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.1.0.x86_64.xml b/tests/domaincapsdata/qemu_4.1.0.x86_64.xml index 97533c6..13b5762 100644 --- a/tests/domaincapsdata/qemu_4.1.0.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.1.0.x86_64.xml @@ -86,6 +86,7 @@ <model usable='yes'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='yes'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml b/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml index 5fbba2c..29cfb00 100644 --- a/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml @@ -87,6 +87,7 @@ <model usable='yes'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='yes'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml index de576d5..deee111 100644 --- a/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml @@ -97,6 +97,7 @@ <model usable='no'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='no'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.2.0.x86_64.xml b/tests/domaincapsdata/qemu_4.2.0.x86_64.xml index 7938433..983bba8 100644 --- a/tests/domaincapsdata/qemu_4.2.0.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.2.0.x86_64.xml @@ -86,6 +86,7 @@ <model usable='yes'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='yes'>Broadwell-noTSX-IBRS</model> -- 1.8.3.1

5 years

1
0
0 / 0

[libvirt] [PATCH 4/4] domaincapstest: Add CPU model Dhyana to QEMU

by Yingle Hou

Add CPU model Dhyana to QEMU 4.1.0 and QEMU 4.2.0 in tests/domaincapstest/. Signed-off-by: Yingle Hou <houyingle(a)hygon.cn> --- tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.1.0.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.2.0.x86_64.xml | 1 + 6 files changed, 6 insertions(+) diff --git a/tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml b/tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml index c87c6ea..5f0f1ba 100644 --- a/tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml @@ -87,6 +87,7 @@ <model usable='yes'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='yes'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml index 9b03dac..22eeb26 100644 --- a/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml @@ -97,6 +97,7 @@ <model usable='no'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='no'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.1.0.x86_64.xml b/tests/domaincapsdata/qemu_4.1.0.x86_64.xml index 97533c6..13b5762 100644 --- a/tests/domaincapsdata/qemu_4.1.0.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.1.0.x86_64.xml @@ -86,6 +86,7 @@ <model usable='yes'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='yes'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml b/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml index 5fbba2c..29cfb00 100644 --- a/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml @@ -87,6 +87,7 @@ <model usable='yes'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='yes'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml index de576d5..deee111 100644 --- a/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml @@ -97,6 +97,7 @@ <model usable='no'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='no'>Broadwell-noTSX-IBRS</model> diff --git a/tests/domaincapsdata/qemu_4.2.0.x86_64.xml b/tests/domaincapsdata/qemu_4.2.0.x86_64.xml index 7938433..983bba8 100644 --- a/tests/domaincapsdata/qemu_4.2.0.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.2.0.x86_64.xml @@ -86,6 +86,7 @@ <model usable='yes'>Haswell</model> <model usable='no'>EPYC-IBPB</model> <model usable='no'>EPYC</model> + <model usable='no'>Dhyana</model> <model usable='yes'>Conroe</model> <model usable='no'>Cascadelake-Server</model> <model usable='yes'>Broadwell-noTSX-IBRS</model> -- 1.8.3.1

5 years

1
0
0 / 0

[libvirt] [PATCH 3/4] cputest: Add CPUID data for Hygon Dhyana 7185 32-core Processor

by Yingle Hou

Add Hygon Dhyana CPU data test case related files. Signed-off-by: Yingle Hou <houyingle(a)hygon.cn> --- tests/cputest.c | 1 + ...86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml | 7 + ...x86_64-cpuid-Hygon-C86-7185-32-core-enabled.xml | 9 + .../x86_64-cpuid-Hygon-C86-7185-32-core-guest.xml | 16 + .../x86_64-cpuid-Hygon-C86-7185-32-core-host.xml | 17 + .../x86_64-cpuid-Hygon-C86-7185-32-core-json.xml | 12 + .../x86_64-cpuid-Hygon-C86-7185-32-core.json | 1631 ++++++++++++++++++++ .../x86_64-cpuid-Hygon-C86-7185-32-core.sig | 4 + .../x86_64-cpuid-Hygon-C86-7185-32-core.xml | 54 + 9 files changed, 1751 insertions(+) create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.json create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.sig create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.xml diff --git a/tests/cputest.c b/tests/cputest.c index b883ba7..0bd62ee 100644 --- a/tests/cputest.c +++ b/tests/cputest.c @@ -1243,6 +1243,7 @@ mymain(void) DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i7-8700", JSON_MODELS); DO_TEST_CPUID(VIR_ARCH_X86_64, "Core2-E6850", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Core2-Q9500", JSON_NONE); + DO_TEST_CPUID(VIR_ARCH_X86_64, "Hygon-C86-7185-32-core", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "EPYC-7601-32-Core", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "EPYC-7601-32-Core-ibpb", JSON_MODELS_REQUIRED); DO_TEST_CPUID(VIR_ARCH_X86_64, "FX-8150", JSON_NONE); diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml new file mode 100644 index 0000000..747d725 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml @@ -0,0 +1,7 @@ + +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x08000008' edx='0x10000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000008' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x01c2300c' edx='0x00000000'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-enabled.xml b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-enabled.xml new file mode 100644 index 0000000..fcefcf7 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-enabled.xml @@ -0,0 +1,9 @@ + +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0xf5f83201' edx='0x078bfbff'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x009c01ab' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000007' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x000003f3' edx='0x2e500800'/> + <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x00000000' ebx='0x02001000' ecx='0x00000000' edx='0x00000000'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-guest.xml b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-guest.xml new file mode 100644 index 0000000..c2541b3 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-guest.xml @@ -0,0 +1,16 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Dhyana</model> + <vendor>Hygon</vendor> + <feature policy='require' name='ht'/> + <feature policy='require' name='osxsave'/> + <feature policy='require' name='xsaves'/> + <feature policy='require' name='cmp_legacy'/> + <feature policy='require' name='extapic'/> + <feature policy='require' name='skinit'/> + <feature policy='require' name='wdt'/> + <feature policy='require' name='tce'/> + <feature policy='require' name='topoext'/> + <feature policy='require' name='perfctr_core'/> + <feature policy='require' name='perfctr_nb'/> + <feature policy='require' name='invtsc'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-host.xml b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-host.xml new file mode 100644 index 0000000..5199708 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-host.xml @@ -0,0 +1,17 @@ +<cpu> + <arch>x86_64</arch> + <model>Dhyana</model> + <vendor>Hygon</vendor> + <feature name='ht'/> + <feature name='osxsave'/> + <feature name='xsaves'/> + <feature name='cmp_legacy'/> + <feature name='extapic'/> + <feature name='skinit'/> + <feature name='wdt'/> + <feature name='tce'/> + <feature name='topoext'/> + <feature name='perfctr_core'/> + <feature name='perfctr_nb'/> + <feature name='invtsc'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-json.xml b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-json.xml new file mode 100644 index 0000000..d3003b6 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-json.xml @@ -0,0 +1,12 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Dhyana</model> + <vendor>Hygon</vendor> + <feature policy='require' name='x2apic'/> + <feature policy='require' name='tsc-deadline'/> + <feature policy='require' name='hypervisor'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='cmp_legacy'/> + <feature policy='require' name='virt-ssbd'/> + <feature policy='disable' name='monitor'/> + <feature policy='disable' name='svm'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.json b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.json new file mode 100644 index 0000000..1d06d05 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.json @@ -0,0 +1,1631 @@ +{ + "return": { + "model": { + "name": "base", + "props": { + "phys-bits": 0, + "core-id": -1, + "xlevel": 2147483674, + "cmov": true, + "ia64": false, + "ssb-no": false, + "aes": false, + "mmx": true, + "rdpid": false, + "arat": true, + "gfni": false, + "ibrs-all": false, + "pause-filter": false, + "xsavec": true, + "intel-pt": false, + "hv-frequencies": false, + "tsc-frequency": 0, + "xd": true, + "x-intel-pt-auto-level": true, + "hv-vendor-id": "", + "kvm-asyncpf": true, + "kvm_asyncpf": true, + "perfctr_core": false, + "perfctr-core": false, + "mpx": false, + "pbe": false, + "decodeassists": false, + "avx512cd": false, + "sse4_1": true, + "sse4.1": true, + "sse4-1": true, + "family": 24, + "legacy-cache": true, + "host-phys-bits-limit": 0, + "vmware-cpuid-freq": true, + "wbnoinvd": false, + "avx512f": false, + "hv-stimer-direct": false, + "msr": true, + "mce": true, + "mca": true, + "hv-runtime": false, + "xcrypt": false, + "thread-id": -1, + "min-level": 13, + "xgetbv1": true, + "cid": false, + "hv-relaxed": false, + "hv-crash": false, + "ds": false, + "fxsr": true, + "xsaveopt": true, + "xtpr": false, + "hv-evmcs": false, + "avx512vl": false, + "avx512-vpopcntdq": false, + "phe": false, + "extapic": false, + "3dnowprefetch": true, + "avx512vbmi2": false, + "cr8legacy": true, + "stibp": false, + "cpuid-0xb": true, + "xcrypt-en": false, + "kvm_pv_eoi": true, + "apic-id": 4294967295, + "rsba": false, + "pn": false, + "dca": false, + "vendor": "HygonGenuine", + "hv-ipi": false, + "pku": false, + "smx": false, + "cmp_legacy": true, + "cmp-legacy": true, + "node-id": -1, + "avx512-4fmaps": false, + "vmcb_clean": false, + "vmcb-clean": false, + "3dnowext": false, + "amd-no-ssb": false, + "hle": false, + "npt": true, + "rdctl-no": false, + "memory": "/machine/unattached/system[0]", + "clwb": false, + "lbrv": false, + "adx": true, + "ss": false, + "pni": true, + "svm_lock": false, + "svm-lock": false, + "pfthreshold": false, + "smep": true, + "smap": true, + "x2apic": true, + "avx512vbmi": false, + "avx512vnni": false, + "hv-stimer": false, + "x-hv-synic-kvm-only": false, + "i64": true, + "flushbyasid": false, + "f16c": true, + "ace2-en": false, + "pat": true, + "pae": true, + "sse": true, + "die-id": -1, + "phe-en": false, + "kvm_nopiodelay": true, + "kvm-nopiodelay": true, + "tm": false, + "kvmclock-stable-bit": true, + "hypervisor": true, + "socket-id": -1, + "mds-no": false, + "pcommit": false, + "syscall": true, + "level": 13, + "avx512dq": false, + "x-migrate-smi-count": true, + "svm": false, + "full-cpuid-auto-level": true, + "hv-reset": false, + "invtsc": false, + "sse3": true, + "sse2": true, + "ssbd": false, + "est": false, + "avx512ifma": false, + "tm2": false, + "kvm-pv-ipi": false, + "kvm-pv-eoi": true, + "cx8": true, + "cldemote": false, + "hv-reenlightenment": false, + "kvm_mmu": false, + "kvm-mmu": false, + "sse4_2": true, + "sse4.2": true, + "sse4-2": true, + "pge": true, + "fill-mtrr-mask": true, + "avx512bitalg": false, + "nodeid_msr": false, + "pdcm": false, + "movbe": true, + "model": 0, + "nrip_save": true, + "nrip-save": true, + "kvm_pv_unhalt": true, + "ssse3": true, + "sse4a": true, + "invpcid": false, + "pdpe1gb": true, + "tsc-deadline": true, + "skip-l1dfl-vmentry": false, + "fma": true, + "cx16": true, + "de": true, + "enforce": false, + "stepping": 1, + "xsave": true, + "clflush": true, + "skinit": false, + "tsc": true, + "tce": false, + "fpu": true, + "ibs": false, + "ds_cpl": false, + "ds-cpl": false, + "host-phys-bits": false, + "fma4": false, + "la57": false, + "osvw": true, + "check": true, + "hv-spinlocks": 4294967295, + "pmu": false, + "pmm": false, + "apic": true, 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true + }, + { + "name": "Icelake-Client-v1", + "typename": "Icelake-Client-v1-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm", + "avx512vbmi", + "umip", + "pku", + "avx512vbmi2", + "gfni", + "vaes", + "vpclmulqdq", + "avx512vnni", + "avx512bitalg", + "avx512-vpopcntdq", + "spec-ctrl", + "ssbd", + "wbnoinvd", + "pku" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Icelake-Client", + "typename": "Icelake-Client-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm", + "avx512vbmi", + "umip", + "pku", + "avx512vbmi2", + "gfni", + "vaes", + "vpclmulqdq", + "avx512vnni", + "avx512bitalg", + "avx512-vpopcntdq", + "spec-ctrl", + "ssbd", + "wbnoinvd", + "pku" + ], + "alias-of": "Icelake-Client-v1", + "static": false, + "migration-safe": true + }, + { + "name": "Haswell-v4", + "typename": "Haswell-v4-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "erms", + "invpcid", + "spec-ctrl" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Haswell-v3", + "typename": "Haswell-v3-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm", + "spec-ctrl" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Haswell-v2", + "typename": "Haswell-v2-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "erms", + "invpcid" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Haswell-v1", + "typename": "Haswell-v1-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Haswell-noTSX-IBRS", + "typename": "Haswell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "erms", + "invpcid", + "spec-ctrl" + ], + "alias-of": "Haswell-v4", + "static": false, + "migration-safe": true + }, + { + "name": "Haswell-noTSX", + "typename": "Haswell-noTSX-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "erms", + "invpcid" + ], + "alias-of": "Haswell-v2", + "static": false, + "migration-safe": true + }, + { + "name": "Haswell-IBRS", + "typename": "Haswell-IBRS-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm", + "spec-ctrl" + ], + "alias-of": "Haswell-v3", + "static": false, + "migration-safe": true + }, + { + "name": "Haswell", + "typename": "Haswell-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm" + ], + "alias-of": "Haswell-v1", + "static": false, + "migration-safe": true + }, + { + "name": "EPYC-v2", + "typename": "EPYC-v2-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "aes", + "sha-ni" + ], + "static": false, + "migration-safe": true + }, + { + "name": "EPYC-v1", + "typename": "EPYC-v1-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "aes", + "sha-ni" + ], + "static": false, + "migration-safe": true + }, + { + "name": "EPYC-IBPB", + "typename": "EPYC-IBPB-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "aes", + "sha-ni" + ], + "alias-of": "EPYC-v2", + "static": false, + "migration-safe": true + }, + { + "name": "EPYC", + "typename": "EPYC-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "aes", + "sha-ni" + ], + "alias-of": "EPYC-v1", + "static": false, + "migration-safe": true + }, + { + "name": "Dhyana-v1", + "typename": "Dhyana-v1-x86_64-cpu", + "unavailable-features": [], + "static": false, + "migration-safe": true + }, + { + "name": "Dhyana", + "typename": "Dhyana-x86_64-cpu", + "unavailable-features": [], + "alias-of": "Dhyana-v1", + "static": false, + "migration-safe": true + }, + { + "name": "Conroe-v1", + "typename": "Conroe-v1-x86_64-cpu", + "unavailable-features": [], + "static": false, + "migration-safe": true + }, + { + "name": "Conroe", + "typename": "Conroe-x86_64-cpu", + "unavailable-features": [], + "alias-of": "Conroe-v1", + "static": false, + "migration-safe": true + }, + { + "name": "Cascadelake-Server-v2", + "typename": "Cascadelake-Server-v2-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm", + "avx512f", + "avx512dq", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "pku", + "avx512vnni", + "spec-ctrl", + "arch-capabilities", + "ssbd", + "avx512f", + "avx512f", + "avx512f", + "pku", + "rdctl-no", + "ibrs-all", + "skip-l1dfl-vmentry", + "mds-no" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Cascadelake-Server-v1", + "typename": "Cascadelake-Server-v1-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm", + "avx512f", + "avx512dq", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "pku", + "avx512vnni", + "spec-ctrl", + "ssbd", + "avx512f", + "avx512f", + "avx512f", + "pku" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Cascadelake-Server", + "typename": "Cascadelake-Server-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm", + "avx512f", + "avx512dq", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "pku", + "avx512vnni", + "spec-ctrl", + "ssbd", + "avx512f", + "avx512f", + "avx512f", + "pku" + ], + "alias-of": "Cascadelake-Server-v1", + "static": false, + "migration-safe": true + }, + { + "name": "Broadwell-v4", + "typename": "Broadwell-v4-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "erms", + "invpcid", + "spec-ctrl" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Broadwell-v3", + "typename": "Broadwell-v3-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm", + "spec-ctrl" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Broadwell-v2", + "typename": "Broadwell-v2-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "erms", + "invpcid" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Broadwell-v1", + "typename": "Broadwell-v1-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm" + ], + "static": false, + "migration-safe": true + }, + { + "name": "Broadwell-noTSX-IBRS", + "typename": "Broadwell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "erms", + "invpcid", + "spec-ctrl" + ], + "alias-of": "Broadwell-v4", + "static": false, + "migration-safe": true + }, + { + "name": "Broadwell-noTSX", + "typename": "Broadwell-noTSX-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "erms", + "invpcid" + ], + "alias-of": "Broadwell-v2", + "static": false, + "migration-safe": true + }, + { + "name": "Broadwell-IBRS", + "typename": "Broadwell-IBRS-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm", + "spec-ctrl" + ], + "alias-of": "Broadwell-v3", + "static": false, + "migration-safe": true + }, + { + "name": "Broadwell", + "typename": "Broadwell-x86_64-cpu", + "unavailable-features": [ + "pclmulqdq", + "pcid", + "aes", + "hle", + "erms", + "invpcid", + "rtm" + ], + "alias-of": "Broadwell-v1", + "static": false, + "migration-safe": true + }, + { + "name": "486-v1", + "typename": "486-v1-x86_64-cpu", + "unavailable-features": [], + "static": false, + "migration-safe": true + }, + { + "name": "486", + "typename": "486-x86_64-cpu", + "unavailable-features": [], + "alias-of": "486-v1", + "static": false, + "migration-safe": true + } + ], + "id": "definitions" +} diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.sig b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.sig new file mode 100644 index 0000000..d511998 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.sig @@ -0,0 +1,4 @@ +900f01 +family: 24 (0x18) +model: 0 (0x00) +stepping: 1 (0x01) diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.xml b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.xml new file mode 100644 index 0000000..7ea825b --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.xml @@ -0,0 +1,54 @@ + +<cpudata arch='x86'> + <cpuid eax_in='0x00000000' ecx_in='0x00' eax='0x0000000d' ebx='0x6f677948' ecx='0x656e6975' edx='0x6e65476e'/> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00900f01' ebx='0x3b400800' ecx='0x7cd83209' edx='0x178bfbff'/> + <cpuid eax_in='0x00000002' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000003' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000005' ecx_in='0x00' eax='0x00000040' ebx='0x00000040' ecx='0x00000003' edx='0x00000011'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000001' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x009c01a9' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000008' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000009' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000a' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x00' eax='0x00000007' ebx='0x00000340' ecx='0x00000340' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x0000000f' ebx='0x00000340' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x02' eax='0x00000100' ebx='0x00000240' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000000' ecx_in='0x00' eax='0x8000001f' ebx='0x6f677948' ecx='0x656e6975' edx='0x6e65476e'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00900f01' ebx='0x40000000' ecx='0x35c233ff' edx='0x2fd3fbff'/> + <cpuid eax_in='0x80000002' ecx_in='0x00' eax='0x6f677948' ebx='0x3843206e' ecx='0x31372036' edx='0x33203538'/> + <cpuid eax_in='0x80000003' ecx_in='0x00' eax='0x6f632d32' ebx='0x50206572' ecx='0x65636f72' edx='0x726f7373'/> + <cpuid eax_in='0x80000004' ecx_in='0x00' eax='0x20202020' ebx='0x20202020' ecx='0x20202020' edx='0x00202020'/> + <cpuid eax_in='0x80000005' ecx_in='0x00' eax='0xff40ff40' ebx='0xff40ff40' ecx='0x20080140' edx='0x40040140'/> + <cpuid eax_in='0x80000006' ecx_in='0x00' eax='0x36006400' ebx='0x56006400' ecx='0x02006140' edx='0x0200c140'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x0000001b' ecx='0x00000000' edx='0x00006599'/> + <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x00003030' ebx='0x00001007' ecx='0x0000603f' edx='0x00000000'/> + <cpuid eax_in='0x80000009' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000a' ecx_in='0x00' eax='0x00000001' ebx='0x00008000' ecx='0x00000000' edx='0x0001bcff'/> + <cpuid eax_in='0x8000000b' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000d' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000e' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000f' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000010' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000011' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000012' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000013' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000014' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000015' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000016' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000017' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000018' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000019' ecx_in='0x00' eax='0xf040f040' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000001a' ecx_in='0x00' eax='0x00000003' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000001b' ecx_in='0x00' eax='0x000003ff' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000001c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000001d' ecx_in='0x00' eax='0x00004121' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x8000001d' ecx_in='0x01' eax='0x00004122' ebx='0x00c0003f' ecx='0x000000ff' edx='0x00000000'/> + <cpuid eax_in='0x8000001d' ecx_in='0x02' eax='0x00004143' ebx='0x01c0003f' ecx='0x000003ff' edx='0x00000002'/> + <cpuid eax_in='0x8000001d' ecx_in='0x03' eax='0x0001c163' ebx='0x03c0003f' ecx='0x00001fff' edx='0x00000001'/> + <cpuid eax_in='0x8000001e' ecx_in='0x00' eax='0x0000003b' ebx='0x0000011d' ecx='0x00000303' edx='0x00000000'/> + <cpuid eax_in='0x8000001f' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80860000' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0xc0000000' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> +</cpudata> -- 1.8.3.1

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[libvirt] [PATCH 2/4] cpu: Add new Dhyana CPU model

by Yingle Hou

Add Hygon Dhyana CPU model to the processor model. Signed-off-by: Yingle Hou <houyingle(a)hygon.cn> --- src/cpu_map/Makefile.inc.am | 1 + src/cpu_map/index.xml | 3 ++ src/cpu_map/x86_Dhyana.xml | 70 +++++++++++++++++++++++++++++++++++++++++++++ src/cpu_map/x86_vendors.xml | 1 + 4 files changed, 75 insertions(+) create mode 100644 src/cpu_map/x86_Dhyana.xml diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am index 7eb86c8..e935178 100644 --- a/src/cpu_map/Makefile.inc.am +++ b/src/cpu_map/Makefile.inc.am @@ -25,6 +25,7 @@ cpumap_DATA = \ cpu_map/x86_coreduo.xml \ cpu_map/x86_cpu64-rhel5.xml \ cpu_map/x86_cpu64-rhel6.xml \ + cpu_map/x86_Dhyana.xml \ cpu_map/x86_EPYC.xml \ cpu_map/x86_EPYC-IBPB.xml \ cpu_map/x86_Haswell.xml \ diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index ed45083..ffb2f6f 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -60,6 +60,9 @@ <include filename="x86_Opteron_G5.xml"/> <include filename="x86_EPYC.xml"/> <include filename="x86_EPYC-IBPB.xml"/> + +  + <include filename="x86_Dhyana.xml"/> </arch> <arch name='ppc64'> diff --git a/src/cpu_map/x86_Dhyana.xml b/src/cpu_map/x86_Dhyana.xml new file mode 100644 index 0000000..cbc8020 --- /dev/null +++ b/src/cpu_map/x86_Dhyana.xml @@ -0,0 +1,70 @@ +<cpus> + <model name='Dhyana'> + <signature family='24' model='0'/>  + <vendor name='Hygon'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='clflushopt'/> + <feature name='cmov'/> + <feature name='cr8legacy'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='fxsr_opt'/> + <feature name='ibpb'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='misalignsse'/> + <feature name='mmx'/> + <feature name='mmxext'/> + <feature name='monitor'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='osvw'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='sse4a'/> + <feature name='ssse3'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='vme'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu_map/x86_vendors.xml b/src/cpu_map/x86_vendors.xml index 418712a..840179d 100644 --- a/src/cpu_map/x86_vendors.xml +++ b/src/cpu_map/x86_vendors.xml @@ -1,4 +1,5 @@ <cpus> <vendor name='Intel' string='GenuineIntel'/> <vendor name='AMD' string='AuthenticAMD'/> + <vendor name='Hygon' string='HygonGenuine'/> </cpus> -- 1.8.3.1

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[libvirt] [PATCH 1/4] cpu: Remove the verification conditions of the model in the x86 signatures

by Yingle Hou

The x86ModelParseSignatures function makes an assumption that CPU signature model equals 0 as an invalid case. While in Hygon processor definition, A1 version (model 0, stepping 1) is mass production version, to support Hygon Dhyana A1 version, we have removed CPU signature model zero checking condition. Signed-off-by: Yingle Hou <houyingle(a)hygon.cn> --- src/cpu/cpu_x86.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index c83cab0..dcd8429 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -1419,7 +1419,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model, } rc = virXPathUInt("string(@model)", ctxt, &sigModel); - if (rc < 0 || sigModel == 0) { + if (rc < 0) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Invalid CPU signature model in model %s"), model->name); -- 1.8.3.1

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[libvirt] [PATCH 0/4] Add support for Hygon Dhyana CPU

by Yingle Hou

As a Joint Venture between AMD and Haiguang Information Technology Co., Ltd., Hygon aims to provide x86 server processor in China market. The first generation processor Dhyana (family 18h) shares similar architecture with AMD family 17h. As Dhyana support in QEMU already have been merged in qemu-4.1.0 [1], to add Dhyana support in libvirt, we have added a new Dhyana CPU model file x86_Dhyana.xml in cpu_map directory, and also we have added a series of Dhyana test files. We have tested the patches on Hygon Dhyana machine with the result that it has successfully worked as expected. Reference: [1] https://patchwork.kernel.org/patch/10902889/ Yingle Hou (4): cpu: Remove the verification conditions of the model in the x86 signatures cpu: Add new Dhyana CPU model cputest: Add CPUID data for Hygon Dhyana 7185 32-core Processor domaincapstest: Add CPU model Dhyana to QEMU src/cpu/cpu_x86.c | 2 +- src/cpu_map/Makefile.inc.am | 1 + src/cpu_map/index.xml | 3 + src/cpu_map/x86_Dhyana.xml | 70 + src/cpu_map/x86_vendors.xml | 1 + tests/cputest.c | 1 + ...86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml | 7 + ...x86_64-cpuid-Hygon-C86-7185-32-core-enabled.xml | 9 + .../x86_64-cpuid-Hygon-C86-7185-32-core-guest.xml | 16 + .../x86_64-cpuid-Hygon-C86-7185-32-core-host.xml | 17 + .../x86_64-cpuid-Hygon-C86-7185-32-core-json.xml | 12 + .../x86_64-cpuid-Hygon-C86-7185-32-core.json | 1631 ++++++++++++++++++++ .../x86_64-cpuid-Hygon-C86-7185-32-core.sig | 4 + .../x86_64-cpuid-Hygon-C86-7185-32-core.xml | 54 + tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.1.0.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.2.0.x86_64.xml | 1 + 20 files changed, 1833 insertions(+), 1 deletion(-) create mode 100644 src/cpu_map/x86_Dhyana.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.json create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.sig create mode 100644 tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core.xml -- 1.8.3.1

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[libvirt] [PATCH v2 0/4] Fix remote dispatch code trying to allocate 0-sized return buffers

by Erik Skultety

This happens because of the switch to glib whose method g_malloc0 actually correctly returns NULL on size 0 which doesn't make sense to do. The outcome of that is that because virAllocN always returns 0, the dispatch code never fails allocation and passes the NULL pointer to the server-side public API which actually checks that and fails. https://bugzilla.redhat.com/show_bug.cgi?id=1772842 Since v1: - reworked the original patch 3/3 (now 4/4) by introducing a virCheckNonNull-style macro which checks whether the caller-provided array isn't by any chance NULL while the declared size of this array is a positive int (Dan's suggestion) -> apart from the single scenario check (NULL && n > 0), the other combinations are allowed for the legacy APIs letting the server-side handle this - added patch 3/4 when I realized one of the legacy APIs which didn't have the dispatch code autogenerated needed adjustment too - I deliberately didn't touch the APIs using typed params, as half of them are setters and the other half is supposed to be called twice, so we already have various NULL checks in place - there were a few legacy APIs that already had some protection in the remote dispatch code, so I didn't touch the client side for those, IMO we can always treat those on case-by-case basis if a similar issue arises than risk breaking one third of libvirt now :P Erik Skultety (4): rpc: gendispatch: Fix a couple of places adding trailing spaces rpc: gendispatch: Add a check for zero size client-side buffers remote: Add a check for zero sized client-side buffers libvirt-<module>: Check caller-provided buffers to be NULL with size > 0 src/internal.h | 13 +++++++++++++ src/libvirt-domain-snapshot.c | 4 ++-- src/libvirt-domain.c | 21 ++++++--------------- src/libvirt-host.c | 2 +- src/libvirt-interface.c | 4 ++-- src/libvirt-network.c | 4 ++-- src/libvirt-nodedev.c | 4 ++-- src/libvirt-nwfilter.c | 2 +- src/libvirt-secret.c | 2 +- src/libvirt-storage.c | 6 +++--- src/remote/remote_daemon_dispatch.c | 6 ++++++ src/rpc/gendispatch.pl | 12 ++++++++++-- 12 files changed, 49 insertions(+), 31 deletions(-) -- 2.23.0

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[libvirt] [PATCH 0/8] domaincaps: Simplify adding of new domain capability features

by Peter Krempa

As you might guess I plan to add a new one later on. Peter Krempa (8): conf: domaincaps: Replace FORMAT_SINGLE macro by a function conf: domaincaps: Extract formatting of the <features> subelement conf: domaincaps: Use virXMLFormatElement in virDomainCapsFormatFeatures conf: domaincaps: Add 'iothreads' to the features section domcaps: Add function for initializing domain caps as unsupported qemu: domcaps: Initialize all features domaincaps: Store domain capability features in an array qemu: domcaps: Simplify adding new domaincaps based on qemu caps docs/schemas/domaincaps.rng | 3 + src/bhyve/bhyve_capabilities.c | 4 +- src/conf/domain_capabilities.c | 80 ++++++++++++++----- src/conf/domain_capabilities.h | 15 +++- src/libvirt_private.syms | 1 + src/libxl/libxl_capabilities.c | 5 +- src/qemu/qemu_capabilities.c | 41 +++++++--- tests/domaincapsdata/libxl-xenfv.xml | 1 + tests/domaincapsdata/libxl-xenpv.xml | 1 + .../domaincapsdata/qemu_1.5.3-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_1.5.3-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_1.5.3.x86_64.xml | 1 + .../domaincapsdata/qemu_1.6.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_1.6.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_1.6.0.x86_64.xml | 1 + .../domaincapsdata/qemu_1.7.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_1.7.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_1.7.0.x86_64.xml | 1 + .../domaincapsdata/qemu_2.1.1-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.1.1-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_2.1.1.x86_64.xml | 1 + .../domaincapsdata/qemu_2.10.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.10.0-tcg.x86_64.xml | 1 + .../qemu_2.10.0-virt.aarch64.xml | 1 + tests/domaincapsdata/qemu_2.10.0.aarch64.xml | 1 + tests/domaincapsdata/qemu_2.10.0.ppc64.xml | 1 + tests/domaincapsdata/qemu_2.10.0.s390x.xml | 1 + tests/domaincapsdata/qemu_2.10.0.x86_64.xml | 1 + .../domaincapsdata/qemu_2.11.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.11.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_2.11.0.s390x.xml | 1 + tests/domaincapsdata/qemu_2.11.0.x86_64.xml | 1 + .../domaincapsdata/qemu_2.12.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.12.0-tcg.x86_64.xml | 1 + .../qemu_2.12.0-virt.aarch64.xml | 1 + tests/domaincapsdata/qemu_2.12.0.aarch64.xml | 1 + tests/domaincapsdata/qemu_2.12.0.ppc64.xml | 1 + tests/domaincapsdata/qemu_2.12.0.s390x.xml | 1 + tests/domaincapsdata/qemu_2.12.0.x86_64.xml | 1 + .../domaincapsdata/qemu_2.4.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.4.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_2.4.0.x86_64.xml | 1 + .../domaincapsdata/qemu_2.5.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.5.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_2.5.0.x86_64.xml | 1 + .../domaincapsdata/qemu_2.6.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.6.0-tcg.x86_64.xml | 1 + .../qemu_2.6.0-virt.aarch64.xml | 1 + tests/domaincapsdata/qemu_2.6.0.aarch64.xml | 1 + tests/domaincapsdata/qemu_2.6.0.ppc64.xml | 1 + tests/domaincapsdata/qemu_2.6.0.x86_64.xml | 1 + .../domaincapsdata/qemu_2.7.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.7.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_2.7.0.s390x.xml | 1 + tests/domaincapsdata/qemu_2.7.0.x86_64.xml | 1 + .../domaincapsdata/qemu_2.8.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.8.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_2.8.0.s390x.xml | 1 + tests/domaincapsdata/qemu_2.8.0.x86_64.xml | 1 + .../domaincapsdata/qemu_2.9.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_2.9.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_2.9.0.ppc64.xml | 1 + tests/domaincapsdata/qemu_2.9.0.s390x.xml | 1 + tests/domaincapsdata/qemu_2.9.0.x86_64.xml | 1 + .../domaincapsdata/qemu_3.0.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_3.0.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_3.0.0.ppc64.xml | 1 + tests/domaincapsdata/qemu_3.0.0.s390x.xml | 1 + tests/domaincapsdata/qemu_3.0.0.x86_64.xml | 1 + .../domaincapsdata/qemu_3.1.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_3.1.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_3.1.0.ppc64.xml | 1 + tests/domaincapsdata/qemu_3.1.0.x86_64.xml | 1 + .../domaincapsdata/qemu_4.0.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_4.0.0-tcg.x86_64.xml | 1 + .../qemu_4.0.0-virt.aarch64.xml | 1 + tests/domaincapsdata/qemu_4.0.0.aarch64.xml | 1 + tests/domaincapsdata/qemu_4.0.0.ppc64.xml | 1 + tests/domaincapsdata/qemu_4.0.0.s390x.xml | 1 + tests/domaincapsdata/qemu_4.0.0.x86_64.xml | 1 + .../domaincapsdata/qemu_4.1.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_4.1.0-tcg.x86_64.xml | 1 + tests/domaincapsdata/qemu_4.1.0.x86_64.xml | 1 + .../domaincapsdata/qemu_4.2.0-q35.x86_64.xml | 1 + .../domaincapsdata/qemu_4.2.0-tcg.x86_64.xml | 1 + .../qemu_4.2.0-virt.aarch64.xml | 1 + tests/domaincapsdata/qemu_4.2.0.aarch64.xml | 1 + tests/domaincapsdata/qemu_4.2.0.ppc64.xml | 1 + tests/domaincapsdata/qemu_4.2.0.x86_64.xml | 1 + 89 files changed, 192 insertions(+), 39 deletions(-) -- 2.23.0

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Devel November 2019