[libvirt] [PATCH] cpu: Add support for clflushopt and tsc_adjust Intel features
by Alexander Burluka
Corresponding QEMU commits:
clflushopt f7fda280948a5e74aeb076ef346b991ecb173c56
tsc_adjust 7b458bfd12a71b3da6b531daedc417492c9334e0
Signed-off-by: Alexander Burluka <aburluka(a)virtuozzo.com>
---
src/cpu/cpu_map.xml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 0b6d424..08aded2 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -293,6 +293,9 @@
<feature name='fsgsbase'>
<cpuid function='0x00000007' ebx='0x00000001'/>
</feature>
+ <feature name='tsc_adjust'>
+ <cpuid function='0x00000007' ebx='0x00000002'/>
+ </feature>
<feature name='bmi1'>
<cpuid function='0x00000007' ebx='0x00000008'/>
</feature>
@@ -332,6 +335,9 @@
<feature name='smap'>
<cpuid function='0x00000007' ebx='0x00100000'/>
</feature>
+ <feature name='clflushopt'>
+ <cpuid function='0x00000007' ebx='0x00800000'/>
+ </feature>
<feature name='avx512pf'> <!-- AVX-512 Prefetch -->
<cpuid function='0x00000007' ebx='0x04000000'/>
</feature>
--
1.8.3.1
9 years
[libvirt] Process to upstream new driver for proprietary hypervisor?
by Scott Bissett
Hello,
I am currently implementing a libvirt driver for my company's proprietary custom hypervisor. I have used the VMware driver as a design template, since it is interfacing a closed-source hypervisor as well.
Ultimately, as we approach a minimally-usable implementation, we would like to upstream our driver mods to libvirt source. What is the process to do so? This is all new to me and my organization.
For some brief background info, I am maintaining a git repo of our new code, plus ed scripts to modify libvirt source files. I am using quilt to create patches which are given to dpkg-buildpackage to create our own .deb packages. (I am working on Ubuntu at the moment; soon I will try to address repackaging rpms for CentOS).
I appreciate any tips, pointers, suggestions, etc.
9 years
[libvirt] RFC: what are the requirements to domain id
by Nikolay Shirokovskiy
Hi, all.
Domain id is somewhat required feature for hypervisors: virsh list prints
them by default and active/inactive distinction is based on this id value
analysys. But other than -1 is reserved for inactive domains there is no
further requirements for it, one can happily keep them 0 for active domains.
Looks like some drivers use process pids for this purpose. Qemu driver use
its own incrementing counter and domain ids endure libvirtd restart. Vz do not
provide a suitable value so the question arises can some simple id
implementation be good enough? By simple I mean to keep counter as long as
daemon lives and do not introduce any additional persistent state. As I said
before there is basically no option to not to support it.
A more profound question is what is this id for? How it is supposed to be used?
Nikolay
9 years
[libvirt] [PATCH 0/3] RFC: qemu: drop vioserialaddr cache
by Cole Robinson
qemuDomainObjPrivate caches three lists of device addresses:
virDomainPCIAddressSetPtr pciaddrs;
virDomainCCWAddressSetPtr ccwaddrs;
virDomainVirtioSerialAddrSetPtr vioserialaddrs;
Yet I can't quite tell what issue they fix... they are only used
at hotplug time for checking for address collisions, however it
appears that we can generate those lists on demand from the runtime
XML, which contains all the info we need.
In truth I only looked deeply at the vioserialaddrs list... perhaps
PCI has more to it. But at least for virtio serial it looks like
this caching can be dropped. CCing jtomko who originally added it
If this is acceptable, dropping all the caching will be a step
towards unifying all uses of qemuDomainAssignAddresses, rather
than sprinkling around a dozen call sites throughout the code.
Also (again if this is acceptable), there's more cleanup to do
here, dropping some now unused code in domain_addr
Cole Robinson (3):
domain: Add virDomainVirtioSerialAddrSetCreateFromDomain
qemu: hotplug: generate vioserial address list on demand
qemu: remove vioserialaddr cache
src/conf/domain_addr.c | 35 ++++++++++++++++++++++++++++++++---
src/conf/domain_addr.h | 7 ++-----
src/libvirt_private.syms | 3 +--
src/qemu/qemu_domain.c | 1 -
src/qemu/qemu_domain.h | 1 -
src/qemu/qemu_domain_address.c | 28 +++-------------------------
src/qemu/qemu_hotplug.c | 37 +++++++++++++++++++++++++------------
src/qemu/qemu_process.c | 2 --
8 files changed, 63 insertions(+), 51 deletions(-)
--
2.7.4
9 years
[libvirt] [PATCH] Add Skylake Cpu Model
by Eli Qiao
Add Skylake Cpu model to cpu maps to let libvirt discover host Skylake
cpu model correctly.
Currently, libvirt still think a Skylake cpu as Broadwell-noTSX
Signed-off-by: Eli Qiao <liyong.qiao(a)intel.com>
---
src/cpu/cpu_map.xml | 76 +++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 0b6d424..228851d 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -347,6 +347,21 @@
<cpuid function='0x80000007' edx='0x00000100'/>
</feature>
+ <!-- XSAVE CPUID[EAX=0xd,ECX=1].EAX -->
+ <feature name='xsaveopt'>
+ <cpuid function='0xd' eax='0x00000001'/>
+ </feature>
+ <feature name='xsavec'>
+ <cpuid function='0xd' eax='0x00000002'/>
+ </feature>
+ <feature name='xgetbv1'>
+ <cpuid function='0xd' eax='0x00000004'/>
+ </feature>
+ <feature name='xsaves' migratable='no'>
+ <cpuid function='0xd' eax='0x00000008'/>
+ </feature>
+
+
<!-- models -->
<model name='486'>
<feature name='fpu'/>
@@ -1137,6 +1152,67 @@
<feature name='xsave'/>
</model>
+ <model name='Skylake'>
+ <vendor name='Intel'/>
+ <feature name='3dnowprefetch'/>
+ <feature name='adx'/>
+ <feature name='aes'/>
+ <feature name='apic'/>
+ <feature name='avx'/>
+ <feature name='avx2'/>
+ <feature name='bmi1'/>
+ <feature name='bmi2'/>
+ <feature name='clflush'/>
+ <feature name='cmov'/>
+ <feature name='cx16'/>
+ <feature name='cx8'/>
+ <feature name='de'/>
+ <feature name='erms'/>
+ <feature name='fma'/>
+ <feature name='fpu'/>
+ <feature name='fsgsbase'/>
+ <feature name='fxsr'/>
+ <feature name='invpcid'/>
+ <feature name='lahf_lm'/>
+ <feature name='lm'/>
+ <feature name='mca'/>
+ <feature name='mce'/>
+ <feature name='mmx'/>
+ <feature name='movbe'/>
+ <feature name='mpx'/>
+ <feature name='msr'/>
+ <feature name='mtrr'/>
+ <feature name='nx'/>
+ <feature name='pae'/>
+ <feature name='pat'/>
+ <feature name='pcid'/>
+ <feature name='pclmuldq'/>
+ <feature name='pge'/>
+ <feature name='pni'/>
+ <feature name='popcnt'/>
+ <feature name='pse'/>
+ <feature name='pse36'/>
+ <feature name='rdseed'/>
+ <feature name='rdtscp'/>
+ <feature name='sep'/>
+ <feature name='smap'/>
+ <feature name='smep'/>
+ <feature name='sse'/>
+ <feature name='sse2'/>
+ <feature name='sse4.1'/>
+ <feature name='sse4.2'/>
+ <feature name='ssse3'/>
+ <feature name='syscall'/>
+ <feature name='tsc'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ <feature name='xgetbv1'/>
+ <feature name='xsave'/>
+ <feature name='xsavec'/>
+ <feature name='xsaveopt'/>
+ </model>
+
+
<!-- AMD CPUs -->
<model name='athlon'>
<vendor name='AMD'/>
--
1.9.1
9 years
[libvirt] [PATCH v2 0/7] cpuGetModels: Create a NULL-terminated list
by Jiri Denemark
The list of CPU models is freed using virStringFreeList, which expects
the list to by NULL-terminated.
Jiri Denemark (7):
cpu_x86: Use array of models in CPU map
cpu_x86: Use array of vendors in CPU map
cpu_x86: Use array of features in CPU map
cpu_ppc64: Use array of vendors in CPU map
cpu_ppc64: Use array of models in CPU map
cpu: Rework CPU map loading
cpu: Fix documentation of cpuGetModels
src/cpu/cpu.c | 2 +-
src/cpu/cpu_map.c | 21 +-
src/cpu/cpu_map.h | 2 +
src/cpu/cpu_ppc64.c | 216 +++++------
src/cpu/cpu_x86.c | 395 +++++++++++----------
tests/cputestdata/x86-baseline-3-expanded.xml | 62 ++--
tests/cputestdata/x86-baseline-4-expanded.xml | 80 ++---
tests/cputestdata/x86-baseline-4-result.xml | 18 +-
tests/cputestdata/x86-baseline-5-expanded.xml | 80 ++---
tests/cputestdata/x86-baseline-5-result.xml | 8 +-
tests/cputestdata/x86-baseline-6-migratable.xml | 8 +-
tests/cputestdata/x86-baseline-6-result.xml | 10 +-
.../cputestdata/x86-host+guest,model486-result.xml | 62 ++--
.../x86-host+guest,models,Penryn-result.xml | 14 +-
.../x86-host+guest,models,qemu64-result.xml | 14 +-
tests/cputestdata/x86-host+guest,models-result.xml | 14 +-
tests/cputestdata/x86-host+guest-result.xml | 10 +-
...6-host+host+host-model,models,Penryn-result.xml | 28 +-
tests/cputestdata/x86-host+min.xml | 26 +-
tests/cputestdata/x86-host+pentium3.xml | 46 +--
.../x86-host+strict-force-extra-result.xml | 28 +-
...aswell-noTSX+Haswell,haswell,Haswell-result.xml | 2 +-
...+Haswell-noTSX,haswell,Haswell-noTSX-result.xml | 2 +-
.../x86-host-better+pentium3,core2duo-result.xml | 32 +-
.../x86-host-better+pentium3,pentium3-result.xml | 50 +--
.../x86-host-better+pentium3-result.xml | 26 +-
tests/cputestdata/x86-host-worse+guest-result.xml | 6 +-
.../qemuxml2argv-cpu-Haswell2.args | 2 +-
.../qemuxml2argvdata/qemuxml2argv-cpu-exact1.args | 2 +-
.../qemuxml2argv-cpu-exact2-nofallback.args | 2 +-
.../qemuxml2argvdata/qemuxml2argv-cpu-exact2.args | 2 +-
.../qemuxml2argv-cpu-host-model-fallback.args | 4 +-
.../qemuxml2argv-cpu-host-model-vendor.args | 4 +-
.../qemuxml2argv-cpu-host-model.args | 4 +-
.../qemuxml2argv-cpu-minimum1.args | 4 +-
.../qemuxml2argv-cpu-minimum2.args | 4 +-
.../qemuxml2argvdata/qemuxml2argv-cpu-strict1.args | 2 +-
.../qemuxml2argv-graphics-spice-timeout.args | 4 +-
38 files changed, 658 insertions(+), 638 deletions(-)
--
2.8.2
9 years
[libvirt] [PATCH] docs: fix <spice><gl enable> since version
by Ján Tomko
The support was added by commit 937ebba which was released in
1.3.3.
---
Pushed as trivial.
docs/formatdomain.html.in | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in
index 1336c82..1333796 100644
--- a/docs/formatdomain.html.in
+++ b/docs/formatdomain.html.in
@@ -5267,7 +5267,7 @@ qemu-kvm -net nic,model=? /dev/null
Spice may provide accelerated server-side rendering with OpenGL.
You can enable or disable OpenGL support explicitly with
the <code>gl</code> element, by setting the <code>enable</code>
- property. (QEMU only, <span class="since">since 1.3.2</span>).
+ property. (QEMU only, <span class="since">since 1.3.3</span>).
</p>
</dd>
<dt><code>rdp</code></dt>
--
2.7.3
9 years
[libvirt] [PATCH 0/7] More QEMU_CAPS_DEVICE cleanups
by Ján Tomko
While looking at Laine's patches I found uses of ADDRESS_TYPE_PCI
in functions that are only called on !QEMU_CAPS_DEVICE (i.e. never).
Then I cleaned up some more code until I remembered Cole already started
doing that. So I included the only patch I could apply easily.
Cole Robinson (1):
qemu: process: Drop !QEMU_CAPS_DEVICE code
Ján Tomko (6):
Remove qemuProcessInitPCIAddresses with dependencies
qemu: always add -nodefaults
Remove DISK_BUS_XEN support from qemuBuildDiskDriveCommandLine
Assume QEMU_CAPS_DEVICE in qemuBuildDiskDriveCommandLine
Introduce qemuDiskBusNeedsDeviceArg
Do not mask QEMU_CAPS_DEVICE in qemuBuildDriveStr
src/qemu/qemu_command.c | 90 ++--
src/qemu/qemu_monitor.c | 15 -
src/qemu/qemu_monitor.h | 10 -
src/qemu/qemu_monitor_json.c | 9 -
src/qemu/qemu_monitor_json.h | 3 -
src/qemu/qemu_monitor_text.c | 126 ------
src/qemu/qemu_monitor_text.h | 3 -
src/qemu/qemu_process.c | 463 ++-------------------
.../qemuargv2xmldata/qemuargv2xml-disk-xenvbd.args | 25 --
.../qemuargv2xmldata/qemuargv2xml-disk-xenvbd.xml | 51 ---
tests/qemuargv2xmltest.c | 1 -
.../qemuxml2argvdata/qemuxml2argv-disk-xenvbd.args | 26 --
.../qemuxml2argvdata/qemuxml2argv-disk-xenvbd.xml | 47 ---
tests/qemuxml2argvtest.c | 1 -
.../qemuxml2xmlout-disk-xenvbd.xml | 51 ---
tests/qemuxml2xmltest.c | 1 -
16 files changed, 48 insertions(+), 874 deletions(-)
delete mode 100644 tests/qemuargv2xmldata/qemuargv2xml-disk-xenvbd.args
delete mode 100644 tests/qemuargv2xmldata/qemuargv2xml-disk-xenvbd.xml
delete mode 100644 tests/qemuxml2argvdata/qemuxml2argv-disk-xenvbd.args
delete mode 100644 tests/qemuxml2argvdata/qemuxml2argv-disk-xenvbd.xml
delete mode 100644 tests/qemuxml2xmloutdata/qemuxml2xmlout-disk-xenvbd.xml
--
2.7.3
9 years
[libvirt] [PATCH v3 1/1] perf: add support to perf event for MBM
by Qiaowei Ren
Some Intel processor families (e.g. the Intel Xeon processor E5 v3
family) introduced some RDT (Resource Director Technology) features
to monitor or control shared resource. Among these features, MBM
(Memory Bandwidth Monitoring), which is build on the CMT (Cache
Monitoring Technology) infrastructure, provides OS/VMM a way to
monitor bandwidth from one level of cache to another.
With current perf framework, this patch adds support to perf event
for MBM.
Signed-off-by: Qiaowei Ren <qiaowei.ren(a)intel.com>
---
include/libvirt/libvirt-domain.h | 26 ++++++++++++++++-
src/libvirt-domain.c | 12 ++++++++
src/qemu/qemu_driver.c | 41 +++++++++++++++++++-------
src/util/virperf.c | 63 ++++++++++++++++++++++++----------------
src/util/virperf.h | 2 ++
5 files changed, 108 insertions(+), 36 deletions(-)
diff --git a/include/libvirt/libvirt-domain.h b/include/libvirt/libvirt-domain.h
index 160f20f..27ed29a 100644
--- a/include/libvirt/libvirt-domain.h
+++ b/include/libvirt/libvirt-domain.h
@@ -1900,10 +1900,34 @@ void virDomainStatsRecordListFree(virDomainStatsRecordPtr *stats);
/**
* VIR_PERF_PARAM_CMT:
*
- * Macro for typed parameter name that represents CMT perf event.
+ * Macro for typed parameter name that represents CMT perf event
+ * which can be used to measure the usage of cache (bytes) by
+ * applications running on the platform. It corresponds to the
+ * "perf.cmt" field in the *Stats APIs.
*/
# define VIR_PERF_PARAM_CMT "cmt"
+/**
+ * VIR_PERF_PARAM_MBMT:
+ *
+ * Macro for typed parameter name that represents MBMT perf event
+ * which can be used to monitor total system bandwidth (bytes/s)
+ * from one level of cache to another. It corresponds to the
+ * "perf.mbmt" field in the *Stats APIs.
+
+ */
+# define VIR_PERF_PARAM_MBMT "mbmt"
+
+/**
+ * VIR_PERF_PARAM_MBML:
+ *
+ * Macro for typed parameter name that represents MBML perf event
+ * which can be used to monitor the amount of data (bytes/s) sent
+ * through the memory controller on the socket. It corresponds to
+ * the "perf.mbml" field in the *Stats APIs.
+ */
+# define VIR_PERF_PARAM_MBML "mbml"
+
int virDomainGetPerfEvents(virDomainPtr dom,
virTypedParameterPtr *params,
int *nparams,
diff --git a/src/libvirt-domain.c b/src/libvirt-domain.c
index 4f473c9..73ae369 100644
--- a/src/libvirt-domain.c
+++ b/src/libvirt-domain.c
@@ -11441,6 +11441,18 @@ virConnectGetDomainCapabilities(virConnectPtr conn,
* "block.<num>.physical" - physical size in bytes of the container of the
* backing image as unsigned long long.
*
+ * VIR_DOMAIN_STATS_PERF: Return perf event statistics.
+ * The typed parameter keys are in this format:
+ * "perf.cmt" - the usage of l3 cache (bytes) by applications running on the
+ * platform as unsigned long long. It is produced by cmt perf
+ * event.
+ * "perf.mbmt" - the total system bandwidth (bytes/s) from one level of cache
+ * to another as unsigned long long. It is produced by mbmt perf
+ * event.
+ * "perf.mbml" - the amount of data (bytes/s) sent through the memory controller
+ * on the socket as unsigned long long. It is produced by mbml
+ * perf event.
+ *
* Note that entire stats groups or individual stat fields may be missing from
* the output in case they are not supported by the given hypervisor, are not
* applicable for the current state of the guest domain, or their retrieval
diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c
index c4c4968..670f620 100644
--- a/src/qemu/qemu_driver.c
+++ b/src/qemu/qemu_driver.c
@@ -10051,6 +10051,8 @@ qemuDomainSetPerfEvents(virDomainPtr dom,
if (virTypedParamsValidate(params, nparams,
VIR_PERF_PARAM_CMT, VIR_TYPED_PARAM_BOOLEAN,
+ VIR_PERF_PARAM_MBMT, VIR_TYPED_PARAM_BOOLEAN,
+ VIR_PERF_PARAM_MBML, VIR_TYPED_PARAM_BOOLEAN,
NULL) < 0)
return -1;
@@ -19494,24 +19496,38 @@ qemuDomainGetStatsBlock(virQEMUDriverPtr driver,
#undef QEMU_ADD_COUNT_PARAM
+#define QEMU_ADD_PERF_PARAM_ULL(record, maxparams, name, value) \
+do { \
+ char param_name[VIR_TYPED_PARAM_FIELD_LENGTH]; \
+ snprintf(param_name, VIR_TYPED_PARAM_FIELD_LENGTH, \
+ "perf.%s", name); \
+ if (virTypedParamsAddULLong(&(record)->params, \
+ &(record)->nparams, \
+ maxparams, \
+ param_name, \
+ value) < 0) \
+ goto cleanup; \
+} while (0)
+
static int
-qemuDomainGetStatsPerfCmt(virPerfPtr perf,
+qemuDomainGetStatsPerfRdt(virPerfPtr perf,
+ virPerfEventType type,
virDomainStatsRecordPtr record,
int *maxparams)
{
- uint64_t cache = 0;
+ uint64_t value = 0;
- if (virPerfReadEvent(perf, VIR_PERF_EVENT_CMT, &cache) < 0)
+ if (virPerfReadEvent(perf, type, &value) < 0)
return -1;
- if (virTypedParamsAddULLong(&record->params,
- &record->nparams,
- maxparams,
- "perf.cache",
- cache) < 0)
- return -1;
+ QEMU_ADD_PERF_PARAM_ULL(record, maxparams,
+ virPerfEventTypeToString(type),
+ value);
return 0;
+
+ cleanup:
+ return -1;
}
static int
@@ -19531,7 +19547,10 @@ qemuDomainGetStatsPerf(virQEMUDriverPtr driver ATTRIBUTE_UNUSED,
switch (i) {
case VIR_PERF_EVENT_CMT:
- if (qemuDomainGetStatsPerfCmt(priv->perf, record, maxparams) < 0)
+ case VIR_PERF_EVENT_MBMT:
+ case VIR_PERF_EVENT_MBML:
+ if (qemuDomainGetStatsPerfRdt(priv->perf, i,
+ record, maxparams) < 0)
goto cleanup;
break;
}
@@ -19543,6 +19562,8 @@ qemuDomainGetStatsPerf(virQEMUDriverPtr driver ATTRIBUTE_UNUSED,
return ret;
}
+#undef QEMU_ADD_PERF_PARAM_ULL
+
typedef int
(*qemuDomainGetStatsFunc)(virQEMUDriverPtr driver,
virDomainObjPtr dom,
diff --git a/src/util/virperf.c b/src/util/virperf.c
index bd65587..450b3ba 100644
--- a/src/util/virperf.c
+++ b/src/util/virperf.c
@@ -38,7 +38,7 @@ VIR_LOG_INIT("util.perf");
#define VIR_FROM_THIS VIR_FROM_PERF
VIR_ENUM_IMPL(virPerfEvent, VIR_PERF_EVENT_LAST,
- "cmt");
+ "cmt", "mbmt", "mbml");
struct virPerfEvent {
int type;
@@ -110,10 +110,10 @@ virPerfGetEvent(virPerfPtr perf,
}
static int
-virPerfCmtEnable(virPerfEventPtr event,
+virPerfRdtEnable(virPerfEventPtr event,
pid_t pid)
{
- struct perf_event_attr cmt_attr;
+ struct perf_event_attr rdt_attr;
char *buf = NULL;
char *tmp = NULL;
unsigned int event_type, scale;
@@ -127,32 +127,42 @@ virPerfCmtEnable(virPerfEventPtr event,
if (virStrToLong_ui(buf, NULL, 10, &event_type) < 0) {
virReportSystemError(errno, "%s",
- _("failed to get cmt event type"));
+ _("failed to get rdt event type"));
goto error;
}
VIR_FREE(buf);
- if (virFileReadAll("/sys/devices/intel_cqm/events/llc_occupancy.scale",
- 10, &buf) < 0)
- goto error;
+ memset(&rdt_attr, 0, sizeof(rdt_attr));
+ rdt_attr.size = sizeof(rdt_attr);
+ rdt_attr.type = event_type;
+ rdt_attr.inherit = 1;
+ rdt_attr.disabled = 1;
+ rdt_attr.enable_on_exec = 0;
- if (virStrToLong_ui(buf, NULL, 10, &scale) < 0) {
- virReportSystemError(errno, "%s",
- _("failed to get cmt scaling factor"));
- goto error;
+ switch (event->type) {
+ case VIR_PERF_EVENT_CMT:
+ if (virFileReadAll("/sys/devices/intel_cqm/events/llc_occupancy.scale",
+ 10, &buf) < 0)
+ goto error;
+
+ if (virStrToLong_ui(buf, NULL, 10, &scale) < 0) {
+ virReportSystemError(errno, "%s",
+ _("failed to get cmt scaling factor"));
+ goto error;
+ }
+ event->efields.cmt.scale = scale;
+
+ rdt_attr.config = 1;
+ break;
+ case VIR_PERF_EVENT_MBMT:
+ rdt_attr.config = 2;
+ break;
+ case VIR_PERF_EVENT_MBML:
+ rdt_attr.config = 3;
+ break;
}
- event->efields.cmt.scale = scale;
-
- memset(&cmt_attr, 0, sizeof(cmt_attr));
- cmt_attr.size = sizeof(cmt_attr);
- cmt_attr.type = event_type;
- cmt_attr.config = 1;
- cmt_attr.inherit = 1;
- cmt_attr.disabled = 1;
- cmt_attr.enable_on_exec = 0;
-
- event->fd = syscall(__NR_perf_event_open, &cmt_attr, pid, -1, -1, 0);
+ event->fd = syscall(__NR_perf_event_open, &rdt_attr, pid, -1, -1, 0);
if (event->fd < 0) {
virReportSystemError(errno,
_("Unable to open perf type=%d for pid=%d"),
@@ -161,8 +171,9 @@ virPerfCmtEnable(virPerfEventPtr event,
}
if (ioctl(event->fd, PERF_EVENT_IOC_ENABLE) < 0) {
- virReportSystemError(errno, "%s",
- _("Unable to enable perf event for CMT"));
+ virReportSystemError(errno,
+ _("Unable to enable perf event for %s"),
+ virPerfEventTypeToString(event->type));
goto error;
}
@@ -186,7 +197,9 @@ virPerfEventEnable(virPerfPtr perf,
switch (type) {
case VIR_PERF_EVENT_CMT:
- if (virPerfCmtEnable(event, pid) < 0)
+ case VIR_PERF_EVENT_MBMT:
+ case VIR_PERF_EVENT_MBML:
+ if (virPerfRdtEnable(event, pid) < 0)
return -1;
break;
case VIR_PERF_EVENT_LAST:
diff --git a/src/util/virperf.h b/src/util/virperf.h
index 8ec8753..769e85a 100644
--- a/src/util/virperf.h
+++ b/src/util/virperf.h
@@ -26,6 +26,8 @@
typedef enum {
VIR_PERF_EVENT_CMT,
+ VIR_PERF_EVENT_MBMT,
+ VIR_PERF_EVENT_MBML,
VIR_PERF_EVENT_LAST
} virPerfEventType;
--
1.9.1
9 years
[libvirt] [PATCH] tests: nodeinfotest: Remove virSaveLastError() usage
by Cole Robinson
It's overkill here, we can use virGetLast* instead
---
tests/nodeinfotest.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/tests/nodeinfotest.c b/tests/nodeinfotest.c
index d8eace5..03500fb 100644
--- a/tests/nodeinfotest.c
+++ b/tests/nodeinfotest.c
@@ -44,10 +44,8 @@ linuxTestCompareFiles(char *sysfs_prefix,
memset(&nodeinfo, 0, sizeof(nodeinfo));
if (linuxNodeInfoCPUPopulate(sysfs_prefix, cpuinfo, arch, &nodeinfo) < 0) {
if (virTestGetDebug()) {
- virErrorPtr error = virSaveLastError();
- if (error && error->code != VIR_ERR_OK)
- VIR_TEST_DEBUG("\n%s\n", error->message);
- virFreeError(error);
+ if (virGetLastError())
+ VIR_TEST_DEBUG("\n%s\n", virGetLastErrorMessage());
}
VIR_FORCE_FCLOSE(cpuinfo);
goto fail;
--
2.7.4
9 years
