I didn't have cpuid installed on my system, but I imagine that libvirt is using the instruction cpuid, not a userspace program.

Please let me know if there's anything else I can do to help.

Best,

Michael

eax in eax ebx ecx edx

00000000 0000000d 756e6547 6c65746e 49656e69

00000001 000306c3 01100800 7ffafbff bfebfbff

00000002 76036301 00f0b5ff 00000000 00c10000

00000003 00000000 00000000 00000000 00000000

00000004 00000000 00000000 00000000 00000000

00000005 00000040 00000040 00000003 00042120

00000006 00000077 00000002 00000009 00000000

00000007 00000000 00000000 00000000 00000000

00000008 00000000 00000000 00000000 00000000

00000009 00000000 00000000 00000000 00000000

0000000a 07300403 00000000 00000000 00000603

0000000b 00000000 00000000 0000006f 00000001

0000000c 00000000 00000000 00000000 00000000

0000000d 00000000 00000000 00000000 00000000

80000000 80000008 00000000 00000000 00000000

80000001 00000000 00000000 00000021 2c100800

80000002 65746e49 2952286c 726f4320 4d542865

80000003 37692029 3737342d 50432030 20402055

80000004 30342e33 007a4847 00000000 00000000

80000005 00000000 00000000 00000000 00000000

80000006 00000000 00000000 01006040 00000000

80000007 00000000 00000000 00000000 00000100

80000008 00003027 00000000 00000000 00000000

Vendor ID: "GenuineIntel"; CPUID level 13

Intel-specific functions:

Version 000306c3:

Type 0 - Original OEM

Family 6 - Pentium Pro

Model 12 -

Stepping 3

Reserved 12

Extended brand string: "Intel(R) Core(TM) i7-4770 CPU @ 3.40GHz"

CLFLUSH instruction cache line size: 8

Initial APIC ID: 1

Hyper threading siblings: 16

Feature flags bfebfbff:

FPU Floating Point Unit

VME Virtual 8086 Mode Enhancements

DE Debugging Extensions

PSE Page Size Extensions

TSC Time Stamp Counter

MSR Model Specific Registers

PAE Physical Address Extension

MCE Machine Check Exception

CX8 COMPXCHG8B Instruction

APIC On-chip Advanced Programmable Interrupt Controller present and enabled

SEP Fast System Call

MTRR Memory Type Range Registers

PGE PTE Global Flag

MCA Machine Check Architecture

CMOV Conditional Move and Compare Instructions

FGPAT Page Attribute Table

PSE-36 36-bit Page Size Extension

CLFSH CFLUSH instruction

DS Debug store

ACPI Thermal Monitor and Clock Ctrl

MMX MMX instruction set

FXSR Fast FP/MMX Streaming SIMD Extensions save/restore

SSE Streaming SIMD Extensions instruction set

SSE2 SSE2 extensions

SS Self Snoop

HT Hyper Threading

TM Thermal monitor

31 reserved

TLB and cache info:

63: unknown TLB/cache descriptor

03: Data TLB: 4KB pages, 4-way set assoc, 64 entries

76: unknown TLB/cache descriptor

ff: unknown TLB/cache descriptor

b5: unknown TLB/cache descriptor

f0: unknown TLB/cache descriptor

c1: unknown TLB/cache descriptor

Processor serial: 0003-06C3-0000-0000-0000-0000

Michael Giardino
<mikelj@gatech.edu>

<michael.giardino@gmail.com>

On Tue, Jun 18, 2013 at 5:57 AM, Martin Kletzander <mkletzan@redhat.com> wrote:

On 06/17/2013 05:41 PM, Michael Giardino wrote:
> Kashyap: I have not tried integrating your guest xml but I will look
> over it today when I get a chance. Thank you.
>
> Martin: Below is the output from /proc/cpuinfo. Let me know if there is
> anything else that would be helpful in debugging this. Thank you,
>

Unfotunately, my guess was wrong. If you could run 'cpuid -ir1', I'll
dig in to that and will identify what we do wrong.

Thanks,
Martin