[libvirt] [PATCH 00/17] CPU models and features for Spectre, CVE-2017-5715

This is the libvirt's part of the changes related to CVE-2017-5715. The new models can be used to pass the protective CPU features to guests. But remember, the host CPU microcode, host kernel, QEMU, and libvirt all need to be updated for this to be any useful. Based on a patch from Paolo Bonzini. See QEMU patches from Eduardo for more details: https://patchew.org/QEMU/20180109154519.25634-1-ehabkost@redhat.com/ Jiri Denemark (16): cputest: Add data for Intel(R) Xeon(R) CPU E5-2609 v3 cputest: Add data for Intel(R) Xeon(R) CPU E5-2623 v4 cputest: Add data for Intel(R) Xeon(R) Gold 5115 CPU cputest: Add data for updated AMD EPYC 7601 32-Core Processor cputest: Add data for updated Intel(R) Core(TM) i7-5600U CPU cpu: Add Nehalem-IBRS CPU model cpu: Add Westmere-IBRS CPU model cpu: Add SandyBridge-IBRS CPU model cpu: Add IvyBridge-IBRS CPU model cpu: Add Haswell-noTSX-IBRS CPU model cpu: Add Haswell-IBRS CPU model cpu: Add Broadwell-noTSX-IBRS CPU model cpu: Add Broadwell-IBRS CPU model cpu: Add Skylake-Client-IBRS CPU model cpu: Add Skylake-Server-IBRS CPU model cpu: Add EPYC-IBPB CPU model Paolo Bonzini (1): cpu: add CPU features for indirect branch prediction protection src/cpu/cpu_map.xml | 622 ++++++++++++++++++ tests/cputest.c | 5 + .../x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml | 6 + .../x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml | 8 + .../x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml | 29 + .../x86_64-cpuid-Core-i7-5600U-ibrs-host.xml | 30 + .../x86_64-cpuid-Core-i7-5600U-ibrs-json.xml | 15 + .../x86_64-cpuid-Core-i7-5600U-ibrs.json | 525 +++++++++++++++ .../x86_64-cpuid-Core-i7-5600U-ibrs.xml | 41 ++ ...86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml | 7 + ...x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml | 9 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml | 17 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml | 17 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml | 12 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb.json | 722 ++++++++++++++++++++ .../x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml | 54 ++ .../x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml | 6 + .../x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml | 8 + .../x86_64-cpuid-Xeon-E5-2609-v3-guest.xml | 31 + .../x86_64-cpuid-Xeon-E5-2609-v3-host.xml | 32 + .../x86_64-cpuid-Xeon-E5-2609-v3-json.xml | 14 + .../cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.json | 726 +++++++++++++++++++++ tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.xml | 37 ++ .../x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml | 7 + .../x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml | 8 + .../x86_64-cpuid-Xeon-E5-2623-v4-guest.xml | 30 + .../x86_64-cpuid-Xeon-E5-2623-v4-host.xml | 34 + .../x86_64-cpuid-Xeon-E5-2623-v4-json.xml | 11 + .../cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.json | 662 +++++++++++++++++++ tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.xml | 43 ++ .../x86_64-cpuid-Xeon-Gold-5115-disabled.xml | 8 + .../x86_64-cpuid-Xeon-Gold-5115-enabled.xml | 8 + .../x86_64-cpuid-Xeon-Gold-5115-guest.xml | 29 + .../x86_64-cpuid-Xeon-Gold-5115-host.xml | 30 + .../x86_64-cpuid-Xeon-Gold-5115-json.xml | 8 + tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.json | 614 +++++++++++++++++ tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.xml | 54 ++ 37 files changed, 4519 insertions(+) create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.json create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.json create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.json create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.json create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.json create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.xml -- 2.15.1

From: Paolo Bonzini <pbonzini@redhat.com> Added in QEMU commits TBD and TBD. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index e5da7a8876..eff7681cf5 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -292,6 +292,9 @@ <feature name='avx512-4fmaps'> <cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000008'/> </feature> + <feature name='spec-ctrl'> + <cpuid eax_in='0x07' ecx_in='0x00' edx='0x04000000'/> + </feature> <!-- Processor Extended State Enumeration sub leaf 1 --> <feature name='xsaveopt'> @@ -420,6 +423,11 @@ <cpuid eax_in='0x80000007' edx='0x00000100'/> </feature> + <!-- More AMD-specific features --> + <feature name='ibpb'> + <cpuid eax_in='0x80000008' ebx='0x00001000'/> + </feature> + <!-- models --> <model name='486'> <feature name='fpu'/> -- 2.15.1

On 01/09/2018 04:45 PM, Jiri Denemark wrote:
From: Paolo Bonzini <pbonzini@redhat.com>
Added in QEMU commits TBD and TBD.
I'm assuming the TBD will be resolved before you push?
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 8 ++++++++ 1 file changed, 8 insertions(+)
-- Eric Blake, Principal Software Engineer Red Hat, Inc. +1-919-301-3266 Virtualization: qemu.org | libvirt.org

On Wed, Jan 17, 2018 at 10:27:58 -0600, Eric Blake wrote:
On 01/09/2018 04:45 PM, Jiri Denemark wrote:
From: Paolo Bonzini <pbonzini@redhat.com>
Added in QEMU commits TBD and TBD.
I'm assuming the TBD will be resolved before you push?
Oops, I completely forgot about the TBDs and I already pushed this series to make sure the patches are included in 4.0.0. Anyway, since the QEMU pull request was sent, but not merged yet, we don't have the commit IDs. Jirka

The CPU contains the updated microcode for CVE-2017-5715. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- tests/cputest.c | 1 + .../x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml | 6 + .../x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml | 8 + .../x86_64-cpuid-Xeon-E5-2609-v3-guest.xml | 32 + .../x86_64-cpuid-Xeon-E5-2609-v3-host.xml | 33 + .../x86_64-cpuid-Xeon-E5-2609-v3-json.xml | 15 + .../cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.json | 726 +++++++++++++++++++++ tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.xml | 37 ++ 8 files changed, 858 insertions(+) create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.json create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.xml diff --git a/tests/cputest.c b/tests/cputest.c index 543b7ba844..3737fc1a7f 100644 --- a/tests/cputest.c +++ b/tests/cputest.c @@ -1188,6 +1188,7 @@ mymain(void) DO_TEST_CPUID(VIR_ARCH_X86_64, "Ryzen-7-1800X-Eight-Core", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-5110", JSON_NONE); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E3-1245-v5", JSON_MODELS); + DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2609-v3", JSON_MODELS); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2630-v3", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2650-v3", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2650-v4", JSON_MODELS); diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml new file mode 100644 index 0000000000..aacc7a2b14 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml @@ -0,0 +1,6 @@ +<!-- Features disabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x0804c1fc' edx='0xb0600000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x00001000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml new file mode 100644 index 0000000000..1543af9b37 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml @@ -0,0 +1,8 @@ +<!-- Features enabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0xf7fa3203' edx='0x0f8bfbff'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x000007ab' ecx='0x00000000' edx='0x04000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000021' edx='0x2c100800'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml new file mode 100644 index 0000000000..923efead4a --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml @@ -0,0 +1,32 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Haswell-noTSX</model> + <vendor>Intel</vendor> + <feature policy='require' name='vme'/> + <feature policy='require' name='ds'/> + <feature policy='require' name='acpi'/> + <feature policy='require' name='ss'/> + <feature policy='require' name='ht'/> + <feature policy='require' name='tm'/> + <feature policy='require' name='pbe'/> + <feature policy='require' name='dtes64'/> + <feature policy='require' name='monitor'/> + <feature policy='require' name='ds_cpl'/> + <feature policy='require' name='vmx'/> + <feature policy='require' name='smx'/> + <feature policy='require' name='est'/> + <feature policy='require' name='tm2'/> + <feature policy='require' name='xtpr'/> + <feature policy='require' name='pdcm'/> + <feature policy='require' name='dca'/> + <feature policy='require' name='osxsave'/> + <feature policy='require' name='f16c'/> + <feature policy='require' name='rdrand'/> + <feature policy='require' name='arat'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='cmt'/> + <feature policy='require' name='spec-ctrl'/> + <feature policy='require' name='xsaveopt'/> + <feature policy='require' name='pdpe1gb'/> + <feature policy='require' name='abm'/> + <feature policy='require' name='invtsc'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml new file mode 100644 index 0000000000..96fee7a46d --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml @@ -0,0 +1,33 @@ +<cpu> + <arch>x86_64</arch> + <model>Haswell-noTSX</model> + <vendor>Intel</vendor> + <feature name='vme'/> + <feature name='ds'/> + <feature name='acpi'/> + <feature name='ss'/> + <feature name='ht'/> + <feature name='tm'/> + <feature name='pbe'/> + <feature name='dtes64'/> + <feature name='monitor'/> + <feature name='ds_cpl'/> + <feature name='vmx'/> + <feature name='smx'/> + <feature name='est'/> + <feature name='tm2'/> + <feature name='xtpr'/> + <feature name='pdcm'/> + <feature name='dca'/> + <feature name='osxsave'/> + <feature name='f16c'/> + <feature name='rdrand'/> + <feature name='arat'/> + <feature name='tsc_adjust'/> + <feature name='cmt'/> + <feature name='spec-ctrl'/> + <feature name='xsaveopt'/> + <feature name='pdpe1gb'/> + <feature name='abm'/> + <feature name='invtsc'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml new file mode 100644 index 0000000000..42e971f675 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml @@ -0,0 +1,15 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Haswell-noTSX</model> + <vendor>Intel</vendor> + <feature policy='require' name='vme'/> + <feature policy='require' name='ss'/> + <feature policy='require' name='f16c'/> + <feature policy='require' name='rdrand'/> + <feature policy='require' name='hypervisor'/> + <feature policy='require' name='arat'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='spec-ctrl'/> + <feature policy='require' name='xsaveopt'/> + <feature policy='require' name='pdpe1gb'/> + <feature policy='require' name='abm'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.json b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.json new file mode 100644 index 0000000000..10c5434263 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.json @@ -0,0 +1,726 @@ +{ + "return": { + "model": { + "name": "base", + "props": { + "pfthreshold": false, + "pku": false, + "rtm": false, + "tsc_adjust": true, + "tsc-deadline": true, + "xstore-en": false, + "cpuid-0xb": true, + "abm": true, + "sse": true, + "kvm-mmu": false, + "xsaveopt": true, + "hv-spinlocks": -1, + "tce": false, + "realized": false, + "kvm_steal_time": true, + "smep": true, + "fpu": true, + "xcrypt": false, + "sse4_2": true, + "clflush": true, + "sse4_1": true, + "flushbyasid": false, + "kvm-steal-time": true, + "lm": true, + "tsc": true, + "adx": false, + "fxsr": true, + "sha-ni": false, + "decodeassists": false, + "hv-relaxed": false, + "pclmuldq": true, + "xgetbv1": false, + "xstore": false, + "vmcb_clean": false, + "tsc-adjust": true, + "vme": true, + "vendor": "GenuineIntel", + "arat": true, + "ffxsr": false, + "de": true, + "aes": true, + "pse": true, + "ds-cpl": false, + "fxsr_opt": false, + "tbm": false, + "ia64": false, + "phe-en": false, + "f16c": true, + "ds": false, + "mpx": false, + "vmware-cpuid-freq": true, + "avx512f": false, + "avx2": true, + "misalignsse": false, + "level": 13, + "pbe": false, + "cx16": true, + "ds_cpl": false, + "movbe": true, + "perfctr-nb": false, + "nrip_save": false, + "kvm_mmu": false, + "ospke": false, + "pmu": false, + "avx512ifma": false, + "stepping": 2, + "sep": true, + "sse4a": false, + "avx512dq": false, + "stibp": false, + "core-id": -1, + "i64": true, + "avx512-4vnniw": false, + "xsave": true, + "pmm": false, + "hle": false, + "nodeid_msr": false, + "hv-crash": false, + "est": false, + "x-hv-max-vps": -1, + "osxsave": false, + "xop": false, + "smx": false, + "tsc-scale": false, + "monitor": false, + "avx512er": false, + "apic": true, + "sse4.1": true, + "sse4.2": true, + "hv-vapic": false, + "pause-filter": false, + "lahf-lm": true, + "kvm-nopiodelay": true, + "cmp_legacy": false, + "acpi": false, + "fma4": false, + "mmx": true, + "svm_lock": false, + "pcommit": false, + "mtrr": true, + "clwb": false, + "dca": false, + "pdcm": false, + "xcrypt-en": false, + "3dnow": false, + "invtsc": false, + "tm2": false, + "hv-time": false, + "hypervisor": true, + "kvmclock-stable-bit": true, + "xlevel": 2147483656, + "lahf_lm": true, + "enforce": false, + "pcid": true, + "sse4-1": true, + "lbrv": false, + "avx512-vpopcntdq": false, + "avx512-4fmaps": false, + "fill-mtrr-mask": true, + "pause_filter": false, + "svm-lock": false, + "popcnt": true, + "nrip-save": false, + "avx512vl": false, + "x2apic": true, + "kvmclock": true, + "smap": false, + "pdpe1gb": true, + "family": 6, + "min-level": 13, + "xlevel2": 0, + "dtes64": false, + "xd": true, + "kvm_pv_eoi": true, + "ace2": false, + "kvm_pv_unhalt": true, + "xtpr": false, + "perfctr_nb": false, + "avx512bw": false, + "l3-cache": true, + "nx": true, + "lwp": false, + "msr": true, + "ibpb": false, + "syscall": true, + "tm": false, + "perfctr-core": false, + "memory": "/machine/unattached/system[0]", + "pge": true, + "pn": false, + "fma": true, + "nodeid-msr": false, + "xsavec": false, + "socket-id": -1, + "thread-id": -1, + "cx8": true, + "mce": true, + "avx512cd": false, + "cr8legacy": false, + "mca": true, + "avx512pf": false, + "pni": true, + "hv-vendor-id": "", + "rdseed": false, + "osvw": false, + "fsgsbase": true, + "model-id": "Intel(R) Xeon(R) CPU E5-2609 v3 @ 1.90GHz", + "cmp-legacy": false, + "kvm-pv-unhalt": true, + "rdtscp": true, + "mmxext": false, + "host-phys-bits": true, + "cid": false, + "vmx": false, + "ssse3": true, + "extapic": false, + "pse36": true, + "min-xlevel": 2147483656, + "ibs": false, + "la57": false, + "avx": true, + "kvm-no-smi-migration": false, + "tcg-cpuid": true, + "ace2-en": false, + "umip": false, + "invpcid": true, + "bmi1": true, + "bmi2": true, + "vmcb-clean": false, + "erms": true, + "cmov": true, + "check": true, + "perfctr_core": false, + "xsaves": false, + "clflushopt": false, + "pat": true, + "sse4-2": true, + "3dnowprefetch": false, + "rdpid": false, + "full-cpuid-auto-level": true, + "pae": true, + "wdt": false, + "tsc_scale": false, + "skinit": false, + "fxsr-opt": false, + "kvm_nopiodelay": true, + "phys-bits": 0, + "kvm": true, + "pmm-en": false, + "phe": false, + "3dnowext": false, + "lmce": true, + "ht": false, + "tsc-frequency": 0, + "kvm-pv-eoi": true, + "npt": false, + "apic-id": 4294967295, + "kvm_asyncpf": true, + "min-xlevel2": 0, + "pclmulqdq": true, + "svm": false, + "sse3": true, + "sse2": true, + "ss": true, + "topoext": false, + "rdrand": true, + "avx512vbmi": false, + "kvm-asyncpf": true, + "spec-ctrl": true, + "arch-facilities": false, + "model": 63, + "node-id": -1 + } + } + }, + "id": "model-expansion" +} + +{ + "return": [ + { + "typename": "max-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "max" + }, + { + "typename": "host-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "host" + }, + { + "typename": "base-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": true, + "name": "base" + }, + { + "typename": "qemu64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu64" + }, + { + "typename": "qemu32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu32" + }, + { + "typename": "phenom-x86_64-cpu", + "unavailable-features": [ + "mmxext", + "fxsr-opt", + "3dnowext", + "3dnow", + "sse4a", + "npt" + ], + "migration-safe": true, + "static": false, + "name": "phenom" + }, + { + "typename": "pentium3-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium3" + }, + { + "typename": "pentium2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium2" + }, + { + "typename": "pentium-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium" + }, + { + "typename": "n270-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "n270" + }, + { + "typename": "kvm64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm64" + }, + { + "typename": "kvm32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm32" + }, + { + "typename": "cpu64-rhel6-x86_64-cpu", + "unavailable-features": [ + "sse4a" + ], + "migration-safe": true, + "static": false, + "name": "cpu64-rhel6" + }, + { + "typename": "coreduo-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "coreduo" + }, + { + "typename": "core2duo-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "core2duo" + }, + { + "typename": "athlon-x86_64-cpu", + "unavailable-features": [ + "mmxext", + "3dnowext", + "3dnow" + ], + "migration-safe": true, + "static": false, + "name": "athlon" + }, + { + "typename": "Westmere-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Westmere" + }, + { + "typename": "Westmere-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Westmere-IBRS" + }, + { + "typename": "Skylake-Server-x86_64-cpu", + "unavailable-features": [ + "hle", + "rtm", + "mpx", + "avx512f", + "avx512dq", + "rdseed", + "adx", + "smap", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "3dnowprefetch", + "xsavec", + "xgetbv1", + "mpx", + "mpx", + "avx512f", + "avx512f", + "avx512f" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Server" + }, + { + "typename": "Skylake-Server-IBRS-x86_64-cpu", + "unavailable-features": [ + "hle", + "rtm", + "mpx", + "avx512f", + "avx512dq", + "rdseed", + "adx", + "smap", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "3dnowprefetch", + "xsavec", + "xgetbv1", + "mpx", + "mpx", + "avx512f", + "avx512f", + "avx512f" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Server-IBRS" + }, + { + "typename": "Skylake-Client-x86_64-cpu", + "unavailable-features": [ + "hle", + "rtm", + "mpx", + "rdseed", + "adx", + "smap", + "3dnowprefetch", + "xsavec", + "xgetbv1", + "mpx", + "mpx" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Client" + }, + { + "typename": "Skylake-Client-IBRS-x86_64-cpu", + "unavailable-features": [ + "hle", + "rtm", + "mpx", + "rdseed", + "adx", + "smap", + "3dnowprefetch", + "xsavec", + "xgetbv1", + "mpx", + "mpx" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Client-IBRS" + }, + { + "typename": "SandyBridge-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "SandyBridge" + }, + { + "typename": "SandyBridge-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "SandyBridge-IBRS" + }, + { + "typename": "Penryn-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Penryn" + }, + { + "typename": "Opteron_G5-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse", + "3dnowprefetch", + "xop", + "fma4", + "tbm" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G5" + }, + { + "typename": "Opteron_G4-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse", + "3dnowprefetch", + "xop", + "fma4" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G4" + }, + { + "typename": "Opteron_G3-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G3" + }, + { + "typename": "Opteron_G2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G2" + }, + { + "typename": "Opteron_G1-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G1" + }, + { + "typename": "Nehalem-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Nehalem" + }, + { + "typename": "Nehalem-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Nehalem-IBRS" + }, + { + "typename": "IvyBridge-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "IvyBridge" + }, + { + "typename": "IvyBridge-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "IvyBridge-IBRS" + }, + { + "typename": "Haswell-x86_64-cpu", + "unavailable-features": [ + "hle", + "rtm" + ], + "migration-safe": true, + "static": false, + "name": "Haswell" + }, + { + "typename": "Haswell-noTSX-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell-noTSX" + }, + { + "typename": "Haswell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell-noTSX-IBRS" + }, + { + "typename": "Haswell-IBRS-x86_64-cpu", + "unavailable-features": [ + "hle", + "rtm" + ], + "migration-safe": true, + "static": false, + "name": "Haswell-IBRS" + }, + { + "typename": "EPYC-x86_64-cpu", + "unavailable-features": [ + "rdseed", + "adx", + "smap", + "clflushopt", + "sha-ni", + "mmxext", + "fxsr-opt", + "cr8legacy", + "sse4a", + "misalignsse", + "3dnowprefetch", + "osvw", + "xsavec", + "xgetbv1" + ], + "migration-safe": true, + "static": false, + "name": "EPYC" + }, + { + "typename": "EPYC-IBPB-x86_64-cpu", + "unavailable-features": [ + "rdseed", + "adx", + "smap", + "clflushopt", + "sha-ni", + "mmxext", + "fxsr-opt", + "cr8legacy", + "sse4a", + "misalignsse", + "3dnowprefetch", + "osvw", + "ibpb", + "xsavec", + "xgetbv1" + ], + "migration-safe": true, + "static": false, + "name": "EPYC-IBPB" + }, + { + "typename": "Conroe-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Conroe" + }, + { + "typename": "Broadwell-x86_64-cpu", + "unavailable-features": [ + "hle", + "rtm", + "rdseed", + "adx", + "smap", + "3dnowprefetch" + ], + "migration-safe": true, + "static": false, + "name": "Broadwell" + }, + { + "typename": "Broadwell-noTSX-x86_64-cpu", + "unavailable-features": [ + "rdseed", + "adx", + "smap", + "3dnowprefetch" + ], + "migration-safe": true, + "static": false, + "name": "Broadwell-noTSX" + }, + { + "typename": "Broadwell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [ + "rdseed", + "adx", + "smap", + "3dnowprefetch" + ], + "migration-safe": true, + "static": false, + "name": "Broadwell-noTSX-IBRS" + }, + { + "typename": "Broadwell-IBRS-x86_64-cpu", + "unavailable-features": [ + "hle", + "rtm", + "rdseed", + "adx", + "smap", + "3dnowprefetch" + ], + "migration-safe": true, + "static": false, + "name": "Broadwell-IBRS" + }, + { + "typename": "486-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "486" + } + ], + "id": "definitions" +} diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.xml new file mode 100644 index 0000000000..4347ea7c38 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.xml @@ -0,0 +1,37 @@ +<!-- Intel(R) Xeon(R) CPU E5-2609 v3 @ 1.90GHz --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000000' ecx_in='0x00' eax='0x0000000f' ebx='0x756e6547' ecx='0x6c65746e' edx='0x49656e69'/> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x000306f2' ebx='0x12100800' ecx='0x7ffefbff' edx='0xbfebfbff'/> + <cpuid eax_in='0x00000002' ecx_in='0x00' eax='0x76036301' ebx='0x00f0b6ff' ecx='0x00000000' edx='0x00c10000'/> + <cpuid eax_in='0x00000003' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x00' eax='0x1c004121' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x01' eax='0x1c004122' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x02' eax='0x1c004143' ebx='0x01c0003f' ecx='0x000001ff' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x03' eax='0x1c03c163' ebx='0x04c0003f' ecx='0x00002fff' edx='0x00000006'/> + <cpuid eax_in='0x00000005' ecx_in='0x00' eax='0x00000040' ebx='0x00000040' ecx='0x00000003' edx='0x00002120'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000075' ebx='0x00000002' ecx='0x00000009' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x000037ab' ecx='0x00000000' edx='0x0c000000'/> + <cpuid eax_in='0x00000008' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000009' ecx_in='0x00' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000a' ecx_in='0x00' eax='0x07300803' ebx='0x00000000' ecx='0x00000000' edx='0x00000603'/> + <cpuid eax_in='0x0000000b' ecx_in='0x00' eax='0x00000001' ebx='0x00000001' ecx='0x00000100' edx='0x00000012'/> + <cpuid eax_in='0x0000000b' ecx_in='0x01' eax='0x00000004' ebx='0x00000006' ecx='0x00000201' edx='0x00000012'/> + <cpuid eax_in='0x0000000c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x00' eax='0x00000007' ebx='0x00000340' ecx='0x00000340' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x02' eax='0x00000100' ebx='0x00000240' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000e' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000f' ecx_in='0x00' eax='0x00000000' ebx='0x00000017' ecx='0x00000000' edx='0x00000002'/> + <cpuid eax_in='0x0000000f' ecx_in='0x01' eax='0x00000000' ebx='0x00006000' ecx='0x00000017' edx='0x00000001'/> + <cpuid eax_in='0x80000000' ecx_in='0x00' eax='0x80000008' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000021' edx='0x2c100800'/> + <cpuid eax_in='0x80000002' ecx_in='0x00' eax='0x65746e49' ebx='0x2952286c' ecx='0x6f655820' edx='0x2952286e'/> + <cpuid eax_in='0x80000003' ecx_in='0x00' eax='0x55504320' ebx='0x2d354520' ecx='0x39303632' edx='0x20337620'/> + <cpuid eax_in='0x80000004' ecx_in='0x00' eax='0x2e312040' ebx='0x48473039' ecx='0x0000007a' edx='0x00000000'/> + <cpuid eax_in='0x80000005' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000006' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x01006040' edx='0x00000000'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> + <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x0000302e' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80860000' ecx_in='0x00' eax='0x00000000' ebx='0x00000017' ecx='0x00000000' edx='0x00000002'/> + <cpuid eax_in='0xc0000000' ecx_in='0x00' eax='0x00000000' ebx='0x00000017' ecx='0x00000000' edx='0x00000002'/> +</cpudata> -- 2.15.1

The CPU contains the updated microcode for CVE-2017-5715. The *-guest.xml and *-json.xml CPU definitions use Skylake-Client CPU model rather than Broadwell. This is similar to Xeon-E5-2650-v4 and it is caused by our CPU model selection code when no model matches the CPU signature (family + model). We'd need to maintain a complete list of CPU signatures for our CPU models to fix this. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- tests/cputest.c | 1 + .../x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml | 7 + .../x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml | 8 + .../x86_64-cpuid-Xeon-E5-2623-v4-guest.xml | 31 + .../x86_64-cpuid-Xeon-E5-2623-v4-host.xml | 35 ++ .../x86_64-cpuid-Xeon-E5-2623-v4-json.xml | 12 + .../cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.json | 662 +++++++++++++++++++++ tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.xml | 43 ++ 8 files changed, 799 insertions(+) create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.json create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.xml diff --git a/tests/cputest.c b/tests/cputest.c index 3737fc1a7f..a2755dccaf 100644 --- a/tests/cputest.c +++ b/tests/cputest.c @@ -1189,6 +1189,7 @@ mymain(void) DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-5110", JSON_NONE); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E3-1245-v5", JSON_MODELS); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2609-v3", JSON_MODELS); + DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2623-v4", JSON_MODELS); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2630-v3", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2650-v3", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2650-v4", JSON_MODELS); diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml new file mode 100644 index 0000000000..d904808cec --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml @@ -0,0 +1,7 @@ +<!-- Features disabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x0804c1fc' edx='0xb0600000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x00001000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000f' ecx_in='0x01' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000006'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml new file mode 100644 index 0000000000..4660a8801b --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml @@ -0,0 +1,8 @@ +<!-- Features enabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0xf7fa3203' edx='0x0f8bfbff'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x001c0fbb' ecx='0x00000000' edx='0x04000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000121' edx='0x2c100800'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml new file mode 100644 index 0000000000..6f52bdbf21 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml @@ -0,0 +1,31 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Skylake-Client</model> + <vendor>Intel</vendor> + <feature policy='require' name='ds'/> + <feature policy='require' name='acpi'/> + <feature policy='require' name='ss'/> + <feature policy='require' name='ht'/> + <feature policy='require' name='tm'/> + <feature policy='require' name='pbe'/> + <feature policy='require' name='dtes64'/> + <feature policy='require' name='monitor'/> + <feature policy='require' name='ds_cpl'/> + <feature policy='require' name='vmx'/> + <feature policy='require' name='smx'/> + <feature policy='require' name='est'/> + <feature policy='require' name='tm2'/> + <feature policy='require' name='xtpr'/> + <feature policy='require' name='pdcm'/> + <feature policy='require' name='dca'/> + <feature policy='require' name='osxsave'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='cmt'/> + <feature policy='require' name='spec-ctrl'/> + <feature policy='require' name='mbm_total'/> + <feature policy='require' name='mbm_local'/> + <feature policy='require' name='pdpe1gb'/> + <feature policy='require' name='invtsc'/> + <feature policy='disable' name='mpx'/> + <feature policy='disable' name='xsavec'/> + <feature policy='disable' name='xgetbv1'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml new file mode 100644 index 0000000000..cf718eeea0 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml @@ -0,0 +1,35 @@ +<cpu> + <arch>x86_64</arch> + <model>Broadwell</model> + <vendor>Intel</vendor> + <feature name='vme'/> + <feature name='ds'/> + <feature name='acpi'/> + <feature name='ss'/> + <feature name='ht'/> + <feature name='tm'/> + <feature name='pbe'/> + <feature name='dtes64'/> + <feature name='monitor'/> + <feature name='ds_cpl'/> + <feature name='vmx'/> + <feature name='smx'/> + <feature name='est'/> + <feature name='tm2'/> + <feature name='xtpr'/> + <feature name='pdcm'/> + <feature name='dca'/> + <feature name='osxsave'/> + <feature name='f16c'/> + <feature name='rdrand'/> + <feature name='arat'/> + <feature name='tsc_adjust'/> + <feature name='cmt'/> + <feature name='spec-ctrl'/> + <feature name='xsaveopt'/> + <feature name='mbm_total'/> + <feature name='mbm_local'/> + <feature name='pdpe1gb'/> + <feature name='abm'/> + <feature name='invtsc'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml new file mode 100644 index 0000000000..3bf0da3cb9 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml @@ -0,0 +1,12 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Skylake-Client</model> + <vendor>Intel</vendor> + <feature policy='require' name='ss'/> + <feature policy='require' name='hypervisor'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='spec-ctrl'/> + <feature policy='require' name='pdpe1gb'/> + <feature policy='disable' name='mpx'/> + <feature policy='disable' name='xsavec'/> + <feature policy='disable' name='xgetbv1'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.json b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.json new file mode 100644 index 0000000000..0506dec0a7 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.json @@ -0,0 +1,662 @@ +{ + "return": { + "model": { + "name": "base", + "props": { + "pfthreshold": false, + "pku": false, + "rtm": true, + "tsc_adjust": true, + "tsc-deadline": true, + "xstore-en": false, + "cpuid-0xb": true, + "abm": true, + "sse": true, + "kvm-mmu": false, + "xsaveopt": true, + "hv-spinlocks": -1, + "tce": false, + "realized": false, + "kvm_steal_time": true, + "smep": true, + "fpu": true, + "xcrypt": false, + "sse4_2": true, + "clflush": true, + "sse4_1": true, + "flushbyasid": false, + "kvm-steal-time": true, + "lm": true, + "tsc": true, + "adx": true, + "fxsr": true, + "sha-ni": false, + "decodeassists": false, + "hv-relaxed": false, + "pclmuldq": true, + "xgetbv1": false, + "xstore": false, + "vmcb_clean": false, + "tsc-adjust": true, + "vme": true, + "vendor": "GenuineIntel", + "arat": true, + "ffxsr": false, + "de": true, + "aes": true, + "pse": true, + "ds-cpl": false, + "fxsr_opt": false, + "tbm": false, + "ia64": false, + "phe-en": false, + "f16c": true, + "ds": false, + "mpx": false, + "vmware-cpuid-freq": true, + "avx512f": false, + "avx2": true, + "misalignsse": false, + "level": 13, + "pbe": false, + "cx16": true, + "ds_cpl": false, + "movbe": true, + "perfctr-nb": false, + "nrip_save": false, + "kvm_mmu": false, + "ospke": false, + "pmu": false, + "avx512ifma": false, + "stepping": 1, + "sep": true, + "sse4a": false, + "avx512dq": false, + "stibp": false, + "core-id": -1, + "i64": true, + "avx512-4vnniw": false, + "xsave": true, + "pmm": false, + "hle": true, + "nodeid_msr": false, + "hv-crash": false, + "est": false, + "x-hv-max-vps": -1, + "osxsave": false, + "xop": false, + "smx": false, + "tsc-scale": false, + "monitor": false, + "avx512er": false, + "apic": true, + "sse4.1": true, + "sse4.2": true, + "hv-vapic": false, + "pause-filter": false, + "lahf-lm": true, + "kvm-nopiodelay": true, + "cmp_legacy": false, + "acpi": false, + "fma4": false, + "mmx": true, + "svm_lock": false, + "pcommit": false, + "mtrr": true, + "clwb": false, + "dca": false, + "pdcm": false, + "xcrypt-en": false, + "3dnow": false, + "invtsc": false, + "tm2": false, + "hv-time": false, + "hypervisor": true, + "kvmclock-stable-bit": true, + "xlevel": 2147483656, + "lahf_lm": true, + "enforce": false, + "pcid": true, + "sse4-1": true, + "lbrv": false, + "avx512-vpopcntdq": false, + "avx512-4fmaps": false, + "fill-mtrr-mask": true, + "pause_filter": false, + "svm-lock": false, + "popcnt": true, + "nrip-save": false, + "avx512vl": false, + "x2apic": true, + "kvmclock": true, + "smap": true, + "pdpe1gb": true, + "family": 6, + "min-level": 13, + "xlevel2": 0, + "dtes64": false, + "xd": true, + "kvm_pv_eoi": true, + "ace2": false, + "kvm_pv_unhalt": true, + "xtpr": false, + "perfctr_nb": false, + "avx512bw": false, + "l3-cache": true, + "nx": true, + "lwp": false, + "msr": true, + "ibpb": false, + "syscall": true, + "tm": false, + "perfctr-core": false, + "memory": "/machine/unattached/system[0]", + "pge": true, + "pn": false, + "fma": true, + "nodeid-msr": false, + "xsavec": false, + "socket-id": -1, + "thread-id": -1, + "cx8": true, + "mce": true, + "avx512cd": false, + "cr8legacy": false, + "mca": true, + "avx512pf": false, + "pni": true, + "hv-vendor-id": "", + "rdseed": true, + "osvw": false, + "fsgsbase": true, + "model-id": "Intel(R) Xeon(R) CPU E5-2623 v4 @ 2.60GHz", + "cmp-legacy": false, + "kvm-pv-unhalt": true, + "rdtscp": true, + "mmxext": false, + "host-phys-bits": true, + "cid": false, + "vmx": false, + "ssse3": true, + "extapic": false, + "pse36": true, + "min-xlevel": 2147483656, + "ibs": false, + "la57": false, + "avx": true, + "kvm-no-smi-migration": false, + "tcg-cpuid": true, + "ace2-en": false, + "umip": false, + "invpcid": true, + "bmi1": true, + "bmi2": true, + "vmcb-clean": false, + "erms": true, + "cmov": true, + "check": true, + "perfctr_core": false, + "xsaves": false, + "clflushopt": false, + "pat": true, + "sse4-2": true, + "3dnowprefetch": true, + "rdpid": false, + "full-cpuid-auto-level": true, + "pae": true, + "wdt": false, + "tsc_scale": false, + "skinit": false, + "fxsr-opt": false, + "kvm_nopiodelay": true, + "phys-bits": 0, + "kvm": true, + "pmm-en": false, + "phe": false, + "3dnowext": false, + "lmce": true, + "ht": false, + "tsc-frequency": 0, + "kvm-pv-eoi": true, + "npt": false, + "apic-id": 4294967295, + "kvm_asyncpf": true, + "min-xlevel2": 0, + "pclmulqdq": true, + "svm": false, + "sse3": true, + "sse2": true, + "ss": true, + "topoext": false, + "rdrand": true, + "avx512vbmi": false, + "kvm-asyncpf": true, + "spec-ctrl": true, + "arch-facilities": false, + "model": 79, + "node-id": -1 + } + } + }, + "id": "model-expansion" +} + +{ + "return": [ + { + "typename": "max-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "max" + }, + { + "typename": "host-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "host" + }, + { + "typename": "base-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": true, + "name": "base" + }, + { + "typename": "qemu64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu64" + }, + { + "typename": "qemu32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu32" + }, + { + "typename": "phenom-x86_64-cpu", + "unavailable-features": [ + "mmxext", + "fxsr-opt", + "3dnowext", + "3dnow", + "sse4a", + "npt" + ], + "migration-safe": true, + "static": false, + "name": "phenom" + }, + { + "typename": "pentium3-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium3" + }, + { + "typename": "pentium2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium2" + }, + { + "typename": "pentium-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium" + }, + { + "typename": "n270-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "n270" + }, + { + "typename": "kvm64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm64" + }, + { + "typename": "kvm32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm32" + }, + { + "typename": "cpu64-rhel6-x86_64-cpu", + "unavailable-features": [ + "sse4a" + ], + "migration-safe": true, + "static": false, + "name": "cpu64-rhel6" + }, + { + "typename": "coreduo-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "coreduo" + }, + { + "typename": "core2duo-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "core2duo" + }, + { + "typename": "athlon-x86_64-cpu", + "unavailable-features": [ + "mmxext", + "3dnowext", + "3dnow" + ], + "migration-safe": true, + "static": false, + "name": "athlon" + }, + { + "typename": "Westmere-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Westmere" + }, + { + "typename": "Westmere-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Westmere-IBRS" + }, + { + "typename": "Skylake-Server-x86_64-cpu", + "unavailable-features": [ + "mpx", + "avx512f", + "avx512dq", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "xsavec", + "xgetbv1", + "mpx", + "mpx", + "avx512f", + "avx512f", + "avx512f" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Server" + }, + { + "typename": "Skylake-Server-IBRS-x86_64-cpu", + "unavailable-features": [ + "mpx", + "avx512f", + "avx512dq", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "xsavec", + "xgetbv1", + "mpx", + "mpx", + "avx512f", + "avx512f", + "avx512f" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Server-IBRS" + }, + { + "typename": "Skylake-Client-x86_64-cpu", + "unavailable-features": [ + "mpx", + "xsavec", + "xgetbv1", + "mpx", + "mpx" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Client" + }, + { + "typename": "Skylake-Client-IBRS-x86_64-cpu", + "unavailable-features": [ + "mpx", + "xsavec", + "xgetbv1", + "mpx", + "mpx" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Client-IBRS" + }, + { + "typename": "SandyBridge-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "SandyBridge" + }, + { + "typename": "SandyBridge-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "SandyBridge-IBRS" + }, + { + "typename": "Penryn-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Penryn" + }, + { + "typename": "Opteron_G5-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse", + "xop", + "fma4", + "tbm" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G5" + }, + { + "typename": "Opteron_G4-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse", + "xop", + "fma4" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G4" + }, + { + "typename": "Opteron_G3-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G3" + }, + { + "typename": "Opteron_G2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G2" + }, + { + "typename": "Opteron_G1-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G1" + }, + { + "typename": "Nehalem-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Nehalem" + }, + { + "typename": "Nehalem-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Nehalem-IBRS" + }, + { + "typename": "IvyBridge-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "IvyBridge" + }, + { + "typename": "IvyBridge-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "IvyBridge-IBRS" + }, + { + "typename": "Haswell-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell" + }, + { + "typename": "Haswell-noTSX-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell-noTSX" + }, + { + "typename": "Haswell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell-noTSX-IBRS" + }, + { + "typename": "Haswell-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell-IBRS" + }, + { + "typename": "EPYC-x86_64-cpu", + "unavailable-features": [ + "clflushopt", + "sha-ni", + "mmxext", + "fxsr-opt", + "cr8legacy", + "sse4a", + "misalignsse", + "osvw", + "xsavec", + "xgetbv1" + ], + "migration-safe": true, + "static": false, + "name": "EPYC" + }, + { + "typename": "EPYC-IBPB-x86_64-cpu", + "unavailable-features": [ + "clflushopt", + "sha-ni", + "mmxext", + "fxsr-opt", + "cr8legacy", + "sse4a", + "misalignsse", + "osvw", + "ibpb", + "xsavec", + "xgetbv1" + ], + "migration-safe": true, + "static": false, + "name": "EPYC-IBPB" + }, + { + "typename": "Conroe-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Conroe" + }, + { + "typename": "Broadwell-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell" + }, + { + "typename": "Broadwell-noTSX-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell-noTSX" + }, + { + "typename": "Broadwell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell-noTSX-IBRS" + }, + { + "typename": "Broadwell-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell-IBRS" + }, + { + "typename": "486-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "486" + } + ], + "id": "definitions" +} diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.xml new file mode 100644 index 0000000000..b8fe7955c5 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.xml @@ -0,0 +1,43 @@ +<!-- Intel(R) Xeon(R) CPU E5-2623 v4 @ 2.60GHz --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000000' ecx_in='0x00' eax='0x00000014' ebx='0x756e6547' ecx='0x6c65746e' edx='0x49656e69'/> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x000406f1' ebx='0x05100800' ecx='0x7ffefbff' edx='0xbfebfbff'/> + <cpuid eax_in='0x00000002' ecx_in='0x00' eax='0x76036301' ebx='0x00f0b5ff' ecx='0x00000000' edx='0x00c30000'/> + <cpuid eax_in='0x00000003' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x00' eax='0x1c004121' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x01' eax='0x1c004122' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x02' eax='0x1c004143' ebx='0x01c0003f' ecx='0x000001ff' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x03' eax='0x1c03c163' ebx='0x04c0003f' ecx='0x00001fff' edx='0x00000006'/> + <cpuid eax_in='0x00000005' ecx_in='0x00' eax='0x00000040' ebx='0x00000040' ecx='0x00000003' edx='0x00002120'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000077' ebx='0x00000002' ecx='0x00000009' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x021cbfbb' ecx='0x00000000' edx='0x0c000000'/> + <cpuid eax_in='0x00000008' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000009' ecx_in='0x00' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000a' ecx_in='0x00' eax='0x07300403' ebx='0x00000000' ecx='0x00000000' edx='0x00000603'/> + <cpuid eax_in='0x0000000b' ecx_in='0x00' eax='0x00000001' ebx='0x00000002' ecx='0x00000100' edx='0x00000005'/> + <cpuid eax_in='0x0000000b' ecx_in='0x01' eax='0x00000004' ebx='0x00000008' ecx='0x00000201' edx='0x00000005'/> + <cpuid eax_in='0x0000000c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x00' eax='0x00000007' ebx='0x00000340' ecx='0x00000340' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x02' eax='0x00000100' ebx='0x00000240' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000e' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000f' ecx_in='0x00' eax='0x00000000' ebx='0x0000001f' ecx='0x00000000' edx='0x00000002'/> + <cpuid eax_in='0x0000000f' ecx_in='0x01' eax='0x00000000' ebx='0x00004000' ecx='0x0000001f' edx='0x00000007'/> + <cpuid eax_in='0x00000010' ecx_in='0x00' eax='0x00000000' ebx='0x00000002' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000010' ecx_in='0x01' eax='0x00000013' ebx='0x000c0000' ecx='0x00000004' edx='0x0000000f'/> + <cpuid eax_in='0x00000011' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000012' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000013' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000014' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/> + <cpuid eax_in='0x80000000' ecx_in='0x00' eax='0x80000008' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000121' edx='0x2c100800'/> + <cpuid eax_in='0x80000002' ecx_in='0x00' eax='0x65746e49' ebx='0x2952286c' ecx='0x6f655820' edx='0x2952286e'/> + <cpuid eax_in='0x80000003' ecx_in='0x00' eax='0x55504320' ebx='0x2d354520' ecx='0x33323632' edx='0x20347620'/> + <cpuid eax_in='0x80000004' ecx_in='0x00' eax='0x2e322040' ebx='0x48473036' ecx='0x0000007a' edx='0x00000000'/> + <cpuid eax_in='0x80000005' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000006' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x01006040' edx='0x00000000'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> + <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x0000302e' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80860000' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/> + <cpuid eax_in='0xc0000000' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/> +</cpudata> -- 2.15.1

The CPU contains the updated microcode for CVE-2017-5715. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- tests/cputest.c | 1 + .../x86_64-cpuid-Xeon-Gold-5115-disabled.xml | 8 + .../x86_64-cpuid-Xeon-Gold-5115-enabled.xml | 8 + .../x86_64-cpuid-Xeon-Gold-5115-guest.xml | 30 + .../x86_64-cpuid-Xeon-Gold-5115-host.xml | 31 ++ .../x86_64-cpuid-Xeon-Gold-5115-json.xml | 9 + tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.json | 614 +++++++++++++++++++++ tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.xml | 54 ++ 8 files changed, 755 insertions(+) create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.json create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.xml diff --git a/tests/cputest.c b/tests/cputest.c index a2755dccaf..037f23a9b0 100644 --- a/tests/cputest.c +++ b/tests/cputest.c @@ -1196,6 +1196,7 @@ mymain(void) DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E7-4820", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E7-4830", JSON_MODELS_REQUIRED); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E7-8890-v3", JSON_MODELS); + DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Gold-5115", JSON_MODELS); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Gold-6148", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-W3520", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-X5460", JSON_NONE); diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-disabled.xml b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-disabled.xml new file mode 100644 index 0000000000..b5c70a9dc4 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-disabled.xml @@ -0,0 +1,8 @@ +<!-- Features disabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x0804c1fc' edx='0xb0600000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x00001000' ecx='0x00000008' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000008' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000f' ecx_in='0x01' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000006'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-enabled.xml b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-enabled.xml new file mode 100644 index 0000000000..23d867a9ba --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-enabled.xml @@ -0,0 +1,8 @@ +<!-- Features enabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0xf7fa3203' edx='0x0f8bfbff'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0xd19f4fbb' ecx='0x00000000' edx='0x04000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000007' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000121' edx='0x2c100800'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml new file mode 100644 index 0000000000..5a7f3beee8 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml @@ -0,0 +1,30 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Skylake-Server</model> + <vendor>Intel</vendor> + <feature policy='require' name='ds'/> + <feature policy='require' name='acpi'/> + <feature policy='require' name='ss'/> + <feature policy='require' name='ht'/> + <feature policy='require' name='tm'/> + <feature policy='require' name='pbe'/> + <feature policy='require' name='dtes64'/> + <feature policy='require' name='monitor'/> + <feature policy='require' name='ds_cpl'/> + <feature policy='require' name='vmx'/> + <feature policy='require' name='smx'/> + <feature policy='require' name='est'/> + <feature policy='require' name='tm2'/> + <feature policy='require' name='xtpr'/> + <feature policy='require' name='pdcm'/> + <feature policy='require' name='dca'/> + <feature policy='require' name='osxsave'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='cmt'/> + <feature policy='require' name='clflushopt'/> + <feature policy='require' name='pku'/> + <feature policy='require' name='spec-ctrl'/> + <feature policy='require' name='xsaves'/> + <feature policy='require' name='mbm_total'/> + <feature policy='require' name='mbm_local'/> + <feature policy='require' name='invtsc'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml new file mode 100644 index 0000000000..15f2fa72d5 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml @@ -0,0 +1,31 @@ +<cpu> + <arch>x86_64</arch> + <model>Skylake-Server</model> + <vendor>Intel</vendor> + <feature name='ds'/> + <feature name='acpi'/> + <feature name='ss'/> + <feature name='ht'/> + <feature name='tm'/> + <feature name='pbe'/> + <feature name='dtes64'/> + <feature name='monitor'/> + <feature name='ds_cpl'/> + <feature name='vmx'/> + <feature name='smx'/> + <feature name='est'/> + <feature name='tm2'/> + <feature name='xtpr'/> + <feature name='pdcm'/> + <feature name='dca'/> + <feature name='osxsave'/> + <feature name='tsc_adjust'/> + <feature name='cmt'/> + <feature name='clflushopt'/> + <feature name='pku'/> + <feature name='spec-ctrl'/> + <feature name='xsaves'/> + <feature name='mbm_total'/> + <feature name='mbm_local'/> + <feature name='invtsc'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml new file mode 100644 index 0000000000..866528c957 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml @@ -0,0 +1,9 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Skylake-Server</model> + <vendor>Intel</vendor> + <feature policy='require' name='ss'/> + <feature policy='require' name='hypervisor'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='clflushopt'/> + <feature policy='require' name='spec-ctrl'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.json b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.json new file mode 100644 index 0000000000..79f3580219 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.json @@ -0,0 +1,614 @@ +{ + "return": { + "model": { + "name": "base", + "props": { + "pfthreshold": false, + "pku": false, + "rtm": true, + "tsc_adjust": true, + "tsc-deadline": true, + "xstore-en": false, + "cpuid-0xb": true, + "abm": true, + "sse": true, + "kvm-mmu": false, + "xsaveopt": true, + "hv-spinlocks": -1, + "tce": false, + "realized": false, + "kvm_steal_time": true, + "smep": true, + "fpu": true, + "xcrypt": false, + "sse4_2": true, + "clflush": true, + "sse4_1": true, + "flushbyasid": false, + "kvm-steal-time": true, + "lm": true, + "tsc": true, + "adx": true, + "fxsr": true, + "sha-ni": false, + "decodeassists": false, + "hv-relaxed": false, + "pclmuldq": true, + "xgetbv1": true, + "xstore": false, + "vmcb_clean": false, + "tsc-adjust": true, + "vme": true, + "vendor": "GenuineIntel", + "arat": true, + "ffxsr": false, + "de": true, + "aes": true, + "pse": true, + "ds-cpl": false, + "fxsr_opt": false, + "tbm": false, + "ia64": false, + "phe-en": false, + "f16c": true, + "ds": false, + "mpx": true, + "vmware-cpuid-freq": true, + "avx512f": true, + "avx2": true, + "misalignsse": false, + "level": 13, + "pbe": false, + "cx16": true, + "ds_cpl": false, + "movbe": true, + "perfctr-nb": false, + "nrip_save": false, + "kvm_mmu": false, + "ospke": false, + "pmu": false, + "avx512ifma": false, + "stepping": 4, + "sep": true, + "sse4a": false, + "avx512dq": true, + "stibp": false, + "core-id": -1, + "i64": true, + "avx512-4vnniw": false, + "xsave": true, + "pmm": false, + "hle": true, + "nodeid_msr": false, + "hv-crash": false, + "est": false, + "x-hv-max-vps": -1, + "osxsave": false, + "xop": false, + "smx": false, + "tsc-scale": false, + "monitor": false, + "avx512er": false, + "apic": true, + "sse4.1": true, + "sse4.2": true, + "hv-vapic": false, + "pause-filter": false, + "lahf-lm": true, + "kvm-nopiodelay": true, + "cmp_legacy": false, + "acpi": false, + "fma4": false, + "mmx": true, + "svm_lock": false, + "pcommit": false, + "mtrr": true, + "clwb": true, + "dca": false, + "pdcm": false, + "xcrypt-en": false, + "3dnow": false, + "invtsc": false, + "tm2": false, + "hv-time": false, + "hypervisor": true, + "kvmclock-stable-bit": true, + "xlevel": 2147483656, + "lahf_lm": true, + "enforce": false, + "pcid": true, + "sse4-1": true, + "lbrv": false, + "avx512-vpopcntdq": false, + "avx512-4fmaps": false, + "fill-mtrr-mask": true, + "pause_filter": false, + "svm-lock": false, + "popcnt": true, + "nrip-save": false, + "avx512vl": true, + "x2apic": true, + "kvmclock": true, + "smap": true, + "pdpe1gb": true, + "family": 6, + "min-level": 13, + "xlevel2": 0, + "dtes64": false, + "xd": true, + "kvm_pv_eoi": true, + "ace2": false, + "kvm_pv_unhalt": true, + "xtpr": false, + "perfctr_nb": false, + "avx512bw": true, + "l3-cache": true, + "nx": true, + "lwp": false, + "msr": true, + "ibpb": false, + "syscall": true, + "tm": false, + "perfctr-core": false, + "memory": "/machine/unattached/system[0]", + "pge": true, + "pn": false, + "fma": true, + "nodeid-msr": false, + "xsavec": true, + "socket-id": -1, + "thread-id": -1, + "cx8": true, + "mce": true, + "avx512cd": true, + "cr8legacy": false, + "mca": true, + "avx512pf": false, + "pni": true, + "hv-vendor-id": "", + "rdseed": true, + "osvw": false, + "fsgsbase": true, + "model-id": "Intel(R) Xeon(R) Gold 5115 CPU @ 2.40GHz", + "cmp-legacy": false, + "kvm-pv-unhalt": true, + "rdtscp": true, + "mmxext": false, + "host-phys-bits": true, + "cid": false, + "vmx": false, + "ssse3": true, + "extapic": false, + "pse36": true, + "min-xlevel": 2147483656, + "ibs": false, + "la57": false, + "avx": true, + "kvm-no-smi-migration": false, + "tcg-cpuid": true, + "ace2-en": false, + "umip": false, + "invpcid": true, + "bmi1": true, + "bmi2": true, + "vmcb-clean": false, + "erms": true, + "cmov": true, + "check": true, + "perfctr_core": false, + "xsaves": false, + "clflushopt": true, + "pat": true, + "sse4-2": true, + "3dnowprefetch": true, + "rdpid": false, + "full-cpuid-auto-level": true, + "pae": true, + "wdt": false, + "tsc_scale": false, + "skinit": false, + "fxsr-opt": false, + "kvm_nopiodelay": true, + "phys-bits": 0, + "kvm": true, + "pmm-en": false, + "phe": false, + "3dnowext": false, + "lmce": true, + "ht": false, + "tsc-frequency": 0, + "kvm-pv-eoi": true, + "npt": false, + "apic-id": 4294967295, + "kvm_asyncpf": true, + "min-xlevel2": 0, + "pclmulqdq": true, + "svm": false, + "sse3": true, + "sse2": true, + "ss": true, + "topoext": false, + "rdrand": true, + "avx512vbmi": false, + "kvm-asyncpf": true, + "spec-ctrl": true, + "arch-facilities": false, + "model": 85, + "node-id": -1 + } + } + }, + "id": "model-expansion" +} + +{ + "return": [ + { + "typename": "max-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "max" + }, + { + "typename": "host-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "host" + }, + { + "typename": "base-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": true, + "name": "base" + }, + { + "typename": "qemu64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu64" + }, + { + "typename": "qemu32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu32" + }, + { + "typename": "phenom-x86_64-cpu", + "unavailable-features": [ + "mmxext", + "fxsr-opt", + "3dnowext", + "3dnow", + "sse4a", + "npt" + ], + "migration-safe": true, + "static": false, + "name": "phenom" + }, + { + "typename": "pentium3-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium3" + }, + { + "typename": "pentium2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium2" + }, + { + "typename": "pentium-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium" + }, + { + "typename": "n270-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "n270" + }, + { + "typename": "kvm64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm64" + }, + { + "typename": "kvm32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm32" + }, + { + "typename": "cpu64-rhel6-x86_64-cpu", + "unavailable-features": [ + "sse4a" + ], + "migration-safe": true, + "static": false, + "name": "cpu64-rhel6" + }, + { + "typename": "coreduo-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "coreduo" + }, + { + "typename": "core2duo-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "core2duo" + }, + { + "typename": "athlon-x86_64-cpu", + "unavailable-features": [ + "mmxext", + "3dnowext", + "3dnow" + ], + "migration-safe": true, + "static": false, + "name": "athlon" + }, + { + "typename": "Westmere-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Westmere" + }, + { + "typename": "Westmere-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Westmere-IBRS" + }, + { + "typename": "Skylake-Server-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Skylake-Server" + }, + { + "typename": "Skylake-Server-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Skylake-Server-IBRS" + }, + { + "typename": "Skylake-Client-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Skylake-Client" + }, + { + "typename": "Skylake-Client-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Skylake-Client-IBRS" + }, + { + "typename": "SandyBridge-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "SandyBridge" + }, + { + "typename": "SandyBridge-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "SandyBridge-IBRS" + }, + { + "typename": "Penryn-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Penryn" + }, + { + "typename": "Opteron_G5-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse", + "xop", + "fma4", + "tbm" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G5" + }, + { + "typename": "Opteron_G4-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse", + "xop", + "fma4" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G4" + }, + { + "typename": "Opteron_G3-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G3" + }, + { + "typename": "Opteron_G2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G2" + }, + { + "typename": "Opteron_G1-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G1" + }, + { + "typename": "Nehalem-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Nehalem" + }, + { + "typename": "Nehalem-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Nehalem-IBRS" + }, + { + "typename": "IvyBridge-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "IvyBridge" + }, + { + "typename": "IvyBridge-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "IvyBridge-IBRS" + }, + { + "typename": "Haswell-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell" + }, + { + "typename": "Haswell-noTSX-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell-noTSX" + }, + { + "typename": "Haswell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell-noTSX-IBRS" + }, + { + "typename": "Haswell-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell-IBRS" + }, + { + "typename": "EPYC-x86_64-cpu", + "unavailable-features": [ + "sha-ni", + "mmxext", + "fxsr-opt", + "cr8legacy", + "sse4a", + "misalignsse", + "osvw" + ], + "migration-safe": true, + "static": false, + "name": "EPYC" + }, + { + "typename": "EPYC-IBPB-x86_64-cpu", + "unavailable-features": [ + "sha-ni", + "mmxext", + "fxsr-opt", + "cr8legacy", + "sse4a", + "misalignsse", + "osvw", + "ibpb" + ], + "migration-safe": true, + "static": false, + "name": "EPYC-IBPB" + }, + { + "typename": "Conroe-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Conroe" + }, + { + "typename": "Broadwell-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell" + }, + { + "typename": "Broadwell-noTSX-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell-noTSX" + }, + { + "typename": "Broadwell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell-noTSX-IBRS" + }, + { + "typename": "Broadwell-IBRS-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell-IBRS" + }, + { + "typename": "486-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "486" + } + ], + "id": "definitions" +} diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.xml b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.xml new file mode 100644 index 0000000000..10d98bee6b --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.xml @@ -0,0 +1,54 @@ +<!-- Intel(R) Xeon(R) Gold 5115 CPU @ 2.40GHz --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000000' ecx_in='0x00' eax='0x00000016' ebx='0x756e6547' ecx='0x6c65746e' edx='0x49656e69'/> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00050654' ebx='0x23200800' ecx='0x7ffefbff' edx='0xbfebfbff'/> + <cpuid eax_in='0x00000002' ecx_in='0x00' eax='0x76036301' ebx='0x00f0b5ff' ecx='0x00000000' edx='0x00c30000'/> + <cpuid eax_in='0x00000003' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x00' eax='0x3c004121' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x01' eax='0x3c004122' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x02' eax='0x3c004143' ebx='0x03c0003f' ecx='0x000003ff' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x03' eax='0x3c07c163' ebx='0x0280003f' ecx='0x00004fff' edx='0x00000004'/> + <cpuid eax_in='0x00000005' ecx_in='0x00' eax='0x00000040' ebx='0x00000040' ecx='0x00000003' edx='0x00002020'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000ef7' ebx='0x00000002' ecx='0x00000009' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0xd39ffffb' ecx='0x00000008' edx='0x0c000000'/> + <cpuid eax_in='0x00000008' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000009' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000a' ecx_in='0x00' eax='0x07300404' ebx='0x00000000' ecx='0x00000000' edx='0x00000603'/> + <cpuid eax_in='0x0000000b' ecx_in='0x00' eax='0x00000001' ebx='0x00000002' ecx='0x00000100' edx='0x00000023'/> + <cpuid eax_in='0x0000000b' ecx_in='0x01' eax='0x00000005' ebx='0x00000014' ecx='0x00000201' edx='0x00000023'/> + <cpuid eax_in='0x0000000c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x00' eax='0x000002ff' ebx='0x00000a80' ecx='0x00000a88' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x0000000f' ebx='0x00000a00' ecx='0x00000100' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x02' eax='0x00000100' ebx='0x00000240' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x03' eax='0x00000040' ebx='0x000003c0' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x04' eax='0x00000040' ebx='0x00000400' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x05' eax='0x00000040' ebx='0x00000440' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x06' eax='0x00000200' ebx='0x00000480' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x07' eax='0x00000400' ebx='0x00000680' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x08' eax='0x00000080' ebx='0x00000000' ecx='0x00000001' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x09' eax='0x00000008' ebx='0x00000a80' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000e' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000f' ecx_in='0x00' eax='0x00000000' ebx='0x0000004f' ecx='0x00000000' edx='0x00000002'/> + <cpuid eax_in='0x0000000f' ecx_in='0x01' eax='0x00000000' ebx='0x0000a000' ecx='0x0000004f' edx='0x00000007'/> + <cpuid eax_in='0x00000010' ecx_in='0x00' eax='0x00000000' ebx='0x0000000a' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000010' ecx_in='0x01' eax='0x0000000a' ebx='0x00000600' ecx='0x00000004' edx='0x0000000f'/> + <cpuid eax_in='0x00000010' ecx_in='0x03' eax='0x00000059' ebx='0x00000000' ecx='0x00000004' edx='0x00000007'/> + <cpuid eax_in='0x00000011' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000012' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000013' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000014' ecx_in='0x00' eax='0x00000001' ebx='0x0000000f' ecx='0x00000007' edx='0x00000000'/> + <cpuid eax_in='0x00000014' ecx_in='0x01' eax='0x02490002' ebx='0x003f3fff' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000015' ecx_in='0x00' eax='0x00000002' ebx='0x000000c0' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000016' ecx_in='0x00' eax='0x00000960' ebx='0x00000c80' ecx='0x00000064' edx='0x00000000'/> + <cpuid eax_in='0x80000000' ecx_in='0x00' eax='0x80000008' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000121' edx='0x2c100800'/> + <cpuid eax_in='0x80000002' ecx_in='0x00' eax='0x65746e49' ebx='0x2952286c' ecx='0x6f655820' edx='0x2952286e'/> + <cpuid eax_in='0x80000003' ecx_in='0x00' eax='0x6c6f4720' ebx='0x31352064' ecx='0x43203531' edx='0x40205550'/> + <cpuid eax_in='0x80000004' ecx_in='0x00' eax='0x342e3220' ebx='0x7a484730' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000005' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000006' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x01006040' edx='0x00000000'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> + <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x0000302e' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80860000' ecx_in='0x00' eax='0x00000960' ebx='0x00000c80' ecx='0x00000064' edx='0x00000000'/> + <cpuid eax_in='0xc0000000' ecx_in='0x00' eax='0x00000960' ebx='0x00000c80' ecx='0x00000064' edx='0x00000000'/> +</cpudata> -- 2.15.1

The CPU contains the updated microcode for CVE-2017-5715. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- tests/cputest.c | 1 + ...86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml | 7 + ...x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml | 9 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml | 18 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml | 18 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml | 13 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb.json | 722 +++++++++++++++++++++ .../x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml | 54 ++ 8 files changed, 842 insertions(+) create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.json create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml diff --git a/tests/cputest.c b/tests/cputest.c index 037f23a9b0..46bcd32b75 100644 --- a/tests/cputest.c +++ b/tests/cputest.c @@ -1178,6 +1178,7 @@ mymain(void) DO_TEST_CPUID(VIR_ARCH_X86_64, "Core2-E6850", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Core2-Q9500", JSON_NONE); DO_TEST_CPUID(VIR_ARCH_X86_64, "EPYC-7601-32-Core", JSON_HOST); + DO_TEST_CPUID(VIR_ARCH_X86_64, "EPYC-7601-32-Core-ibpb", JSON_MODELS_REQUIRED); DO_TEST_CPUID(VIR_ARCH_X86_64, "FX-8150", JSON_NONE); DO_TEST_CPUID(VIR_ARCH_X86_64, "Opteron-1352", JSON_NONE); DO_TEST_CPUID(VIR_ARCH_X86_64, "Opteron-2350", JSON_HOST); diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml new file mode 100644 index 0000000000..af43fca98d --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml @@ -0,0 +1,7 @@ +<!-- Features disabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x08000008' edx='0x10000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000008' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x01c2300c' edx='0x08000000'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml new file mode 100644 index 0000000000..772456f947 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml @@ -0,0 +1,9 @@ +<!-- Features enabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0xf7f83203' edx='0x078bfbff'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x209c01ab' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000007' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x000003f3' edx='0x26500800'/> + <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x00000000' ebx='0x00001000' ecx='0x00000000' edx='0x00000000'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml new file mode 100644 index 0000000000..33eb8bd1f5 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml @@ -0,0 +1,18 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>EPYC</model> + <vendor>AMD</vendor> + <feature policy='require' name='ht'/> + <feature policy='require' name='osxsave'/> + <feature policy='require' name='xsaves'/> + <feature policy='require' name='cmp_legacy'/> + <feature policy='require' name='extapic'/> + <feature policy='require' name='skinit'/> + <feature policy='require' name='wdt'/> + <feature policy='require' name='tce'/> + <feature policy='require' name='topoext'/> + <feature policy='require' name='perfctr_core'/> + <feature policy='require' name='perfctr_nb'/> + <feature policy='require' name='invtsc'/> + <feature policy='require' name='ibpb'/> + <feature policy='disable' name='rdtscp'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml new file mode 100644 index 0000000000..fa66113c68 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml @@ -0,0 +1,18 @@ +<cpu> + <arch>x86_64</arch> + <model>EPYC</model> + <vendor>AMD</vendor> + <feature name='ht'/> + <feature name='osxsave'/> + <feature name='xsaves'/> + <feature name='cmp_legacy'/> + <feature name='extapic'/> + <feature name='skinit'/> + <feature name='wdt'/> + <feature name='tce'/> + <feature name='topoext'/> + <feature name='perfctr_core'/> + <feature name='perfctr_nb'/> + <feature name='invtsc'/> + <feature name='ibpb'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml new file mode 100644 index 0000000000..81c09c32a7 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml @@ -0,0 +1,13 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>EPYC</model> + <vendor>AMD</vendor> + <feature policy='require' name='x2apic'/> + <feature policy='require' name='tsc-deadline'/> + <feature policy='require' name='hypervisor'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='cmp_legacy'/> + <feature policy='require' name='ibpb'/> + <feature policy='disable' name='monitor'/> + <feature policy='disable' name='rdtscp'/> + <feature policy='disable' name='svm'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.json b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.json new file mode 100644 index 0000000000..94a60fcc8f --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.json @@ -0,0 +1,722 @@ +{ + "return": { + "model": { + "name": "base", + "props": { + "pfthreshold": false, + "pku": false, + "rtm": false, + "tsc_adjust": true, + "tsc-deadline": true, + "xstore-en": false, + "cpuid-0xb": true, + "abm": true, + "sse": true, + "kvm-mmu": false, + "xsaveopt": true, + "hv-spinlocks": -1, + "tce": false, + "realized": false, + "kvm_steal_time": true, + "smep": true, + "fpu": true, + "xcrypt": false, + "sse4_2": true, + "clflush": true, + "sse4_1": true, + "flushbyasid": false, + "kvm-steal-time": true, + "lm": true, + "tsc": true, + "adx": true, + "fxsr": true, + "sha-ni": true, + "decodeassists": false, + "hv-relaxed": false, + "pclmuldq": true, + "xgetbv1": true, + "xstore": false, + "vmcb_clean": false, + "tsc-adjust": true, + "vme": true, + "vendor": "AuthenticAMD", + "arat": true, + "ffxsr": true, + "de": true, + "aes": true, + "pse": true, + "ds-cpl": false, + "fxsr_opt": true, + "tbm": false, + "ia64": false, + "phe-en": false, + "f16c": true, + "ds": false, + "mpx": false, + "vmware-cpuid-freq": true, + "avx512f": false, + "avx2": true, + "misalignsse": true, + "level": 13, + "pbe": false, + "cx16": true, + "ds_cpl": false, + "movbe": true, + "perfctr-nb": false, + "nrip_save": true, + "kvm_mmu": false, + "ospke": false, + "pmu": false, + "avx512ifma": false, + "stepping": 2, + "sep": true, + "sse4a": true, + "avx512dq": false, + "stibp": false, + "core-id": -1, + "i64": true, + "avx512-4vnniw": false, + "xsave": true, + "pmm": false, + "hle": false, + "nodeid_msr": false, + "hv-crash": false, + "est": false, + "x-hv-max-vps": -1, + "osxsave": false, + "xop": false, + "smx": false, + "tsc-scale": false, + "monitor": false, + "avx512er": false, + "apic": true, + "sse4.1": true, + "sse4.2": true, + "hv-vapic": false, + "pause-filter": false, + "lahf-lm": true, + "kvm-nopiodelay": true, + "cmp_legacy": true, + "acpi": false, + "fma4": false, + "mmx": true, + "svm_lock": false, + "pcommit": false, + "mtrr": true, + "clwb": false, + "dca": false, + "pdcm": false, + "xcrypt-en": false, + "3dnow": false, + "invtsc": false, + "tm2": false, + "hv-time": false, + "hypervisor": true, + "kvmclock-stable-bit": true, + "xlevel": 2147483674, + "lahf_lm": true, + "enforce": false, + "pcid": false, + "sse4-1": true, + "lbrv": false, + "avx512-vpopcntdq": false, + "avx512-4fmaps": false, + "fill-mtrr-mask": true, + "pause_filter": false, + "svm-lock": false, + "popcnt": true, + "nrip-save": true, + "avx512vl": false, + "x2apic": true, + "kvmclock": true, + "smap": true, + "pdpe1gb": true, + "family": 23, + "min-level": 13, + "xlevel2": 0, + "dtes64": false, + "xd": true, + "kvm_pv_eoi": true, + "ace2": false, + "kvm_pv_unhalt": true, + "xtpr": false, + "perfctr_nb": false, + "avx512bw": false, + "l3-cache": true, + "nx": true, + "lwp": false, + "msr": true, + "ibpb": true, + "syscall": true, + "tm": false, + "perfctr-core": false, + "memory": "/machine/unattached/system[0]", + "pge": true, + "pn": false, + "fma": true, + "nodeid-msr": false, + "xsavec": true, + "socket-id": -1, + "thread-id": -1, + "cx8": true, + "mce": true, + "avx512cd": false, + "cr8legacy": true, + "mca": true, + "avx512pf": false, + "pni": true, + "hv-vendor-id": "", + "rdseed": true, + "osvw": true, + "fsgsbase": true, + "model-id": "AMD EPYC 7601 32-Core Processor ", + "cmp-legacy": true, + "kvm-pv-unhalt": true, + "rdtscp": false, + "mmxext": true, + "host-phys-bits": true, + "cid": false, + "vmx": false, + "ssse3": true, + "extapic": false, + "pse36": true, + "min-xlevel": 2147483674, + "ibs": false, + "la57": false, + "avx": true, + "kvm-no-smi-migration": false, + "tcg-cpuid": true, + "ace2-en": false, + "umip": false, + "invpcid": false, + "bmi1": true, + "bmi2": true, + "vmcb-clean": false, + "erms": false, + "cmov": true, + "check": true, + "perfctr_core": false, + "xsaves": false, + "clflushopt": true, + "pat": true, + "sse4-2": true, + "3dnowprefetch": true, + "rdpid": false, + "full-cpuid-auto-level": true, + "pae": true, + "wdt": false, + "tsc_scale": false, + "skinit": false, + "fxsr-opt": true, + "kvm_nopiodelay": true, + "phys-bits": 0, + "kvm": true, + "pmm-en": false, + "phe": false, + "3dnowext": false, + "lmce": false, + "ht": false, + "tsc-frequency": 0, + "kvm-pv-eoi": true, + "npt": true, + "apic-id": 4294967295, + "kvm_asyncpf": true, + "min-xlevel2": 0, + "pclmulqdq": true, + "svm": false, + "sse3": true, + "sse2": true, + "ss": false, + "topoext": false, + "rdrand": true, + "avx512vbmi": false, + "kvm-asyncpf": true, + "spec-ctrl": false, + "arch-facilities": false, + "model": 1, + "node-id": -1 + } + } + }, + "id": "model-expansion" +} + +{ + "return": [ + { + "typename": "max-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "max" + }, + { + "typename": "host-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "host" + }, + { + "typename": "base-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": true, + "name": "base" + }, + { + "typename": "qemu64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu64" + }, + { + "typename": "qemu32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu32" + }, + { + "typename": "phenom-x86_64-cpu", + "unavailable-features": [ + "rdtscp", + "3dnowext", + "3dnow" + ], + "migration-safe": true, + "static": false, + "name": "phenom" + }, + { + "typename": "pentium3-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium3" + }, + { + "typename": "pentium2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium2" + }, + { + "typename": "pentium-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium" + }, + { + "typename": "n270-x86_64-cpu", + "unavailable-features": [ + "ss" + ], + "migration-safe": true, + "static": false, + "name": "n270" + }, + { + "typename": "kvm64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm64" + }, + { + "typename": "kvm32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm32" + }, + { + "typename": "cpu64-rhel6-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "cpu64-rhel6" + }, + { + "typename": "coreduo-x86_64-cpu", + "unavailable-features": [ + "ss" + ], + "migration-safe": true, + "static": false, + "name": "coreduo" + }, + { + "typename": "core2duo-x86_64-cpu", + "unavailable-features": [ + "ss" + ], + "migration-safe": true, + "static": false, + "name": "core2duo" + }, + { + "typename": "athlon-x86_64-cpu", + "unavailable-features": [ + "3dnowext", + "3dnow" + ], + "migration-safe": true, + "static": false, + "name": "athlon" + }, + { + "typename": "Westmere-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Westmere" + }, + { + "typename": "Westmere-IBRS-x86_64-cpu", + "unavailable-features": [ + "spec-ctrl" + ], + "migration-safe": true, + "static": false, + "name": "Westmere-IBRS" + }, + { + "typename": "Skylake-Server-x86_64-cpu", + "unavailable-features": [ + "pcid", + "hle", + "erms", + "invpcid", + "rtm", + "mpx", + "avx512f", + "avx512dq", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "rdtscp", + "mpx", + "mpx", + "avx512f", + "avx512f", + "avx512f" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Server" + }, + { + "typename": "Skylake-Server-IBRS-x86_64-cpu", + "unavailable-features": [ + "pcid", + "hle", + "erms", + "invpcid", + "rtm", + "mpx", + "avx512f", + "avx512dq", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "spec-ctrl", + "rdtscp", + "mpx", + "mpx", + "avx512f", + "avx512f", + "avx512f" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Server-IBRS" + }, + { + "typename": "Skylake-Client-x86_64-cpu", + "unavailable-features": [ + "pcid", + "hle", + "erms", + "invpcid", + "rtm", + "mpx", + "rdtscp", + "mpx", + "mpx" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Client" + }, + { + "typename": "Skylake-Client-IBRS-x86_64-cpu", + "unavailable-features": [ + "pcid", + "hle", + "erms", + "invpcid", + "rtm", + "mpx", + "spec-ctrl", + "rdtscp", + "mpx", + "mpx" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Client-IBRS" + }, + { + "typename": "SandyBridge-x86_64-cpu", + "unavailable-features": [ + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "SandyBridge" + }, + { + "typename": "SandyBridge-IBRS-x86_64-cpu", + "unavailable-features": [ + "spec-ctrl", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "SandyBridge-IBRS" + }, + { + "typename": "Penryn-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Penryn" + }, + { + "typename": "Opteron_G5-x86_64-cpu", + "unavailable-features": [ + "xop", + "fma4", + "tbm" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G5" + }, + { + "typename": "Opteron_G4-x86_64-cpu", + "unavailable-features": [ + "xop", + "fma4" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G4" + }, + { + "typename": "Opteron_G3-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G3" + }, + { + "typename": "Opteron_G2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G2" + }, + { + "typename": "Opteron_G1-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G1" + }, + { + "typename": "Nehalem-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Nehalem" + }, + { + "typename": "Nehalem-IBRS-x86_64-cpu", + "unavailable-features": [ + "spec-ctrl" + ], + "migration-safe": true, + "static": false, + "name": "Nehalem-IBRS" + }, + { + "typename": "IvyBridge-x86_64-cpu", + "unavailable-features": [ + "erms", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "IvyBridge" + }, + { + "typename": "IvyBridge-IBRS-x86_64-cpu", + "unavailable-features": [ + "erms", + "spec-ctrl", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "IvyBridge-IBRS" + }, + { + "typename": "Haswell-x86_64-cpu", + "unavailable-features": [ + "pcid", + "hle", + "erms", + "invpcid", + "rtm", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "Haswell" + }, + { + "typename": "Haswell-noTSX-x86_64-cpu", + "unavailable-features": [ + "pcid", + "erms", + "invpcid", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "Haswell-noTSX" + }, + { + "typename": "Haswell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [ + "pcid", + "erms", + "invpcid", + "spec-ctrl", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "Haswell-noTSX-IBRS" + }, + { + "typename": "Haswell-IBRS-x86_64-cpu", + "unavailable-features": [ + "pcid", + "hle", + "erms", + "invpcid", + "rtm", + "spec-ctrl", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "Haswell-IBRS" + }, + { + "typename": "EPYC-x86_64-cpu", + "unavailable-features": [ + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "EPYC" + }, + { + "typename": "EPYC-IBPB-x86_64-cpu", + "unavailable-features": [ + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "EPYC-IBPB" + }, + { + "typename": "Conroe-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Conroe" + }, + { + "typename": "Broadwell-x86_64-cpu", + "unavailable-features": [ + "pcid", + "hle", + "erms", + "invpcid", + "rtm", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "Broadwell" + }, + { + "typename": "Broadwell-noTSX-x86_64-cpu", + "unavailable-features": [ + "pcid", + "erms", + "invpcid", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "Broadwell-noTSX" + }, + { + "typename": "Broadwell-noTSX-IBRS-x86_64-cpu", + "unavailable-features": [ + "pcid", + "erms", + "invpcid", + "spec-ctrl", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "Broadwell-noTSX-IBRS" + }, + { + "typename": "Broadwell-IBRS-x86_64-cpu", + "unavailable-features": [ + "pcid", + "hle", + "erms", + "invpcid", + "rtm", + "spec-ctrl", + "rdtscp" + ], + "migration-safe": true, + "static": false, + "name": "Broadwell-IBRS" + }, + { + "typename": "486-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "486" + } + ], + "id": "definitions" +} diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml new file mode 100644 index 0000000000..0e1e910e34 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml @@ -0,0 +1,54 @@ +<!-- AMD EPYC 7601 32-Core Processor --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000000' ecx_in='0x00' eax='0x0000000d' ebx='0x68747541' ecx='0x444d4163' edx='0x69746e65'/> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00800f12' ebx='0x13400800' ecx='0x7ed8320b' edx='0x178bfbff'/> + <cpuid eax_in='0x00000002' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000003' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000005' ecx_in='0x00' eax='0x00000040' ebx='0x00000040' ecx='0x00000003' edx='0x00000011'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000001' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x209c01a9' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000008' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000009' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000a' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x00' eax='0x00000007' ebx='0x00000340' ecx='0x00000340' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x0000000f' ebx='0x00000340' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x02' eax='0x00000100' ebx='0x00000240' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000000' ecx_in='0x00' eax='0x8000001f' ebx='0x68747541' ecx='0x444d4163' edx='0x69746e65'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00800f12' ebx='0x40000000' ecx='0x35c233ff' edx='0x2fd3fbff'/> + <cpuid eax_in='0x80000002' ecx_in='0x00' eax='0x20444d41' ebx='0x43595045' ecx='0x30363720' edx='0x32332031'/> + <cpuid eax_in='0x80000003' ecx_in='0x00' eax='0x726f432d' ebx='0x72502065' ecx='0x7365636f' edx='0x20726f73'/> + <cpuid eax_in='0x80000004' ecx_in='0x00' eax='0x20202020' ebx='0x20202020' ecx='0x20202020' edx='0x00202020'/> + <cpuid eax_in='0x80000005' ecx_in='0x00' eax='0xff40ff40' ebx='0xff40ff40' ecx='0x20080140' edx='0x40040140'/> + <cpuid eax_in='0x80000006' ecx_in='0x00' eax='0x36006400' ebx='0x56006400' ecx='0x02006140' edx='0x0200c140'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x0000001b' ecx='0x00000000' edx='0x00006799'/> + <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x00003030' ebx='0x00001007' ecx='0x0000603f' edx='0x00000000'/> + <cpuid eax_in='0x80000009' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000a' ecx_in='0x00' eax='0x00000001' ebx='0x00008000' ecx='0x00000000' edx='0x0001bcff'/> + <cpuid eax_in='0x8000000b' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000d' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000e' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000000f' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000010' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000011' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000012' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000013' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000014' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000015' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000016' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000017' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000018' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000019' ecx_in='0x00' eax='0xf040f040' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000001a' ecx_in='0x00' eax='0x00000003' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000001b' ecx_in='0x00' eax='0x000003ff' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000001c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x8000001d' ecx_in='0x00' eax='0x00004121' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x8000001d' ecx_in='0x01' eax='0x00004122' ebx='0x00c0003f' ecx='0x000000ff' edx='0x00000000'/> + <cpuid eax_in='0x8000001d' ecx_in='0x02' eax='0x00004143' ebx='0x01c0003f' ecx='0x000003ff' edx='0x00000002'/> + <cpuid eax_in='0x8000001d' ecx_in='0x03' eax='0x0001c163' ebx='0x03c0003f' ecx='0x00001fff' edx='0x00000001'/> + <cpuid eax_in='0x8000001e' ecx_in='0x00' eax='0x00000013' ebx='0x00000109' ecx='0x00000301' edx='0x00000000'/> + <cpuid eax_in='0x8000001f' ecx_in='0x00' eax='0x0000000f' ebx='0x0000016f' ecx='0x0000000f' edx='0x00000001'/> + <cpuid eax_in='0x80860000' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0xc0000000' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> +</cpudata> -- 2.15.1

The CPU contains the updated microcode for CVE-2017-5715. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- tests/cputest.c | 1 + .../x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml | 6 + .../x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml | 8 + .../x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml | 30 ++ .../x86_64-cpuid-Core-i7-5600U-ibrs-host.xml | 31 ++ .../x86_64-cpuid-Core-i7-5600U-ibrs-json.xml | 15 + .../x86_64-cpuid-Core-i7-5600U-ibrs.json | 525 +++++++++++++++++++++ .../x86_64-cpuid-Core-i7-5600U-ibrs.xml | 41 ++ 8 files changed, 657 insertions(+) create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.json create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.xml diff --git a/tests/cputest.c b/tests/cputest.c index 46bcd32b75..1e79edbef7 100644 --- a/tests/cputest.c +++ b/tests/cputest.c @@ -1174,6 +1174,7 @@ mymain(void) DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i7-4510U", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i7-5600U", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i7-5600U-arat", JSON_HOST); + DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i7-5600U-ibrs", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i7-7700", JSON_MODELS); DO_TEST_CPUID(VIR_ARCH_X86_64, "Core2-E6850", JSON_HOST); DO_TEST_CPUID(VIR_ARCH_X86_64, "Core2-Q9500", JSON_NONE); diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml new file mode 100644 index 0000000000..e033bb141f --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml @@ -0,0 +1,6 @@ +<!-- Features disabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x0800c1dc' edx='0xb0600000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x04000000'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml new file mode 100644 index 0000000000..b5d116672f --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml @@ -0,0 +1,8 @@ +<!-- Features enabled by QEMU --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0xf7fa3223' edx='0x0f8bfbff'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x001c0fbb' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000121' edx='0x2c100800'/> +</cpudata> diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml new file mode 100644 index 0000000000..59f814c193 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml @@ -0,0 +1,30 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Broadwell</model> + <vendor>Intel</vendor> + <feature policy='require' name='vme'/> + <feature policy='require' name='ds'/> + <feature policy='require' name='acpi'/> + <feature policy='require' name='ss'/> + <feature policy='require' name='ht'/> + <feature policy='require' name='tm'/> + <feature policy='require' name='pbe'/> + <feature policy='require' name='dtes64'/> + <feature policy='require' name='monitor'/> + <feature policy='require' name='ds_cpl'/> + <feature policy='require' name='vmx'/> + <feature policy='require' name='smx'/> + <feature policy='require' name='est'/> + <feature policy='require' name='tm2'/> + <feature policy='require' name='xtpr'/> + <feature policy='require' name='pdcm'/> + <feature policy='require' name='osxsave'/> + <feature policy='require' name='f16c'/> + <feature policy='require' name='rdrand'/> + <feature policy='require' name='arat'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='spec-ctrl'/> + <feature policy='require' name='xsaveopt'/> + <feature policy='require' name='pdpe1gb'/> + <feature policy='require' name='abm'/> + <feature policy='require' name='invtsc'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml new file mode 100644 index 0000000000..2fc670c85f --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml @@ -0,0 +1,31 @@ +<cpu> + <arch>x86_64</arch> + <model>Broadwell</model> + <vendor>Intel</vendor> + <feature name='vme'/> + <feature name='ds'/> + <feature name='acpi'/> + <feature name='ss'/> + <feature name='ht'/> + <feature name='tm'/> + <feature name='pbe'/> + <feature name='dtes64'/> + <feature name='monitor'/> + <feature name='ds_cpl'/> + <feature name='vmx'/> + <feature name='smx'/> + <feature name='est'/> + <feature name='tm2'/> + <feature name='xtpr'/> + <feature name='pdcm'/> + <feature name='osxsave'/> + <feature name='f16c'/> + <feature name='rdrand'/> + <feature name='arat'/> + <feature name='tsc_adjust'/> + <feature name='spec-ctrl'/> + <feature name='xsaveopt'/> + <feature name='pdpe1gb'/> + <feature name='abm'/> + <feature name='invtsc'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-json.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-json.xml new file mode 100644 index 0000000000..a736cdfb04 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-json.xml @@ -0,0 +1,15 @@ +<cpu mode='custom' match='exact'> + <model fallback='forbid'>Broadwell</model> + <vendor>Intel</vendor> + <feature policy='require' name='vme'/> + <feature policy='require' name='ss'/> + <feature policy='require' name='vmx'/> + <feature policy='require' name='f16c'/> + <feature policy='require' name='rdrand'/> + <feature policy='require' name='hypervisor'/> + <feature policy='require' name='arat'/> + <feature policy='require' name='tsc_adjust'/> + <feature policy='require' name='xsaveopt'/> + <feature policy='require' name='pdpe1gb'/> + <feature policy='require' name='abm'/> +</cpu> diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.json b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.json new file mode 100644 index 0000000000..fd69745d5e --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.json @@ -0,0 +1,525 @@ +{ + "return": { + "model": { + "name": "base", + "props": { + "pfthreshold": false, + "pku": false, + "rtm": true, + "tsc_adjust": true, + "tsc-deadline": true, + "xstore-en": false, + "cpuid-0xb": true, + "abm": true, + "sse": true, + "kvm-mmu": false, + "xsaveopt": true, + "hv-spinlocks": -1, + "tce": false, + "realized": false, + "kvm_steal_time": true, + "smep": true, + "fpu": true, + "xcrypt": false, + "sse4_2": true, + "clflush": true, + "sse4_1": true, + "flushbyasid": false, + "kvm-steal-time": true, + "lm": true, + "tsc": true, + "adx": true, + "fxsr": true, + "sha-ni": false, + "decodeassists": false, + "hv-relaxed": false, + "pclmuldq": true, + "xgetbv1": false, + "xstore": false, + "vmcb_clean": false, + "tsc-adjust": true, + "vme": true, + "vendor": "GenuineIntel", + "arat": true, + "ffxsr": false, + "de": true, + "aes": true, + "pse": true, + "ds-cpl": false, + "fxsr_opt": false, + "tbm": false, + "ia64": false, + "phe-en": false, + "f16c": true, + "ds": false, + "mpx": false, + "vmware-cpuid-freq": true, + "avx512f": false, + "avx2": true, + "level": 13, + "pbe": false, + "cx16": true, + "ds_cpl": false, + "movbe": true, + "perfctr-nb": false, + "nrip_save": false, + "kvm_mmu": false, + "ospke": false, + "pmu": false, + "avx512ifma": false, + "stepping": 4, + "sep": true, + "sse4a": false, + "avx512dq": false, + "core-id": -1, + "i64": true, + "avx512-4vnniw": false, + "xsave": true, + "hv-runtime": false, + "pmm": false, + "hle": true, + "nodeid_msr": false, + "hv-crash": false, + "est": false, + "osxsave": false, + "xop": false, + "smx": false, + "tsc-scale": false, + "monitor": false, + "avx512er": false, + "apic": true, + "sse4.1": true, + "sse4.2": true, + "hv-vapic": false, + "pause-filter": false, + "lahf-lm": true, + "kvm-nopiodelay": true, + "cmp_legacy": false, + "acpi": false, + "fma4": false, + "mmx": true, + "svm_lock": false, + "pcommit": false, + "mtrr": true, + "clwb": false, + "dca": false, + "pdcm": false, + "xcrypt-en": false, + "3dnow": false, + "invtsc": false, + "tm2": false, + "hv-time": false, + "hypervisor": true, + "kvmclock-stable-bit": true, + "xlevel": 2147483656, + "lahf_lm": true, + "enforce": false, + "pcid": true, + "sse4-1": true, + "lbrv": false, + "avx512-vpopcntdq": false, + "avx512-4fmaps": false, + "fill-mtrr-mask": true, + "pause_filter": false, + "svm-lock": false, + "popcnt": true, + "nrip-save": false, + "avx512vl": false, + "x2apic": true, + "kvmclock": true, + "smap": true, + "pdpe1gb": true, + "family": 6, + "min-level": 13, + "xlevel2": 0, + "dtes64": false, + "xd": true, + "kvm_pv_eoi": true, + "ace2": false, + "kvm_pv_unhalt": true, + "xtpr": false, + "perfctr_nb": false, + "avx512bw": false, + "l3-cache": true, + "nx": true, + "lwp": false, + "msr": true, + "syscall": true, + "tm": false, + "perfctr-core": false, + "memory": "/machine/unattached/system[0]", + "pge": true, + "pn": false, + "fma": true, + "nodeid-msr": false, + "xsavec": false, + "socket-id": -1, + "thread-id": -1, + "cx8": true, + "mce": true, + "avx512cd": false, + "cr8legacy": false, + "mca": true, + "avx512pf": false, + "pni": true, + "hv-vendor-id": "", + "rdseed": true, + "osvw": false, + "fsgsbase": true, + "model-id": "Intel(R) Core(TM) i7-5600U CPU @ 2.60GHz", + "cmp-legacy": false, + "kvm-pv-unhalt": true, + "rdtscp": true, + "mmxext": false, + "host-phys-bits": false, + "cid": false, + "vmx": true, + "ssse3": true, + "extapic": false, + "pse36": true, + "min-xlevel": 2147483656, + "ibs": false, + "la57": false, + "avx": true, + "kvm-no-smi-migration": false, + "tcg-cpuid": true, + "hv-vpindex": false, + "ace2-en": false, + "umip": false, + "invpcid": true, + "bmi1": true, + "bmi2": true, + "vmcb-clean": false, + "erms": true, + "cmov": true, + "check": true, + "perfctr_core": false, + "misalignsse": false, + "clflushopt": false, + "pat": true, + "hv-synic": false, + "hv-stimer": false, + "sse4-2": true, + "3dnowprefetch": true, + "rdpid": false, + "full-cpuid-auto-level": true, + "pae": true, + "hv-reset": false, + "wdt": false, + "tsc_scale": false, + "skinit": false, + "fxsr-opt": false, + "kvm_nopiodelay": true, + "phys-bits": 0, + "kvm": true, + "pmm-en": false, + "phe": false, + "3dnowext": false, + "lmce": true, + "ht": false, + "tsc-frequency": 0, + "kvm-pv-eoi": true, + "npt": false, + "apic-id": 4294967295, + "kvm_asyncpf": true, + "min-xlevel2": 0, + "pclmulqdq": true, + "svm": false, + "sse3": true, + "sse2": true, + "ss": true, + "topoext": false, + "rdrand": true, + "avx512vbmi": false, + "kvm-asyncpf": true, + "xsaves": false, + "model": 61, + "node-id": -1 + } + } + }, + "id": "model-expansion" +} + +{ + "return": [ + { + "typename": "max-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "max" + }, + { + "typename": "host-x86_64-cpu", + "unavailable-features": [], + "migration-safe": false, + "static": false, + "name": "host" + }, + { + "typename": "base-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": true, + "name": "base" + }, + { + "typename": "qemu64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu64" + }, + { + "typename": "qemu32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "qemu32" + }, + { + "typename": "phenom-x86_64-cpu", + "unavailable-features": [ + "mmxext", + "fxsr-opt", + "3dnowext", + "3dnow", + "sse4a", + "npt" + ], + "migration-safe": true, + "static": false, + "name": "phenom" + }, + { + "typename": "pentium3-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium3" + }, + { + "typename": "pentium2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium2" + }, + { + "typename": "pentium-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "pentium" + }, + { + "typename": "n270-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "n270" + }, + { + "typename": "kvm64-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm64" + }, + { + "typename": "kvm32-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "kvm32" + }, + { + "typename": "coreduo-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "coreduo" + }, + { + "typename": "core2duo-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "core2duo" + }, + { + "typename": "athlon-x86_64-cpu", + "unavailable-features": [ + "mmxext", + "3dnowext", + "3dnow" + ], + "migration-safe": true, + "static": false, + "name": "athlon" + }, + { + "typename": "Westmere-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Westmere" + }, + { + "typename": "Skylake-Server-x86_64-cpu", + "unavailable-features": [ + "mpx", + "avx512f", + "avx512dq", + "clwb", + "avx512cd", + "avx512bw", + "avx512vl", + "xsavec", + "xgetbv1", + "mpx", + "mpx", + "avx512f", + "avx512f", + "avx512f" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Server" + }, + { + "typename": "Skylake-Client-x86_64-cpu", + "unavailable-features": [ + "mpx", + "xsavec", + "xgetbv1", + "mpx", + "mpx" + ], + "migration-safe": true, + "static": false, + "name": "Skylake-Client" + }, + { + "typename": "SandyBridge-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "SandyBridge" + }, + { + "typename": "Penryn-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Penryn" + }, + { + "typename": "Opteron_G5-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse", + "xop", + "fma4", + "tbm" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G5" + }, + { + "typename": "Opteron_G4-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse", + "xop", + "fma4" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G4" + }, + { + "typename": "Opteron_G3-x86_64-cpu", + "unavailable-features": [ + "sse4a", + "misalignsse" + ], + "migration-safe": true, + "static": false, + "name": "Opteron_G3" + }, + { + "typename": "Opteron_G2-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G2" + }, + { + "typename": "Opteron_G1-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Opteron_G1" + }, + { + "typename": "Nehalem-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Nehalem" + }, + { + "typename": "IvyBridge-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "IvyBridge" + }, + { + "typename": "Haswell-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell" + }, + { + "typename": "Haswell-noTSX-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Haswell-noTSX" + }, + { + "typename": "Conroe-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Conroe" + }, + { + "typename": "Broadwell-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell" + }, + { + "typename": "Broadwell-noTSX-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "Broadwell-noTSX" + }, + { + "typename": "486-x86_64-cpu", + "unavailable-features": [], + "migration-safe": true, + "static": false, + "name": "486" + } + ], + "id": "definitions" +} diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.xml new file mode 100644 index 0000000000..bf35ec7cb4 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.xml @@ -0,0 +1,41 @@ +<!-- Intel(R) Core(TM) i7-5600U CPU @ 2.60GHz --> +<cpudata arch='x86'> + <cpuid eax_in='0x00000000' ecx_in='0x00' eax='0x00000014' ebx='0x756e6547' ecx='0x6c65746e' edx='0x49656e69'/> + <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x000306d4' ebx='0x03100800' ecx='0x7ffafbff' edx='0xbfebfbff'/> + <cpuid eax_in='0x00000002' ecx_in='0x00' eax='0x76036301' ebx='0x00f0b5ff' ecx='0x00000000' edx='0x00c30000'/> + <cpuid eax_in='0x00000003' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x00' eax='0x1c004121' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x01' eax='0x1c004122' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x02' eax='0x1c004143' ebx='0x01c0003f' ecx='0x000001ff' edx='0x00000000'/> + <cpuid eax_in='0x00000004' ecx_in='0x03' eax='0x1c03c163' ebx='0x03c0003f' ecx='0x00000fff' edx='0x00000006'/> + <cpuid eax_in='0x00000005' ecx_in='0x00' eax='0x00000040' ebx='0x00000040' ecx='0x00000003' edx='0x11142120'/> + <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000077' ebx='0x00000002' ecx='0x00000009' edx='0x00000000'/> + <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x021c2fbb' ecx='0x00000000' edx='0x0c000000'/> + <cpuid eax_in='0x00000008' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000009' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000a' ecx_in='0x00' eax='0x07300403' ebx='0x00000000' ecx='0x00000000' edx='0x00000603'/> + <cpuid eax_in='0x0000000b' ecx_in='0x00' eax='0x00000001' ebx='0x00000002' ecx='0x00000100' edx='0x00000003'/> + <cpuid eax_in='0x0000000b' ecx_in='0x01' eax='0x00000004' ebx='0x00000004' ecx='0x00000201' edx='0x00000003'/> + <cpuid eax_in='0x0000000c' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x00' eax='0x00000007' ebx='0x00000340' ecx='0x00000340' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000d' ecx_in='0x02' eax='0x00000100' ebx='0x00000240' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000e' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x0000000f' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000010' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000011' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000012' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000013' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x00000014' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/> + <cpuid eax_in='0x80000000' ecx_in='0x00' eax='0x80000008' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000121' edx='0x2c100800'/> + <cpuid eax_in='0x80000002' ecx_in='0x00' eax='0x65746e49' ebx='0x2952286c' ecx='0x726f4320' edx='0x4d542865'/> + <cpuid eax_in='0x80000003' ecx_in='0x00' eax='0x37692029' ebx='0x3036352d' ecx='0x43205530' edx='0x40205550'/> + <cpuid eax_in='0x80000004' ecx_in='0x00' eax='0x362e3220' ebx='0x7a484730' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000005' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80000006' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x01006040' edx='0x00000000'/> + <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/> + <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x00003027' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/> + <cpuid eax_in='0x80860000' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/> + <cpuid eax_in='0xc0000000' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/> +</cpudata> -- 2.15.1

This is a variant of Nehalem with indirect branch prediction protection. The only difference between Nehalem and Nehalem-IBRS is the added "spec-ctrl" feature. Thus the diff matches QEMU, but the new CPU model itself is different. The QEMU's versions of both models contain "vme" feature, while this feature is missing in libvirt's models. While we can't change the existing Nehalem CPU model, we could add "vme" to Nehalem-IBRS to make it similar to QEMU, but doing so would fool our CPU detecting code so that any Nehalem CPU with "vme" feature would be detected as Nehalem-IBRS CPU without spec-ctrl. Not adding "vme" to Nehalem-IBRS is safe as QEMU will just provide the feature anyway, which matches what happens with Nehalem (and new enough machine types). Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index eff7681cf5..0592190689 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -875,6 +875,43 @@ <feature name='tsc'/> </model> + <model name='Nehalem-IBRS'> + <signature family='6' model='26'/> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> + <model name='Westmere'> <signature family='6' model='44'/> <vendor name='Intel'/> -- 2.15.1

This is a variant of Westmere with indirect branch prediction protection. The only difference between Westmere and Westmere-IBRS is the added "spec-ctrl" feature. The Westmere-IBRS model in QEMU is a bit different since Westmere got several additional features since we added it in cpu_map.xml: arat, pclmuldq, vme Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 0592190689..1536b4f9f1 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -949,6 +949,44 @@ <feature name='tsc'/> </model> + <model name='Westmere-IBRS'> + <signature family='6' model='44'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> + <model name='SandyBridge'> <signature family='6' model='42'/> <vendor name='Intel'/> -- 2.15.1

This is a variant of SandyBridge with indirect branch prediction protection. The only difference between SandyBridge and SandyBridge-IBRS is the added "spec-ctrl" feature. The SandyBridge-IBRS model in QEMU is a bit different since SandyBridge got several additional features since we added it in cpu_map.xml: arat, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 1536b4f9f1..af23ed43e8 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1030,6 +1030,50 @@ <feature name='xsave'/> </model> + <model name='SandyBridge-IBRS'> + <signature family='6' model='42'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> + <model name='IvyBridge'> <signature family='6' model='58'/> <vendor name='Intel'/> -- 2.15.1

This is a variant of IvyBridge with indirect branch prediction protection. The only difference between IvyBridge and IvyBridge-IBRS is the added "spec-ctrl" feature. The IvyBridge-IBRS model in QEMU is a bit different since IvyBridge got several additional features since we added it in cpu_map.xml: arat, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index af23ed43e8..0e88d2dd9d 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1123,6 +1123,56 @@ <feature name='xsave'/> </model> + <model name='IvyBridge-IBRS'> + <signature family='6' model='58'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> + <model name='Haswell-noTSX'> <signature family='6' model='60'/> <vendor name='Intel'/> -- 2.15.1

This is a variant of Haswell-noTSX with indirect branch prediction protection. The only difference between Haswell-noTSX and Haswell-noTSX-IBRS is the added "spec-ctrl" feature. The Haswell-noTSX-IBRS model in QEMU is a bit different since Haswell-noTSX got several additional features since we added it in cpu_map.xml: arat, abm, f16c, rdrand, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 54 ++++++++++++++++++++++ .../x86_64-cpuid-Xeon-E5-2609-v3-guest.xml | 3 +- .../x86_64-cpuid-Xeon-E5-2609-v3-host.xml | 3 +- .../x86_64-cpuid-Xeon-E5-2609-v3-json.xml | 3 +- 4 files changed, 57 insertions(+), 6 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 0e88d2dd9d..6d4b31c507 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1226,6 +1226,60 @@ <feature name='xsave'/> </model> + <model name='Haswell-noTSX-IBRS'> + <signature family='6' model='60'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> + <model name='Haswell'> <signature family='6' model='60'/> <vendor name='Intel'/> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml index 923efead4a..a66c7a5644 100644 --- a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml @@ -1,5 +1,5 @@ <cpu mode='custom' match='exact'> - <model fallback='forbid'>Haswell-noTSX</model> + <model fallback='forbid'>Haswell-noTSX-IBRS</model> <vendor>Intel</vendor> <feature policy='require' name='vme'/> <feature policy='require' name='ds'/> @@ -24,7 +24,6 @@ <feature policy='require' name='arat'/> <feature policy='require' name='tsc_adjust'/> <feature policy='require' name='cmt'/> - <feature policy='require' name='spec-ctrl'/> <feature policy='require' name='xsaveopt'/> <feature policy='require' name='pdpe1gb'/> <feature policy='require' name='abm'/> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml index 96fee7a46d..624d71db20 100644 --- a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml @@ -1,6 +1,6 @@ <cpu> <arch>x86_64</arch> - <model>Haswell-noTSX</model> + <model>Haswell-noTSX-IBRS</model> <vendor>Intel</vendor> <feature name='vme'/> <feature name='ds'/> @@ -25,7 +25,6 @@ <feature name='arat'/> <feature name='tsc_adjust'/> <feature name='cmt'/> - <feature name='spec-ctrl'/> <feature name='xsaveopt'/> <feature name='pdpe1gb'/> <feature name='abm'/> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml index 42e971f675..20e24c387d 100644 --- a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml @@ -1,5 +1,5 @@ <cpu mode='custom' match='exact'> - <model fallback='forbid'>Haswell-noTSX</model> + <model fallback='forbid'>Haswell-noTSX-IBRS</model> <vendor>Intel</vendor> <feature policy='require' name='vme'/> <feature policy='require' name='ss'/> @@ -8,7 +8,6 @@ <feature policy='require' name='hypervisor'/> <feature policy='require' name='arat'/> <feature policy='require' name='tsc_adjust'/> - <feature policy='require' name='spec-ctrl'/> <feature policy='require' name='xsaveopt'/> <feature policy='require' name='pdpe1gb'/> <feature policy='require' name='abm'/> -- 2.15.1

This is a variant of Haswell with indirect branch prediction protection. The only difference between Haswell and Haswell-IBRS is the added "spec-ctrl" feature. The Haswell-IBRS model in QEMU is a bit different since Haswell got several additional features since we added it in cpu_map.xml: arat, abm, f16c, rdrand, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 56 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 6d4b31c507..3b1d484bd5 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1335,6 +1335,62 @@ <feature name='xsave'/> </model> + <model name='Haswell-IBRS'> + <signature family='6' model='60'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> + <model name='Broadwell-noTSX'> <signature family='6' model='61'/> <vendor name='Intel'/> -- 2.15.1

This is a variant of Broadwell-noTSX with indirect branch prediction protection. The only difference between Broadwell-noTSX and Broadwell-noTSX-IBRS is the added "spec-ctrl" feature. The Broadwell-noTSX-IBRS model in QEMU is a bit different since Broadwell-noTSX got several additional features since we added it in cpu_map.xml: abm, arat, f16c, rdrand, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 58 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 3b1d484bd5..fadcb0a0a7 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1448,6 +1448,64 @@ <feature name='xsave'/> </model> + <model name='Broadwell-noTSX-IBRS'> + <signature family='6' model='61'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> + <model name='Broadwell'> <signature family='6' model='61'/> <vendor name='Intel'/> -- 2.15.1

This is a variant of Broadwell with indirect branch prediction protection. The only difference between Broadwell and Broadwell-IBRS is the added "spec-ctrl" feature. The Broadwell-IBRS model in QEMU is a bit different since Broadwell got several additional features since we added it in cpu_map.xml: abm, arat, f16c, rdrand, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 60 ++++++++++++++++++++++ .../x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml | 3 +- .../x86_64-cpuid-Core-i7-5600U-ibrs-host.xml | 3 +- .../x86_64-cpuid-Xeon-E5-2623-v4-host.xml | 3 +- 4 files changed, 63 insertions(+), 6 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index fadcb0a0a7..63b3c12ea7 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1565,6 +1565,66 @@ <feature name='xsave'/> </model> + <model name='Broadwell-IBRS'> + <signature family='6' model='61'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> + <model name='Skylake-Client'> <signature family='6' model='94'/> <vendor name='Intel'/> diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml index 59f814c193..a70cb6d46a 100644 --- a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml +++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml @@ -1,5 +1,5 @@ <cpu mode='custom' match='exact'> - <model fallback='forbid'>Broadwell</model> + <model fallback='forbid'>Broadwell-IBRS</model> <vendor>Intel</vendor> <feature policy='require' name='vme'/> <feature policy='require' name='ds'/> @@ -22,7 +22,6 @@ <feature policy='require' name='rdrand'/> <feature policy='require' name='arat'/> <feature policy='require' name='tsc_adjust'/> - <feature policy='require' name='spec-ctrl'/> <feature policy='require' name='xsaveopt'/> <feature policy='require' name='pdpe1gb'/> <feature policy='require' name='abm'/> diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml index 2fc670c85f..b8e3399103 100644 --- a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml +++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml @@ -1,6 +1,6 @@ <cpu> <arch>x86_64</arch> - <model>Broadwell</model> + <model>Broadwell-IBRS</model> <vendor>Intel</vendor> <feature name='vme'/> <feature name='ds'/> @@ -23,7 +23,6 @@ <feature name='rdrand'/> <feature name='arat'/> <feature name='tsc_adjust'/> - <feature name='spec-ctrl'/> <feature name='xsaveopt'/> <feature name='pdpe1gb'/> <feature name='abm'/> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml index cf718eeea0..357cafd10a 100644 --- a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml @@ -1,6 +1,6 @@ <cpu> <arch>x86_64</arch> - <model>Broadwell</model> + <model>Broadwell-IBRS</model> <vendor>Intel</vendor> <feature name='vme'/> <feature name='ds'/> @@ -25,7 +25,6 @@ <feature name='arat'/> <feature name='tsc_adjust'/> <feature name='cmt'/> - <feature name='spec-ctrl'/> <feature name='xsaveopt'/> <feature name='mbm_total'/> <feature name='mbm_local'/> -- 2.15.1

This is a variant of Skylake-Client with indirect branch prediction protection. The only difference between Skylake-Client and Skylake-Client-IBRS is the added "spec-ctrl" feature. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 69 ++++++++++++++++++++++ .../x86_64-cpuid-Xeon-E5-2623-v4-guest.xml | 3 +- .../x86_64-cpuid-Xeon-E5-2623-v4-json.xml | 3 +- 3 files changed, 71 insertions(+), 4 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 63b3c12ea7..ccc01ba0b0 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1693,6 +1693,75 @@ <feature name='xsaveopt'/> </model> + <model name='Skylake-Client-IBRS'> + <signature family='6' model='94'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='mpx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> + <model name='Skylake-Server'> <signature family='6' model='85'/> <vendor name='Intel'/> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml index 6f52bdbf21..60609f5c70 100644 --- a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml @@ -1,5 +1,5 @@ <cpu mode='custom' match='exact'> - <model fallback='forbid'>Skylake-Client</model> + <model fallback='forbid'>Skylake-Client-IBRS</model> <vendor>Intel</vendor> <feature policy='require' name='ds'/> <feature policy='require' name='acpi'/> @@ -20,7 +20,6 @@ <feature policy='require' name='osxsave'/> <feature policy='require' name='tsc_adjust'/> <feature policy='require' name='cmt'/> - <feature policy='require' name='spec-ctrl'/> <feature policy='require' name='mbm_total'/> <feature policy='require' name='mbm_local'/> <feature policy='require' name='pdpe1gb'/> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml index 3bf0da3cb9..167a9028ab 100644 --- a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml +++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml @@ -1,10 +1,9 @@ <cpu mode='custom' match='exact'> - <model fallback='forbid'>Skylake-Client</model> + <model fallback='forbid'>Skylake-Client-IBRS</model> <vendor>Intel</vendor> <feature policy='require' name='ss'/> <feature policy='require' name='hypervisor'/> <feature policy='require' name='tsc_adjust'/> - <feature policy='require' name='spec-ctrl'/> <feature policy='require' name='pdpe1gb'/> <feature policy='disable' name='mpx'/> <feature policy='disable' name='xsavec'/> -- 2.15.1

This is a variant of Skylake-Server with indirect branch prediction protection. The only difference between Skylake-Server and Skylake-Server-IBRS is the added "spec-ctrl" feature. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 76 ++++++++++++++++++++++ .../x86_64-cpuid-Xeon-Gold-5115-guest.xml | 3 +- .../x86_64-cpuid-Xeon-Gold-5115-host.xml | 3 +- .../x86_64-cpuid-Xeon-Gold-5115-json.xml | 3 +- 4 files changed, 79 insertions(+), 6 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index ccc01ba0b0..25289d94ed 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1837,6 +1837,82 @@ <feature name='xsaveopt'/> </model> + <model name='Skylake-Server-IBRS'> + <signature family='6' model='85'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='avx512bw'/> + <feature name='avx512cd'/> + <feature name='avx512dq'/> + <feature name='avx512f'/> + <feature name='avx512vl'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='clwb'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='mpx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> + <!-- AMD CPUs --> <model name='athlon'> <vendor name='AMD'/> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml index 5a7f3beee8..5f51dea631 100644 --- a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml @@ -1,5 +1,5 @@ <cpu mode='custom' match='exact'> - <model fallback='forbid'>Skylake-Server</model> + <model fallback='forbid'>Skylake-Server-IBRS</model> <vendor>Intel</vendor> <feature policy='require' name='ds'/> <feature policy='require' name='acpi'/> @@ -22,7 +22,6 @@ <feature policy='require' name='cmt'/> <feature policy='require' name='clflushopt'/> <feature policy='require' name='pku'/> - <feature policy='require' name='spec-ctrl'/> <feature policy='require' name='xsaves'/> <feature policy='require' name='mbm_total'/> <feature policy='require' name='mbm_local'/> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml index 15f2fa72d5..a11b31369d 100644 --- a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml @@ -1,6 +1,6 @@ <cpu> <arch>x86_64</arch> - <model>Skylake-Server</model> + <model>Skylake-Server-IBRS</model> <vendor>Intel</vendor> <feature name='ds'/> <feature name='acpi'/> @@ -23,7 +23,6 @@ <feature name='cmt'/> <feature name='clflushopt'/> <feature name='pku'/> - <feature name='spec-ctrl'/> <feature name='xsaves'/> <feature name='mbm_total'/> <feature name='mbm_local'/> diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml index 866528c957..7c7e95ce0d 100644 --- a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml +++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml @@ -1,9 +1,8 @@ <cpu mode='custom' match='exact'> - <model fallback='forbid'>Skylake-Server</model> + <model fallback='forbid'>Skylake-Server-IBRS</model> <vendor>Intel</vendor> <feature policy='require' name='ss'/> <feature policy='require' name='hypervisor'/> <feature policy='require' name='tsc_adjust'/> <feature policy='require' name='clflushopt'/> - <feature policy='require' name='spec-ctrl'/> </cpu> -- 2.15.1

This is a variant of EPYC with indirect branch prediction protection. The only difference between EPYC and EPYC-IBPB is the added "ibpb" feature. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 72 ++++++++++++++++++++++ .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml | 3 +- .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml | 3 +- .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml | 3 +- 4 files changed, 75 insertions(+), 6 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 25289d94ed..85c728227f 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -2250,6 +2250,78 @@ <feature name='xsavec'/> <feature name='xsaveopt'/> </model> + + <model name='EPYC-IBPB'> + <signature family='23' model='1'/> + <vendor name='AMD'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='clflushopt'/> + <feature name='cmov'/> + <feature name='cr8legacy'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='fxsr_opt'/> + <feature name='ibpb'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='misalignsse'/> + <feature name='mmx'/> + <feature name='mmxext'/> + <feature name='monitor'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='osvw'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sha-ni'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='sse4a'/> + <feature name='ssse3'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='vme'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> </arch> <arch name='ppc64'> diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml index 33eb8bd1f5..1d772977a4 100644 --- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml @@ -1,5 +1,5 @@ <cpu mode='custom' match='exact'> - <model fallback='forbid'>EPYC</model> + <model fallback='forbid'>EPYC-IBPB</model> <vendor>AMD</vendor> <feature policy='require' name='ht'/> <feature policy='require' name='osxsave'/> @@ -13,6 +13,5 @@ <feature policy='require' name='perfctr_core'/> <feature policy='require' name='perfctr_nb'/> <feature policy='require' name='invtsc'/> - <feature policy='require' name='ibpb'/> <feature policy='disable' name='rdtscp'/> </cpu> diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml index fa66113c68..c14e254334 100644 --- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml @@ -1,6 +1,6 @@ <cpu> <arch>x86_64</arch> - <model>EPYC</model> + <model>EPYC-IBPB</model> <vendor>AMD</vendor> <feature name='ht'/> <feature name='osxsave'/> @@ -14,5 +14,4 @@ <feature name='perfctr_core'/> <feature name='perfctr_nb'/> <feature name='invtsc'/> - <feature name='ibpb'/> </cpu> diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml index 81c09c32a7..c4e34a0fa1 100644 --- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml +++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml @@ -1,12 +1,11 @@ <cpu mode='custom' match='exact'> - <model fallback='forbid'>EPYC</model> + <model fallback='forbid'>EPYC-IBPB</model> <vendor>AMD</vendor> <feature policy='require' name='x2apic'/> <feature policy='require' name='tsc-deadline'/> <feature policy='require' name='hypervisor'/> <feature policy='require' name='tsc_adjust'/> <feature policy='require' name='cmp_legacy'/> - <feature policy='require' name='ibpb'/> <feature policy='disable' name='monitor'/> <feature policy='disable' name='rdtscp'/> <feature policy='disable' name='svm'/> -- 2.15.1

On Tue, Jan 09, 2018 at 11:45:13PM +0100, Jiri Denemark wrote:
This is the libvirt's part of the changes related to CVE-2017-5715. The new models can be used to pass the protective CPU features to guests. But remember, the host CPU microcode, host kernel, QEMU, and libvirt all need to be updated for this to be any useful.
Based on a patch from Paolo Bonzini.
See QEMU patches from Eduardo for more details: https://patchew.org/QEMU/20180109154519.25634-1-ehabkost@redhat.com/
I guess that you will wait with pushing until the QEMU patches are accepted and pushed as well. Reviewed-by: Pavel Hrdina <phrdina@redhat.com>

On Wed, Jan 10, 2018 at 10:52:29 +0100, Pavel Hrdina wrote:
On Tue, Jan 09, 2018 at 11:45:13PM +0100, Jiri Denemark wrote:
This is the libvirt's part of the changes related to CVE-2017-5715. The new models can be used to pass the protective CPU features to guests. But remember, the host CPU microcode, host kernel, QEMU, and libvirt all need to be updated for this to be any useful.
Based on a patch from Paolo Bonzini.
See QEMU patches from Eduardo for more details: https://patchew.org/QEMU/20180109154519.25634-1-ehabkost@redhat.com/
I guess that you will wait with pushing until the QEMU patches are accepted and pushed as well.
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
Thanks. All QEMU patches except for EPYC-IBPB CPU model are queued in Eduardo's x86-next and a pull request is coming soon. I pushed the first 16 patches, i.e., without EPYC-IBPB. Jirka

On Wed, Jan 17, 2018 at 17:07:22 +0100, Jiri Denemark wrote:
On Wed, Jan 10, 2018 at 10:52:29 +0100, Pavel Hrdina wrote:
On Tue, Jan 09, 2018 at 11:45:13PM +0100, Jiri Denemark wrote:
This is the libvirt's part of the changes related to CVE-2017-5715. The new models can be used to pass the protective CPU features to guests. But remember, the host CPU microcode, host kernel, QEMU, and libvirt all need to be updated for this to be any useful.
Based on a patch from Paolo Bonzini.
See QEMU patches from Eduardo for more details: https://patchew.org/QEMU/20180109154519.25634-1-ehabkost@redhat.com/
I guess that you will wait with pushing until the QEMU patches are accepted and pushed as well.
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
Thanks. All QEMU patches except for EPYC-IBPB CPU model are queued in Eduardo's x86-next and a pull request is coming soon. I pushed the first 16 patches, i.e., without EPYC-IBPB.
The EPYC-IBPB model was included in the pull request sent by Eduardo. Pushing now. Jirka

On Tue, Jan 09, 2018 at 11:45:13PM +0100, Jiri Denemark wrote:
This is the libvirt's part of the changes related to CVE-2017-5715. The new models can be used to pass the protective CPU features to guests. But remember, the host CPU microcode, host kernel, QEMU, and libvirt all need to be updated for this to be any useful.
Based on a patch from Paolo Bonzini.
You likely also want this pre-requisite series for libvirt: https://www.redhat.com/archives/libvir-list/2018-January/msg00114.html This ensures libvirt's cache of QEMU CPU model info is updated when the host CPU microcode changes. Without that patch, libvirt might not pick up the changed QEMU CPU models if the microcode update RPM was installed after the updated QEMU RPM.
See QEMU patches from Eduardo for more details: https://patchew.org/QEMU/20180109154519.25634-1-ehabkost@redhat.com/
Jiri Denemark (16): cputest: Add data for Intel(R) Xeon(R) CPU E5-2609 v3 cputest: Add data for Intel(R) Xeon(R) CPU E5-2623 v4 cputest: Add data for Intel(R) Xeon(R) Gold 5115 CPU cputest: Add data for updated AMD EPYC 7601 32-Core Processor cputest: Add data for updated Intel(R) Core(TM) i7-5600U CPU cpu: Add Nehalem-IBRS CPU model cpu: Add Westmere-IBRS CPU model cpu: Add SandyBridge-IBRS CPU model cpu: Add IvyBridge-IBRS CPU model cpu: Add Haswell-noTSX-IBRS CPU model cpu: Add Haswell-IBRS CPU model cpu: Add Broadwell-noTSX-IBRS CPU model cpu: Add Broadwell-IBRS CPU model cpu: Add Skylake-Client-IBRS CPU model cpu: Add Skylake-Server-IBRS CPU model cpu: Add EPYC-IBPB CPU model
Paolo Bonzini (1): cpu: add CPU features for indirect branch prediction protection
src/cpu/cpu_map.xml | 622 ++++++++++++++++++ tests/cputest.c | 5 + .../x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml | 6 + .../x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml | 8 + .../x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml | 29 + .../x86_64-cpuid-Core-i7-5600U-ibrs-host.xml | 30 + .../x86_64-cpuid-Core-i7-5600U-ibrs-json.xml | 15 + .../x86_64-cpuid-Core-i7-5600U-ibrs.json | 525 +++++++++++++++ .../x86_64-cpuid-Core-i7-5600U-ibrs.xml | 41 ++ ...86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml | 7 + ...x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml | 9 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml | 17 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml | 17 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml | 12 + .../x86_64-cpuid-EPYC-7601-32-Core-ibpb.json | 722 ++++++++++++++++++++ .../x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml | 54 ++ .../x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml | 6 + .../x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml | 8 + .../x86_64-cpuid-Xeon-E5-2609-v3-guest.xml | 31 + .../x86_64-cpuid-Xeon-E5-2609-v3-host.xml | 32 + .../x86_64-cpuid-Xeon-E5-2609-v3-json.xml | 14 + .../cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.json | 726 +++++++++++++++++++++ tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.xml | 37 ++ .../x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml | 7 + .../x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml | 8 + .../x86_64-cpuid-Xeon-E5-2623-v4-guest.xml | 30 + .../x86_64-cpuid-Xeon-E5-2623-v4-host.xml | 34 + .../x86_64-cpuid-Xeon-E5-2623-v4-json.xml | 11 + .../cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.json | 662 +++++++++++++++++++ tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.xml | 43 ++ .../x86_64-cpuid-Xeon-Gold-5115-disabled.xml | 8 + .../x86_64-cpuid-Xeon-Gold-5115-enabled.xml | 8 + .../x86_64-cpuid-Xeon-Gold-5115-guest.xml | 29 + .../x86_64-cpuid-Xeon-Gold-5115-host.xml | 30 + .../x86_64-cpuid-Xeon-Gold-5115-json.xml | 8 + tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.json | 614 +++++++++++++++++ tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.xml | 54 ++ 37 files changed, 4519 insertions(+) create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.json create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.json create mode 100644 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.json create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.json create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-disabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-enabled.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.json create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115.xml
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On Wed, Jan 10, 2018 at 11:22:12 +0000, Daniel P. Berrange wrote:
On Tue, Jan 09, 2018 at 11:45:13PM +0100, Jiri Denemark wrote:
This is the libvirt's part of the changes related to CVE-2017-5715. The new models can be used to pass the protective CPU features to guests. But remember, the host CPU microcode, host kernel, QEMU, and libvirt all need to be updated for this to be any useful.
Based on a patch from Paolo Bonzini.
You likely also want this pre-requisite series for libvirt:
https://www.redhat.com/archives/libvir-list/2018-January/msg00114.html
This ensures libvirt's cache of QEMU CPU model info is updated when the host CPU microcode changes. Without that patch, libvirt might not pick up the changed QEMU CPU models if the microcode update RPM was installed after the updated QEMU RPM.
Oh yes, I wanted to mention this, but I forgot to do so :( You may also need some patches from another series (which I've just pushed): https://www.redhat.com/archives/libvir-list/2018-January/msg00237.html The first patch is needed for all the new tests to pass. And the third patch is needed if the new CPU models are defined via inheritance rather than from scratch. This is not an issue for the patches in this series, but some downstreams might have decided to do just that. Jirka
participants (4)
-
Daniel P. Berrange
-
Eric Blake
-
Jiri Denemark
-
Pavel Hrdina