[PATCH v2 0/6] qemu: Support configuring PCIe topology apparent bandwidth
When a VM has been assigned a number of PCIe devices behind a common PCIe switch and the VM intends to use peer-to-peer (P2P) transfers between the devices, it is useful to be able to more report the apparent PCIe bandwidth so it reflects the real handwidth of the underlying hardware. This allows software in the VM (such as NCCL[1]) to make better decisions about whether to use P2P or not. The future QEMU 11.2[1] will support new upstream and downstream port models that have configurable speed and width properties and extend the existing root port model to support the same options. If supported by QEMU, prefer the new upstream and downstream port models, and support new attributes to set the speed and width. Patch 1 (tests: Update QEMU 11.2.0 x86_64 caps for generic PCIe switch ports qemu: add capabilities for generic PCIe switch port devices) should be replaced with a more comprehensive refresh of the QEMU capabilities, and is only included here so tests continue to pass. David [1] See QEMU commits 432b3f707a3c (hw/pci-bridge: Make speed and width for PCIe ports non-experimental) and 73962cc5f06a (hw/pci-bridge: Add generic PCIe switch upstream and downstream ports). David Vrabel (6): tests: Update QEMU 11.2.0 x86_64 caps for generic PCIe switch ports qemu: add capabilities for generic PCIe switch port devices qemu: support generic PCIe switch port models qemu: add capabilities for pcie-root-port speed and width properties qemu: add PCIe link speed and width attributes NEWS: mention generic PCIe switch ports and link speed/width NEWS.rst | 16 ++++ docs/formatdomain.rst | 28 ++++++ src/conf/domain_conf.c | 42 +++++++++ src/conf/domain_conf.h | 32 +++++++ src/conf/schemas/domaincommon.rng | 26 ++++++ src/libvirt_private.syms | 4 + src/qemu/qemu_capabilities.c | 10 ++ src/qemu/qemu_capabilities.h | 6 ++ src/qemu/qemu_command.c | 32 +++++++ src/qemu/qemu_domain_address.c | 10 +- src/qemu/qemu_validate.c | 80 +++++++++++++++- .../caps_11.2.0_x86_64.replies | 12 ++- .../caps_11.2.0_x86_64.xml | 4 + .../autoindex.x86_64-latest.args | 22 ++--- .../autoindex.x86_64-latest.xml | 22 ++--- .../pci-bridge-speed.x86_64-latest.err | 1 + tests/qemuxmlconfdata/pci-bridge-speed.xml | 18 ++++ .../pcie-expander-bus.x86_64-latest.args | 66 +++++++------- .../pcie-expander-bus.x86_64-latest.xml | 66 +++++++------- ...cie-root-port-nohotplug.x86_64-latest.args | 8 +- ...pcie-root-port-nohotplug.x86_64-latest.xml | 8 +- ...-root-port-speed-ioh3420.x86_64-latest.err | 1 + .../pcie-root-port-speed-ioh3420.xml | 19 ++++ ...ie-root-port-speed-width.x86_64-11.0.0.err | 1 + ...e-root-port-speed-width.x86_64-latest.args | 37 ++++++++ ...ie-root-port-speed-width.x86_64-latest.xml | 48 ++++++++++ .../pcie-root-port-speed-width.xml | 23 +++++ ...tream-port-model-generic.x86_64-11.1.0.err | 1 + ...ream-port-model-generic.x86_64-latest.args | 47 ++++++++++ ...tream-port-model-generic.x86_64-latest.xml | 91 +++++++++++++++++++ ...e-switch-downstream-port-model-generic.xml | 44 +++++++++ ...tream-port-width-xio3130.x86_64-latest.err | 1 + ...e-switch-downstream-port-width-xio3130.xml | 23 +++++ ...-switch-downstream-port.x86_64-11.1.0.args | 47 ++++++++++ ...e-switch-downstream-port.x86_64-11.1.0.xml | 91 +++++++++++++++++++ ...-switch-downstream-port.x86_64-latest.args | 16 ++-- ...e-switch-downstream-port.x86_64-latest.xml | 16 ++-- ...tream-port-model-generic.x86_64-11.1.0.err | 1 + ...ream-port-model-generic.x86_64-latest.args | 42 +++++++++ ...tream-port-model-generic.x86_64-latest.xml | 67 ++++++++++++++ ...cie-switch-upstream-port-model-generic.xml | 38 ++++++++ ...ie-switch-upstream-port.x86_64-11.1.0.args | 42 +++++++++ ...cie-switch-upstream-port.x86_64-11.1.0.xml | 66 ++++++++++++++ ...ie-switch-upstream-port.x86_64-latest.args | 2 +- ...cie-switch-upstream-port.x86_64-latest.xml | 2 +- tests/qemuxmlconftest.c | 11 +++ 46 files changed, 1170 insertions(+), 120 deletions(-) create mode 100644 tests/qemuxmlconfdata/pci-bridge-speed.x86_64-latest.err create mode 100644 tests/qemuxmlconfdata/pci-bridge-speed.xml create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.x86_64-latest.err create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.xml create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-11.0.0.err create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.args create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.xml create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-11.1.0.err create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.x86_64-latest.err create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-11.1.0.err create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.xml -- 2.43.0
Add the pcie-upstream-port and pcie-downstream-port devices to the latest x86_64 capabilities data and update the x-width and x-speed properties to be non-experimental. See QEMU commits 432b3f707a3c (hw/pci-bridge: Make speed and width for PCIe ports non-experimental) and 73962cc5f06a (hw/pci-bridge: Add generic PCIe switch upstream and downstream ports). Signed-off-by: David Vrabel <david.vrabel@nutanix.com> --- This should be replace with a more comprehensive refresh the the capability data from QEMU. --- .../qemucapabilitiesdata/caps_11.2.0_x86_64.replies | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.replies b/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.replies index c4612260f3..d453637926 100644 --- a/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.replies +++ b/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.replies @@ -28463,6 +28463,14 @@ { "name": "SapphireRapids-v7-x86_64-cpu", "parent": "x86_64-cpu" + }, + { + "name": "pcie-upstream-port", + "parent": "pcie-port" + }, + { + "name": "pcie-downstream-port", + "parent": "pcie-slot" } ], "id": "libvirt-6" @@ -32715,7 +32723,7 @@ }, { "default-value": "32", - "name": "x-width", + "name": "width", "description": "1/2/4/8/12/16/32", "type": "PCIELinkWidth" }, @@ -32731,7 +32739,7 @@ }, { "default-value": "16", - "name": "x-speed", + "name": "speed", "description": "2_5/5/8/16/32/64", "type": "PCIELinkSpeed" }, -- 2.43.0
On Wed, Nov 04, 2026 at 15:32:09 +0000, David Vrabel wrote:
Add the pcie-upstream-port and pcie-downstream-port devices to the latest x86_64 capabilities data and update the x-width and x-speed properties to be non-experimental.
See QEMU commits 432b3f707a3c (hw/pci-bridge: Make speed and width for PCIe ports non-experimental) and 73962cc5f06a (hw/pci-bridge: Add generic PCIe switch upstream and downstream ports).
Signed-off-by: David Vrabel <david.vrabel@nutanix.com> --- This should be replace with a more comprehensive refresh the the capability data from QEMU.
I'll post a refresh soon. For formal approach, NACK to this patch as it's not properly generated.
On 11/5/26 12:48, Peter Krempa via Devel wrote:
On Wed, Nov 04, 2026 at 15:32:09 +0000, David Vrabel wrote:
Add the pcie-upstream-port and pcie-downstream-port devices to the latest x86_64 capabilities data and update the x-width and x-speed properties to be non-experimental.
See QEMU commits 432b3f707a3c (hw/pci-bridge: Make speed and width for PCIe ports non-experimental) and 73962cc5f06a (hw/pci-bridge: Add generic PCIe switch upstream and downstream ports).
Signed-off-by: David Vrabel <david.vrabel@nutanix.com> --- This should be replace with a more comprehensive refresh the the capability data from QEMU.
I'll post a refresh soon.
For formal approach, NACK to this patch as it's not properly generated.
Since these gets refreshed anyway I was about to merge this one. Anyway, let's wait for you to refresh caps and I will merge this series afterwards (dropping this particular patch). Michal
On Thu, Nov 05, 2026 at 13:34:39 +0100, Michal Prívozník wrote:
On 11/5/26 12:48, Peter Krempa via Devel wrote:
On Wed, Nov 04, 2026 at 15:32:09 +0000, David Vrabel wrote:
Add the pcie-upstream-port and pcie-downstream-port devices to the latest x86_64 capabilities data and update the x-width and x-speed properties to be non-experimental.
See QEMU commits 432b3f707a3c (hw/pci-bridge: Make speed and width for PCIe ports non-experimental) and 73962cc5f06a (hw/pci-bridge: Add generic PCIe switch upstream and downstream ports).
Signed-off-by: David Vrabel <david.vrabel@nutanix.com> --- This should be replace with a more comprehensive refresh the the capability data from QEMU.
I'll post a refresh soon.
For formal approach, NACK to this patch as it's not properly generated.
Since these gets refreshed anyway I was about to merge this one. Anyway, let's wait for you to refresh caps and I will merge this series afterwards (dropping this particular patch).
I'd suggest we don't do this as a precedent case. I know that some older dumps were edited but we shouldn't ever do that because then the dumps may show impossible configurations.
Add two new capabilities for QEMU versions that support the generic PCIe switch port devices: pcie-downstream-port and pcie-upstream-port. These were added in QEMU commit 73962cc5f06a (hw/pci-bridge: Add generic PCIe switch upstream and downstream ports). Signed-off-by: David Vrabel <david.vrabel@nutanix.com> --- src/qemu/qemu_capabilities.c | 4 ++++ src/qemu/qemu_capabilities.h | 2 ++ tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml | 2 ++ 3 files changed, 8 insertions(+) diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c index 9bbb0f6591..de03a515d1 100644 --- a/src/qemu/qemu_capabilities.c +++ b/src/qemu/qemu_capabilities.c @@ -776,6 +776,8 @@ VIR_ENUM_IMPL(virQEMUCaps, "arm-smmuv3.cmdqv", /* QEMU_CAPS_ARM_SMMUV3_CMDQV */ "iothread.poll-weight", /* QEMU_CAPS_IOTHREAD_POLL_WEIGHT */ "win-dmp.guest-aware", /* QEMU_CAPS_WIN_DMP_GUEST_AWARE */ + "pcie-upstream-port", /* QEMU_CAPS_DEVICE_PCIE_UPSTREAM_PORT */ + "pcie-downstream-port", /* QEMU_CAPS_DEVICE_PCIE_DOWNSTREAM_PORT */ ); @@ -1356,6 +1358,8 @@ struct virQEMUCapsStringFlags virQEMUCapsObjectTypes[] = { { "ioh3420", QEMU_CAPS_DEVICE_IOH3420 }, { "x3130-upstream", QEMU_CAPS_DEVICE_X3130_UPSTREAM }, { "xio3130-downstream", QEMU_CAPS_DEVICE_XIO3130_DOWNSTREAM }, + { "pcie-upstream-port", QEMU_CAPS_DEVICE_PCIE_UPSTREAM_PORT }, + { "pcie-downstream-port", QEMU_CAPS_DEVICE_PCIE_DOWNSTREAM_PORT }, { "rtl8139", QEMU_CAPS_DEVICE_RTL8139 }, { "e1000", QEMU_CAPS_DEVICE_E1000 }, { "virtio-net-pci", QEMU_CAPS_DEVICE_VIRTIO_NET }, diff --git a/src/qemu/qemu_capabilities.h b/src/qemu/qemu_capabilities.h index 95a3cc2f8d..4ee10f18bb 100644 --- a/src/qemu/qemu_capabilities.h +++ b/src/qemu/qemu_capabilities.h @@ -750,6 +750,8 @@ typedef enum { /* virQEMUCapsFlags grouping marker for syntax-check */ QEMU_CAPS_ARM_SMMUV3_CMDQV, /* arm-smmuv3.cmdqv */ QEMU_CAPS_IOTHREAD_POLL_WEIGHT, /* -object iothread.poll-weight */ QEMU_CAPS_WIN_DMP_GUEST_AWARE, /* 'win-dmp' is offered only to a guest that can use it */ + QEMU_CAPS_DEVICE_PCIE_UPSTREAM_PORT, /* -device pcie-upstream-port */ + QEMU_CAPS_DEVICE_PCIE_DOWNSTREAM_PORT, /* -device pcie-downstream-port */ QEMU_CAPS_LAST /* this must always be the last item */ } virQEMUCapsFlags; diff --git a/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml b/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml index d919ad3616..d30e487094 100644 --- a/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml @@ -225,6 +225,8 @@ <flag name='object-monitor-qmp'/> <flag name='iothread.poll-weight'/> <flag name='win-dmp.guest-aware'/> + <flag name='pcie-upstream-port'/> + <flag name='pcie-downstream-port'/> <version>11001050</version> <microcodeVersion>43100288</microcodeVersion> <package>v11.1.0-1950-gf7ada39eda</package> -- 2.43.0
QEMU's pcie-upstream-port and pcie-downstream-port devices are more capable generic replacements for the x3130-upstream and xio3130-downstream devices which emulate a vintage TI XIO3130 PCIe switch. If QEMU supports the pcie-upstream-port and pcie-downstream-port devices, prefer these over the older XIO3130 devices for new VMs (existing VMs will continue to use the model stored in their XML). This is useful when used with passthrough devices to make the in-guest apparent bandwidth match the hardware bandwidth as the XIO3130 ports are limited to 2.5 GT/s and x1 but the generic ports report 64 GT/s and x32. This allows in-guest software (such as NCCL) to make better decisions about whether to use P2P transfers etc. Signed-off-by: David Vrabel <david.vrabel@nutanix.com> --- docs/formatdomain.rst | 7 ++ src/conf/domain_conf.c | 2 + src/conf/domain_conf.h | 2 + src/conf/schemas/domaincommon.rng | 2 + src/qemu/qemu_domain_address.c | 10 +- src/qemu/qemu_validate.c | 11 ++- .../autoindex.x86_64-latest.args | 22 ++--- .../autoindex.x86_64-latest.xml | 22 ++--- .../pcie-expander-bus.x86_64-latest.args | 66 +++++++------- .../pcie-expander-bus.x86_64-latest.xml | 66 +++++++------- ...cie-root-port-nohotplug.x86_64-latest.args | 8 +- ...pcie-root-port-nohotplug.x86_64-latest.xml | 8 +- ...tream-port-model-generic.x86_64-11.1.0.err | 1 + ...ream-port-model-generic.x86_64-latest.args | 47 ++++++++++ ...tream-port-model-generic.x86_64-latest.xml | 91 +++++++++++++++++++ ...e-switch-downstream-port-model-generic.xml | 44 +++++++++ ...-switch-downstream-port.x86_64-11.1.0.args | 47 ++++++++++ ...e-switch-downstream-port.x86_64-11.1.0.xml | 91 +++++++++++++++++++ ...-switch-downstream-port.x86_64-latest.args | 16 ++-- ...e-switch-downstream-port.x86_64-latest.xml | 16 ++-- ...tream-port-model-generic.x86_64-11.1.0.err | 1 + ...ream-port-model-generic.x86_64-latest.args | 42 +++++++++ ...tream-port-model-generic.x86_64-latest.xml | 66 ++++++++++++++ ...cie-switch-upstream-port-model-generic.xml | 37 ++++++++ ...ie-switch-upstream-port.x86_64-11.1.0.args | 42 +++++++++ ...cie-switch-upstream-port.x86_64-11.1.0.xml | 66 ++++++++++++++ ...ie-switch-upstream-port.x86_64-latest.args | 2 +- ...cie-switch-upstream-port.x86_64-latest.xml | 2 +- tests/qemuxmlconftest.c | 6 ++ 29 files changed, 725 insertions(+), 118 deletions(-) create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-11.1.0.err create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-11.1.0.err create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.xml diff --git a/docs/formatdomain.rst b/docs/formatdomain.rst index e4eb2d9ba3..2160cb4802 100644 --- a/docs/formatdomain.rst +++ b/docs/formatdomain.rst @@ -4695,6 +4695,13 @@ hotpluggable pcie port that can accept any standard pci or pcie device (or another pcie-switch-upstream-port), i.e. identical in function to a pcie-root-port. ( :since:`since 1.2.19` ) +By default, QEMU's generic ``pcie-upstream-port`` and ``pcie-downstream-port`` +devices are used for pcie-switch-upstream-port and pcie-switch-downstream-port +controllers if the QEMU binary supports them; otherwise the ``x3130-upstream`` +and ``xio3130-downstream`` devices (which emulate a TI XIO3130 switch limited +to a 2.5 GT/s x1 link) are used. Existing domains keep the model recorded in +their configuration. :since:`Since 12.10.0` + :: ... diff --git a/src/conf/domain_conf.c b/src/conf/domain_conf.c index 51140aa652..14cdc43b37 100644 --- a/src/conf/domain_conf.c +++ b/src/conf/domain_conf.c @@ -449,6 +449,8 @@ VIR_ENUM_IMPL(virDomainControllerPCIModelName, "ioh3420", "x3130-upstream", "xio3130-downstream", + "pcie-upstream-port", + "pcie-downstream-port", "pxb", "pxb-pcie", "pcie-root-port", diff --git a/src/conf/domain_conf.h b/src/conf/domain_conf.h index eadb5a49a4..c3aa558923 100644 --- a/src/conf/domain_conf.h +++ b/src/conf/domain_conf.h @@ -659,6 +659,8 @@ typedef enum { VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_IOH3420, VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM, VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_XIO3130_DOWNSTREAM, + VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_UPSTREAM_PORT, + VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_DOWNSTREAM_PORT, VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PXB, VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PXB_PCIE, VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_ROOT_PORT, diff --git a/src/conf/schemas/domaincommon.rng b/src/conf/schemas/domaincommon.rng index d1b10c1c5f..c1dee5470e 100644 --- a/src/conf/schemas/domaincommon.rng +++ b/src/conf/schemas/domaincommon.rng @@ -3083,8 +3083,10 @@ <value>pcie-root-port</value> <!-- implementations of "pcie-switch-upstream-port" --> <value>x3130-upstream</value> + <value>pcie-upstream-port</value> <!-- implementations of "pcie-switch-downstream-port" --> <value>xio3130-downstream</value> + <value>pcie-downstream-port</value> <!-- implementations of "pci-expander-bus" --> <value>pxb</value> <!-- implementations of "pcie-expander-bus" --> diff --git a/src/qemu/qemu_domain_address.c b/src/qemu/qemu_domain_address.c index a8292a9782..905b03cd5f 100644 --- a/src/qemu/qemu_domain_address.c +++ b/src/qemu/qemu_domain_address.c @@ -2498,10 +2498,16 @@ qemuDomainPCIControllerSetDefaultModelName(virDomainControllerDef *cont, *modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_IOH3420; break; case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_UPSTREAM_PORT: - *modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM; + if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_DEVICE_PCIE_UPSTREAM_PORT)) + *modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_UPSTREAM_PORT; + else + *modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM; break; case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT: - *modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_XIO3130_DOWNSTREAM; + if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_DEVICE_PCIE_DOWNSTREAM_PORT)) + *modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_DOWNSTREAM_PORT; + else + *modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_XIO3130_DOWNSTREAM; break; case VIR_DOMAIN_CONTROLLER_MODEL_PCI_EXPANDER_BUS: *modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PXB; diff --git a/src/qemu/qemu_validate.c b/src/qemu/qemu_validate.c index 08f5a6659d..ffd05fe765 100644 --- a/src/qemu/qemu_validate.c +++ b/src/qemu/qemu_validate.c @@ -4250,6 +4250,10 @@ virValidateControllerPCIModelNameToQEMUCaps(int modelName) return QEMU_CAPS_DEVICE_X3130_UPSTREAM; case VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_XIO3130_DOWNSTREAM: return QEMU_CAPS_DEVICE_XIO3130_DOWNSTREAM; + case VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_UPSTREAM_PORT: + return QEMU_CAPS_DEVICE_PCIE_UPSTREAM_PORT; + case VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_DOWNSTREAM_PORT: + return QEMU_CAPS_DEVICE_PCIE_DOWNSTREAM_PORT; case VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PXB: return QEMU_CAPS_DEVICE_PXB; case VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PXB_PCIE: @@ -4432,14 +4436,16 @@ qemuValidateDomainDeviceDefControllerPCI(const virDomainControllerDef *cont, break; case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_UPSTREAM_PORT: - if (pciopts->modelName != VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM) { + if (pciopts->modelName != VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM && + pciopts->modelName != VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_UPSTREAM_PORT) { virReportControllerInvalidValue(cont, model, modelName, "modelName"); return -1; } break; case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT: - if (pciopts->modelName != VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_XIO3130_DOWNSTREAM) { + if (pciopts->modelName != VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_XIO3130_DOWNSTREAM && + pciopts->modelName != VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_DOWNSTREAM_PORT) { virReportControllerInvalidValue(cont, model, modelName, "modelName"); return -1; } @@ -4756,6 +4762,7 @@ qemuValidateDomainDeviceDefControllerPCI(const virDomainControllerDef *cont, case VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST: default: virReportEnumRangeError(virDomainControllerModelPCI, cont->model); + return -1; } /* hotplug */ diff --git a/tests/qemuxmlconfdata/autoindex.x86_64-latest.args b/tests/qemuxmlconfdata/autoindex.x86_64-latest.args index 0eccdecfce..6f9feb9a48 100644 --- a/tests/qemuxmlconfdata/autoindex.x86_64-latest.args +++ b/tests/qemuxmlconfdata/autoindex.x86_64-latest.args @@ -29,17 +29,17 @@ XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.config \ -device '{"driver":"i82801b11-bridge","id":"pci.1","bus":"pcie.0","addr":"0x1e"}' \ -device '{"driver":"pci-bridge","chassis_nr":2,"id":"pci.2","bus":"pci.1","addr":"0x0"}' \ -device '{"driver":"pcie-root-port","port":8,"chassis":3,"id":"pci.3","bus":"pcie.0","addr":"0x1"}' \ --device '{"driver":"x3130-upstream","id":"pci.4","bus":"pci.3","addr":"0x0"}' \ --device '{"driver":"xio3130-downstream","port":0,"chassis":5,"id":"pci.5","bus":"pci.4","addr":"0x0"}' \ --device '{"driver":"xio3130-downstream","port":1,"chassis":6,"id":"pci.6","bus":"pci.4","addr":"0x1"}' \ --device '{"driver":"xio3130-downstream","port":2,"chassis":7,"id":"pci.7","bus":"pci.4","addr":"0x2"}' \ --device '{"driver":"xio3130-downstream","port":3,"chassis":8,"id":"pci.8","bus":"pci.4","addr":"0x3"}' \ --device '{"driver":"xio3130-downstream","port":4,"chassis":9,"id":"pci.9","bus":"pci.4","addr":"0x4"}' \ --device '{"driver":"xio3130-downstream","port":5,"chassis":10,"id":"pci.10","bus":"pci.4","addr":"0x5"}' \ --device '{"driver":"xio3130-downstream","port":6,"chassis":11,"id":"pci.11","bus":"pci.4","addr":"0x6"}' \ --device '{"driver":"xio3130-downstream","port":7,"chassis":12,"id":"pci.12","bus":"pci.4","addr":"0x7"}' \ --device '{"driver":"xio3130-downstream","port":8,"chassis":13,"id":"pci.13","bus":"pci.4","addr":"0x8"}' \ --device '{"driver":"xio3130-downstream","port":9,"chassis":14,"id":"pci.14","bus":"pci.4","addr":"0x9"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.4","bus":"pci.3","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":0,"chassis":5,"id":"pci.5","bus":"pci.4","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":1,"chassis":6,"id":"pci.6","bus":"pci.4","addr":"0x1"}' \ +-device '{"driver":"pcie-downstream-port","port":2,"chassis":7,"id":"pci.7","bus":"pci.4","addr":"0x2"}' \ +-device '{"driver":"pcie-downstream-port","port":3,"chassis":8,"id":"pci.8","bus":"pci.4","addr":"0x3"}' \ +-device '{"driver":"pcie-downstream-port","port":4,"chassis":9,"id":"pci.9","bus":"pci.4","addr":"0x4"}' \ +-device '{"driver":"pcie-downstream-port","port":5,"chassis":10,"id":"pci.10","bus":"pci.4","addr":"0x5"}' \ +-device '{"driver":"pcie-downstream-port","port":6,"chassis":11,"id":"pci.11","bus":"pci.4","addr":"0x6"}' \ +-device '{"driver":"pcie-downstream-port","port":7,"chassis":12,"id":"pci.12","bus":"pci.4","addr":"0x7"}' \ +-device '{"driver":"pcie-downstream-port","port":8,"chassis":13,"id":"pci.13","bus":"pci.4","addr":"0x8"}' \ +-device '{"driver":"pcie-downstream-port","port":9,"chassis":14,"id":"pci.14","bus":"pci.4","addr":"0x9"}' \ -device '{"driver":"ich9-usb-ehci1","id":"usb","bus":"pcie.0","addr":"0x1d.0x7"}' \ -device '{"driver":"ich9-usb-uhci1","masterbus":"usb.0","firstport":0,"bus":"pcie.0","multifunction":true,"addr":"0x1d"}' \ -device '{"driver":"ich9-usb-uhci2","masterbus":"usb.0","firstport":2,"bus":"pcie.0","addr":"0x1d.0x1"}' \ diff --git a/tests/qemuxmlconfdata/autoindex.x86_64-latest.xml b/tests/qemuxmlconfdata/autoindex.x86_64-latest.xml index 357055fff3..20eb4ff927 100644 --- a/tests/qemuxmlconfdata/autoindex.x86_64-latest.xml +++ b/tests/qemuxmlconfdata/autoindex.x86_64-latest.xml @@ -39,56 +39,56 @@ <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x0'/> </controller> <controller type='pci' index='4' model='pcie-switch-upstream-port'> - <model name='x3130-upstream'/> + <model name='pcie-upstream-port'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='5' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='5' port='0x0'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='6' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='6' port='0x1'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x01' function='0x0'/> </controller> <controller type='pci' index='7' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='7' port='0x2'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x02' function='0x0'/> </controller> <controller type='pci' index='8' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='8' port='0x3'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x03' function='0x0'/> </controller> <controller type='pci' index='9' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='9' port='0x4'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x04' function='0x0'/> </controller> <controller type='pci' index='10' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='10' port='0x5'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x05' function='0x0'/> </controller> <controller type='pci' index='11' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='11' port='0x6'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x06' function='0x0'/> </controller> <controller type='pci' index='12' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='12' port='0x7'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x07' function='0x0'/> </controller> <controller type='pci' index='13' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='13' port='0x8'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x08' function='0x0'/> </controller> <controller type='pci' index='14' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='14' port='0x9'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x09' function='0x0'/> </controller> diff --git a/tests/qemuxmlconfdata/pcie-expander-bus.x86_64-latest.args b/tests/qemuxmlconfdata/pcie-expander-bus.x86_64-latest.args index 5e793f2515..00cadd8acd 100644 --- a/tests/qemuxmlconfdata/pcie-expander-bus.x86_64-latest.args +++ b/tests/qemuxmlconfdata/pcie-expander-bus.x86_64-latest.args @@ -31,39 +31,39 @@ XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-pcie-expander-bus-te/.config \ -boot strict=on \ -device '{"driver":"pxb-pcie","bus_nr":254,"id":"pci.1","numa_node":0,"bus":"pcie.0","addr":"0x4"}' \ -device '{"driver":"pcie-root-port","port":0,"chassis":2,"id":"pci.2","bus":"pci.1","addr":"0x0"}' \ --device '{"driver":"x3130-upstream","id":"pci.3","bus":"pci.2","addr":"0x0"}' \ --device '{"driver":"xio3130-downstream","port":0,"chassis":4,"id":"pci.4","bus":"pci.3","addr":"0x0"}' \ --device '{"driver":"xio3130-downstream","port":1,"chassis":5,"id":"pci.5","bus":"pci.3","addr":"0x1"}' \ --device '{"driver":"xio3130-downstream","port":2,"chassis":6,"id":"pci.6","bus":"pci.3","addr":"0x2"}' \ --device '{"driver":"xio3130-downstream","port":3,"chassis":7,"id":"pci.7","bus":"pci.3","addr":"0x3"}' \ --device '{"driver":"xio3130-downstream","port":4,"chassis":8,"id":"pci.8","bus":"pci.3","addr":"0x4"}' \ --device '{"driver":"xio3130-downstream","port":5,"chassis":9,"id":"pci.9","bus":"pci.3","addr":"0x5"}' \ --device '{"driver":"xio3130-downstream","port":6,"chassis":10,"id":"pci.10","bus":"pci.3","addr":"0x6"}' \ --device '{"driver":"xio3130-downstream","port":7,"chassis":11,"id":"pci.11","bus":"pci.3","addr":"0x7"}' \ --device '{"driver":"xio3130-downstream","port":8,"chassis":12,"id":"pci.12","bus":"pci.3","addr":"0x8"}' \ --device '{"driver":"xio3130-downstream","port":9,"chassis":13,"id":"pci.13","bus":"pci.3","addr":"0x9"}' \ --device '{"driver":"xio3130-downstream","port":10,"chassis":14,"id":"pci.14","bus":"pci.3","addr":"0xa"}' \ --device '{"driver":"xio3130-downstream","port":11,"chassis":15,"id":"pci.15","bus":"pci.3","addr":"0xb"}' \ --device '{"driver":"xio3130-downstream","port":12,"chassis":16,"id":"pci.16","bus":"pci.3","addr":"0xc"}' \ --device '{"driver":"xio3130-downstream","port":13,"chassis":17,"id":"pci.17","bus":"pci.3","addr":"0xd"}' \ --device '{"driver":"xio3130-downstream","port":14,"chassis":18,"id":"pci.18","bus":"pci.3","addr":"0xe"}' \ --device '{"driver":"xio3130-downstream","port":15,"chassis":19,"id":"pci.19","bus":"pci.3","addr":"0xf"}' \ --device '{"driver":"xio3130-downstream","port":16,"chassis":20,"id":"pci.20","bus":"pci.3","addr":"0x10"}' \ --device '{"driver":"xio3130-downstream","port":17,"chassis":21,"id":"pci.21","bus":"pci.3","addr":"0x11"}' \ --device '{"driver":"xio3130-downstream","port":18,"chassis":22,"id":"pci.22","bus":"pci.3","addr":"0x12"}' \ --device '{"driver":"xio3130-downstream","port":19,"chassis":23,"id":"pci.23","bus":"pci.3","addr":"0x13"}' \ --device '{"driver":"xio3130-downstream","port":20,"chassis":24,"id":"pci.24","bus":"pci.3","addr":"0x14"}' \ --device '{"driver":"xio3130-downstream","port":21,"chassis":25,"id":"pci.25","bus":"pci.3","addr":"0x15"}' \ --device '{"driver":"xio3130-downstream","port":22,"chassis":26,"id":"pci.26","bus":"pci.3","addr":"0x16"}' \ --device '{"driver":"xio3130-downstream","port":23,"chassis":27,"id":"pci.27","bus":"pci.3","addr":"0x17"}' \ --device '{"driver":"xio3130-downstream","port":24,"chassis":28,"id":"pci.28","bus":"pci.3","addr":"0x18"}' \ --device '{"driver":"xio3130-downstream","port":25,"chassis":29,"id":"pci.29","bus":"pci.3","addr":"0x19"}' \ --device '{"driver":"xio3130-downstream","port":26,"chassis":30,"id":"pci.30","bus":"pci.3","addr":"0x1a"}' \ --device '{"driver":"xio3130-downstream","port":27,"chassis":31,"id":"pci.31","bus":"pci.3","addr":"0x1b"}' \ --device '{"driver":"xio3130-downstream","port":28,"chassis":32,"id":"pci.32","bus":"pci.3","addr":"0x1c"}' \ --device '{"driver":"xio3130-downstream","port":29,"chassis":33,"id":"pci.33","bus":"pci.3","addr":"0x1d"}' \ --device '{"driver":"xio3130-downstream","port":30,"chassis":34,"id":"pci.34","bus":"pci.3","addr":"0x1e"}' \ --device '{"driver":"xio3130-downstream","port":31,"chassis":35,"id":"pci.35","bus":"pci.3","addr":"0x1f"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.3","bus":"pci.2","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":0,"chassis":4,"id":"pci.4","bus":"pci.3","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":1,"chassis":5,"id":"pci.5","bus":"pci.3","addr":"0x1"}' \ +-device '{"driver":"pcie-downstream-port","port":2,"chassis":6,"id":"pci.6","bus":"pci.3","addr":"0x2"}' \ +-device '{"driver":"pcie-downstream-port","port":3,"chassis":7,"id":"pci.7","bus":"pci.3","addr":"0x3"}' \ +-device '{"driver":"pcie-downstream-port","port":4,"chassis":8,"id":"pci.8","bus":"pci.3","addr":"0x4"}' \ +-device '{"driver":"pcie-downstream-port","port":5,"chassis":9,"id":"pci.9","bus":"pci.3","addr":"0x5"}' \ +-device '{"driver":"pcie-downstream-port","port":6,"chassis":10,"id":"pci.10","bus":"pci.3","addr":"0x6"}' \ +-device '{"driver":"pcie-downstream-port","port":7,"chassis":11,"id":"pci.11","bus":"pci.3","addr":"0x7"}' \ +-device '{"driver":"pcie-downstream-port","port":8,"chassis":12,"id":"pci.12","bus":"pci.3","addr":"0x8"}' \ +-device '{"driver":"pcie-downstream-port","port":9,"chassis":13,"id":"pci.13","bus":"pci.3","addr":"0x9"}' \ +-device '{"driver":"pcie-downstream-port","port":10,"chassis":14,"id":"pci.14","bus":"pci.3","addr":"0xa"}' \ +-device '{"driver":"pcie-downstream-port","port":11,"chassis":15,"id":"pci.15","bus":"pci.3","addr":"0xb"}' \ +-device '{"driver":"pcie-downstream-port","port":12,"chassis":16,"id":"pci.16","bus":"pci.3","addr":"0xc"}' \ +-device '{"driver":"pcie-downstream-port","port":13,"chassis":17,"id":"pci.17","bus":"pci.3","addr":"0xd"}' \ +-device '{"driver":"pcie-downstream-port","port":14,"chassis":18,"id":"pci.18","bus":"pci.3","addr":"0xe"}' \ +-device '{"driver":"pcie-downstream-port","port":15,"chassis":19,"id":"pci.19","bus":"pci.3","addr":"0xf"}' \ +-device '{"driver":"pcie-downstream-port","port":16,"chassis":20,"id":"pci.20","bus":"pci.3","addr":"0x10"}' \ +-device '{"driver":"pcie-downstream-port","port":17,"chassis":21,"id":"pci.21","bus":"pci.3","addr":"0x11"}' \ +-device '{"driver":"pcie-downstream-port","port":18,"chassis":22,"id":"pci.22","bus":"pci.3","addr":"0x12"}' \ +-device '{"driver":"pcie-downstream-port","port":19,"chassis":23,"id":"pci.23","bus":"pci.3","addr":"0x13"}' \ +-device '{"driver":"pcie-downstream-port","port":20,"chassis":24,"id":"pci.24","bus":"pci.3","addr":"0x14"}' \ +-device '{"driver":"pcie-downstream-port","port":21,"chassis":25,"id":"pci.25","bus":"pci.3","addr":"0x15"}' \ +-device '{"driver":"pcie-downstream-port","port":22,"chassis":26,"id":"pci.26","bus":"pci.3","addr":"0x16"}' \ +-device '{"driver":"pcie-downstream-port","port":23,"chassis":27,"id":"pci.27","bus":"pci.3","addr":"0x17"}' \ +-device '{"driver":"pcie-downstream-port","port":24,"chassis":28,"id":"pci.28","bus":"pci.3","addr":"0x18"}' \ +-device '{"driver":"pcie-downstream-port","port":25,"chassis":29,"id":"pci.29","bus":"pci.3","addr":"0x19"}' \ +-device '{"driver":"pcie-downstream-port","port":26,"chassis":30,"id":"pci.30","bus":"pci.3","addr":"0x1a"}' \ +-device '{"driver":"pcie-downstream-port","port":27,"chassis":31,"id":"pci.31","bus":"pci.3","addr":"0x1b"}' \ +-device '{"driver":"pcie-downstream-port","port":28,"chassis":32,"id":"pci.32","bus":"pci.3","addr":"0x1c"}' \ +-device '{"driver":"pcie-downstream-port","port":29,"chassis":33,"id":"pci.33","bus":"pci.3","addr":"0x1d"}' \ +-device '{"driver":"pcie-downstream-port","port":30,"chassis":34,"id":"pci.34","bus":"pci.3","addr":"0x1e"}' \ +-device '{"driver":"pcie-downstream-port","port":31,"chassis":35,"id":"pci.35","bus":"pci.3","addr":"0x1f"}' \ -device '{"driver":"pcie-root-port","port":8,"chassis":36,"id":"pci.36","bus":"pcie.0","addr":"0x1"}' \ -device '{"driver":"qemu-xhci","id":"usb","bus":"pci.36","addr":"0x0"}' \ -blockdev '{"driver":"host_device","filename":"/dev/HostVG/QEMUGuest1","node-name":"libvirt-1-storage","read-only":false}' \ diff --git a/tests/qemuxmlconfdata/pcie-expander-bus.x86_64-latest.xml b/tests/qemuxmlconfdata/pcie-expander-bus.x86_64-latest.xml index 3c39d86622..f4a04d77ee 100644 --- a/tests/qemuxmlconfdata/pcie-expander-bus.x86_64-latest.xml +++ b/tests/qemuxmlconfdata/pcie-expander-bus.x86_64-latest.xml @@ -42,166 +42,166 @@ <address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='3' model='pcie-switch-upstream-port'> - <model name='x3130-upstream'/> + <model name='pcie-upstream-port'/> <address type='pci' domain='0x0000' bus='0x02' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='4' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='4' port='0x0'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='5' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='5' port='0x1'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x01' function='0x0'/> </controller> <controller type='pci' index='6' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='6' port='0x2'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x02' function='0x0'/> </controller> <controller type='pci' index='7' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='7' port='0x3'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x03' function='0x0'/> </controller> <controller type='pci' index='8' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='8' port='0x4'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x04' function='0x0'/> </controller> <controller type='pci' index='9' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='9' port='0x5'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x05' function='0x0'/> </controller> <controller type='pci' index='10' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='10' port='0x6'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x06' function='0x0'/> </controller> <controller type='pci' index='11' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='11' port='0x7'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x07' function='0x0'/> </controller> <controller type='pci' index='12' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='12' port='0x8'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x08' function='0x0'/> </controller> <controller type='pci' index='13' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='13' port='0x9'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x09' function='0x0'/> </controller> <controller type='pci' index='14' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='14' port='0xa'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x0a' function='0x0'/> </controller> <controller type='pci' index='15' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='15' port='0xb'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x0b' function='0x0'/> </controller> <controller type='pci' index='16' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='16' port='0xc'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x0c' function='0x0'/> </controller> <controller type='pci' index='17' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='17' port='0xd'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x0d' function='0x0'/> </controller> <controller type='pci' index='18' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='18' port='0xe'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x0e' function='0x0'/> </controller> <controller type='pci' index='19' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='19' port='0xf'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x0f' function='0x0'/> </controller> <controller type='pci' index='20' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='20' port='0x10'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x10' function='0x0'/> </controller> <controller type='pci' index='21' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='21' port='0x11'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x11' function='0x0'/> </controller> <controller type='pci' index='22' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='22' port='0x12'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x12' function='0x0'/> </controller> <controller type='pci' index='23' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='23' port='0x13'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x13' function='0x0'/> </controller> <controller type='pci' index='24' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='24' port='0x14'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x14' function='0x0'/> </controller> <controller type='pci' index='25' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='25' port='0x15'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x15' function='0x0'/> </controller> <controller type='pci' index='26' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='26' port='0x16'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x16' function='0x0'/> </controller> <controller type='pci' index='27' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='27' port='0x17'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x17' function='0x0'/> </controller> <controller type='pci' index='28' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='28' port='0x18'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x18' function='0x0'/> </controller> <controller type='pci' index='29' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='29' port='0x19'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x19' function='0x0'/> </controller> <controller type='pci' index='30' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='30' port='0x1a'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x1a' function='0x0'/> </controller> <controller type='pci' index='31' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='31' port='0x1b'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x1b' function='0x0'/> </controller> <controller type='pci' index='32' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='32' port='0x1c'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x1c' function='0x0'/> </controller> <controller type='pci' index='33' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='33' port='0x1d'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x1d' function='0x0'/> </controller> <controller type='pci' index='34' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='34' port='0x1e'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x1e' function='0x0'/> </controller> <controller type='pci' index='35' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='35' port='0x1f'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x1f' function='0x0'/> </controller> diff --git a/tests/qemuxmlconfdata/pcie-root-port-nohotplug.x86_64-latest.args b/tests/qemuxmlconfdata/pcie-root-port-nohotplug.x86_64-latest.args index a438d6c279..40ba3eb10d 100644 --- a/tests/qemuxmlconfdata/pcie-root-port-nohotplug.x86_64-latest.args +++ b/tests/qemuxmlconfdata/pcie-root-port-nohotplug.x86_64-latest.args @@ -29,10 +29,10 @@ XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-guest/.config \ -device '{"driver":"pcie-root-port","port":8,"chassis":1,"id":"pci.1","bus":"pcie.0","multifunction":true,"addr":"0x1"}' \ -device '{"driver":"pcie-root-port","port":9,"chassis":2,"id":"pci.2","hotplug":false,"bus":"pcie.0","addr":"0x1.0x1"}' \ -device '{"driver":"ioh3420","port":10,"chassis":3,"id":"pci.3","hotplug":false,"bus":"pcie.0","addr":"0x1.0x2"}' \ --device '{"driver":"x3130-upstream","id":"pci.4","bus":"pci.1","addr":"0x0"}' \ --device '{"driver":"xio3130-downstream","port":0,"chassis":5,"id":"pci.5","hotplug":false,"bus":"pci.4","addr":"0x0"}' \ --device '{"driver":"xio3130-downstream","port":1,"chassis":6,"id":"pci.6","hotplug":true,"bus":"pci.4","addr":"0x1"}' \ --device '{"driver":"xio3130-downstream","port":2,"chassis":7,"id":"pci.7","bus":"pci.4","addr":"0x2"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.4","bus":"pci.1","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":0,"chassis":5,"id":"pci.5","hotplug":false,"bus":"pci.4","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":1,"chassis":6,"id":"pci.6","hotplug":true,"bus":"pci.4","addr":"0x1"}' \ +-device '{"driver":"pcie-downstream-port","port":2,"chassis":7,"id":"pci.7","bus":"pci.4","addr":"0x2"}' \ -device '{"driver":"xio3130-downstream","port":39,"chassis":30,"id":"pci.8","bus":"pci.4","addr":"0x3"}' \ -device '{"driver":"qemu-xhci","id":"usb","bus":"pci.2","addr":"0x0"}' \ -audiodev '{"id":"audio1","driver":"none"}' \ diff --git a/tests/qemuxmlconfdata/pcie-root-port-nohotplug.x86_64-latest.xml b/tests/qemuxmlconfdata/pcie-root-port-nohotplug.x86_64-latest.xml index 202003c59a..2805701ca3 100644 --- a/tests/qemuxmlconfdata/pcie-root-port-nohotplug.x86_64-latest.xml +++ b/tests/qemuxmlconfdata/pcie-root-port-nohotplug.x86_64-latest.xml @@ -34,21 +34,21 @@ <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x2'/> </controller> <controller type='pci' index='4' model='pcie-switch-upstream-port'> - <model name='x3130-upstream'/> + <model name='pcie-upstream-port'/> <address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='5' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='5' port='0x0' hotplug='off'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='6' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='6' port='0x1' hotplug='on'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x01' function='0x0'/> </controller> <controller type='pci' index='7' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='7' port='0x2'/> <address type='pci' domain='0x0000' bus='0x04' slot='0x02' function='0x0'/> </controller> diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-11.1.0.err b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-11.1.0.err new file mode 100644 index 0000000000..ba69f7a171 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-11.1.0.err @@ -0,0 +1 @@ +unsupported configuration: The 'pcie-downstream-port' device is not supported by this QEMU binary diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args new file mode 100644 index 0000000000..024895a9f2 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args @@ -0,0 +1,47 @@ +LC_ALL=C \ +PATH=/bin \ +HOME=/var/lib/libvirt/qemu/domain--1-q35-test \ +USER=test \ +LOGNAME=test \ +XDG_DATA_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.local/share \ +XDG_CACHE_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.cache \ +XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.config \ +/usr/bin/qemu-system-x86_64 \ +-name guest=q35-test,debug-threads=on \ +-S \ +-object '{"qom-type":"secret","id":"masterKey0","format":"raw","file":"/var/lib/libvirt/qemu/domain--1-q35-test/master-key.aes"}' \ +-machine q35,usb=off,dump-guest-core=off,memory-backend=pc.ram,acpi=off \ +-accel tcg \ +-cpu qemu64 \ +-m size=2097152k \ +-object '{"qom-type":"memory-backend-ram","id":"pc.ram","size":2147483648}' \ +-overcommit mem-lock=off \ +-smp 2,sockets=2,cores=1,threads=1 \ +-uuid 11dbdcdd-4c3b-482b-8903-9bdb8c0a2774 \ +-display none \ +-no-user-config \ +-nodefaults \ +-chardev socket,id=charmonitor,fd=@mon-fd@,server=on,wait=off \ +-object '{"qom-type":"monitor-qmp","id":"monitor","chardev":"charmonitor"}' \ +-rtc base=utc \ +-no-shutdown \ +-boot strict=on \ +-device '{"driver":"pcie-root-port","port":16,"chassis":1,"id":"pci.1","bus":"pcie.0","addr":"0x2"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.2","bus":"pci.1","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":0,"chassis":3,"id":"pci.3","bus":"pci.2","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":1,"chassis":4,"id":"pci.4","bus":"pci.2","addr":"0x1"}' \ +-device '{"driver":"pcie-downstream-port","port":2,"chassis":5,"id":"pci.5","bus":"pci.2","addr":"0x2"}' \ +-device '{"driver":"pcie-downstream-port","port":39,"chassis":30,"id":"pci.6","bus":"pci.2","addr":"0x3"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.7","bus":"pci.3","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":4,"chassis":8,"id":"pci.8","bus":"pci.2","addr":"0x4"}' \ +-device '{"driver":"pcie-downstream-port","port":5,"chassis":9,"id":"pci.9","bus":"pci.2","addr":"0x5"}' \ +-device '{"driver":"pcie-downstream-port","port":6,"chassis":10,"id":"pci.10","bus":"pci.2","addr":"0x6"}' \ +-device '{"driver":"qemu-xhci","id":"usb","bus":"pci.4","addr":"0x0"}' \ +-blockdev '{"driver":"host_device","filename":"/dev/HostVG/QEMUGuest1","node-name":"libvirt-1-storage","read-only":false}' \ +-device '{"driver":"ide-hd","bus":"ide.0","drive":"libvirt-1-storage","id":"sata0-0-0","bootindex":1}' \ +-audiodev '{"id":"audio1","driver":"none"}' \ +-device '{"driver":"qxl-vga","id":"video0","max_outputs":1,"ram_size":67108864,"vram_size":33554432,"vram64_size_mb":0,"vgamem_mb":8,"bus":"pcie.0","addr":"0x1"}' \ +-global ICH9-LPC.noreboot=off \ +-watchdog-action reset \ +-sandbox on,obsolete=deny,elevateprivileges=deny,spawn=deny,resourcecontrol=deny \ +-msg timestamp=on diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml new file mode 100644 index 0000000000..d4ca578b42 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml @@ -0,0 +1,91 @@ +<domain type='qemu'> + <name>q35-test</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static' cpuset='0-1'>2</vcpu> + <os> + <type arch='x86_64' machine='q35'>hvm</type> + <boot dev='hd'/> + </os> + <cpu mode='custom' match='exact' check='none'> + <model fallback='forbid'>qemu64</model> + </cpu> + <clock offset='utc'/> + <on_poweroff>destroy</on_poweroff> + <on_reboot>restart</on_reboot> + <on_crash>destroy</on_crash> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <disk type='block' device='disk'> + <driver name='qemu' type='raw'/> + <source dev='/dev/HostVG/QEMUGuest1'/> + <target dev='sda' bus='sata'/> + <address type='drive' controller='0' bus='0' target='0' unit='0'/> + </disk> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='1' port='0x10'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x0'/> + </controller> + <controller type='pci' index='2' model='pcie-switch-upstream-port'> + <model name='pcie-upstream-port'/> + <address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='3' model='pcie-switch-downstream-port'> + <model name='pcie-downstream-port'/> + <target chassis='3' port='0x0'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='4' model='pcie-switch-downstream-port'> + <model name='pcie-downstream-port'/> + <target chassis='4' port='0x1'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x01' function='0x0'/> + </controller> + <controller type='pci' index='5' model='pcie-switch-downstream-port'> + <model name='pcie-downstream-port'/> + <target chassis='5' port='0x2'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x02' function='0x0'/> + </controller> + <controller type='pci' index='6' model='pcie-switch-downstream-port'> + <model name='pcie-downstream-port'/> + <target chassis='30' port='0x27'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x03' function='0x0'/> + </controller> + <controller type='pci' index='7' model='pcie-switch-upstream-port'> + <model name='pcie-upstream-port'/> + <address type='pci' domain='0x0000' bus='0x03' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='8' model='pcie-switch-downstream-port'> + <model name='pcie-downstream-port'/> + <target chassis='8' port='0x4'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x04' function='0x0'/> + </controller> + <controller type='pci' index='9' model='pcie-switch-downstream-port'> + <model name='pcie-downstream-port'/> + <target chassis='9' port='0x5'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x05' function='0x0'/> + </controller> + <controller type='pci' index='10' model='pcie-switch-downstream-port'> + <model name='pcie-downstream-port'/> + <target chassis='10' port='0x6'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x06' function='0x0'/> + </controller> + <controller type='sata' index='0'> + <address type='pci' domain='0x0000' bus='0x00' slot='0x1f' function='0x2'/> + </controller> + <controller type='usb' index='0' model='qemu-xhci'> + <address type='pci' domain='0x0000' bus='0x04' slot='0x00' function='0x0'/> + </controller> + <input type='mouse' bus='ps2'/> + <input type='keyboard' bus='ps2'/> + <audio id='1' type='none'/> + <video> + <model type='qxl' ram='65536' vram='32768' vgamem='8192' heads='1' primary='yes'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x0'/> + </video> + <watchdog model='itco' action='reset'/> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml new file mode 100644 index 0000000000..19d5e96233 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml @@ -0,0 +1,44 @@ +<domain type='qemu'> + <name>q35-test</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static' cpuset='0-1'>2</vcpu> + <os> + <type arch='x86_64' machine='q35'>hvm</type> + <boot dev='hd'/> + </os> + <clock offset='utc'/> + <on_poweroff>destroy</on_poweroff> + <on_reboot>restart</on_reboot> + <on_crash>destroy</on_crash> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <disk type='block' device='disk'> + <source dev='/dev/HostVG/QEMUGuest1'/> + <target dev='sda' bus='sata'/> + <address type='drive' controller='0' bus='0' target='0' unit='0'/> + </disk> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'/> + <controller type='pci' index='2' model='pcie-switch-upstream-port'/> + <controller type='pci' index='3' model='pcie-switch-downstream-port'/> + <controller type='pci' index='4' model='pcie-switch-downstream-port'/> + <controller type='pci' index='5' model='pcie-switch-downstream-port'/> + <controller type='pci' index='6' model='pcie-switch-downstream-port'> + <model name='pcie-downstream-port'/> + <target chassis='30' port='0x27'/> + </controller> + <controller type='pci' index='7' model='pcie-switch-upstream-port'/> + <controller type='pci' index='8' model='pcie-switch-downstream-port'/> + <controller type='pci' index='9' model='pcie-switch-downstream-port'/> + <controller type='pci' index='10' model='pcie-switch-downstream-port'/> + <controller type='sata' index='0'/> + <input type='mouse' bus='ps2'/> + <input type='keyboard' bus='ps2'/> + <video> + <model type='qxl' ram='65536' vram='32768' vgamem='8192' heads='1'/> + </video> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.args b/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.args new file mode 100644 index 0000000000..d28602829f --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.args @@ -0,0 +1,47 @@ +LC_ALL=C \ +PATH=/bin \ +HOME=/var/lib/libvirt/qemu/domain--1-q35-test \ +USER=test \ +LOGNAME=test \ +XDG_DATA_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.local/share \ +XDG_CACHE_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.cache \ +XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.config \ +/usr/bin/qemu-system-x86_64 \ +-name guest=q35-test,debug-threads=on \ +-S \ +-object '{"qom-type":"secret","id":"masterKey0","format":"raw","file":"/var/lib/libvirt/qemu/domain--1-q35-test/master-key.aes"}' \ +-machine pc-q35-11.1,usb=off,dump-guest-core=off,memory-backend=pc.ram,acpi=off \ +-accel tcg \ +-cpu qemu64 \ +-m size=2097152k \ +-object '{"qom-type":"memory-backend-ram","id":"pc.ram","size":2147483648}' \ +-overcommit mem-lock=off \ +-smp 2,sockets=2,cores=1,threads=1 \ +-uuid 11dbdcdd-4c3b-482b-8903-9bdb8c0a2774 \ +-display none \ +-no-user-config \ +-nodefaults \ +-chardev socket,id=charmonitor,fd=@mon-fd@,server=on,wait=off \ +-object '{"qom-type":"monitor-qmp","id":"monitor","chardev":"charmonitor"}' \ +-rtc base=utc \ +-no-shutdown \ +-boot strict=on \ +-device '{"driver":"pcie-root-port","port":16,"chassis":1,"id":"pci.1","bus":"pcie.0","addr":"0x2"}' \ +-device '{"driver":"x3130-upstream","id":"pci.2","bus":"pci.1","addr":"0x0"}' \ +-device '{"driver":"xio3130-downstream","port":0,"chassis":3,"id":"pci.3","bus":"pci.2","addr":"0x0"}' \ +-device '{"driver":"xio3130-downstream","port":1,"chassis":4,"id":"pci.4","bus":"pci.2","addr":"0x1"}' \ +-device '{"driver":"xio3130-downstream","port":2,"chassis":5,"id":"pci.5","bus":"pci.2","addr":"0x2"}' \ +-device '{"driver":"xio3130-downstream","port":39,"chassis":30,"id":"pci.6","bus":"pci.2","addr":"0x3"}' \ +-device '{"driver":"x3130-upstream","id":"pci.7","bus":"pci.3","addr":"0x0"}' \ +-device '{"driver":"xio3130-downstream","port":4,"chassis":8,"id":"pci.8","bus":"pci.2","addr":"0x4"}' \ +-device '{"driver":"xio3130-downstream","port":5,"chassis":9,"id":"pci.9","bus":"pci.2","addr":"0x5"}' \ +-device '{"driver":"xio3130-downstream","port":6,"chassis":10,"id":"pci.10","bus":"pci.2","addr":"0x6"}' \ +-device '{"driver":"qemu-xhci","id":"usb","bus":"pci.4","addr":"0x0"}' \ +-blockdev '{"driver":"host_device","filename":"/dev/HostVG/QEMUGuest1","node-name":"libvirt-1-storage","read-only":false}' \ +-device '{"driver":"ide-hd","bus":"ide.0","drive":"libvirt-1-storage","id":"sata0-0-0","bootindex":1}' \ +-audiodev '{"id":"audio1","driver":"none"}' \ +-device '{"driver":"qxl-vga","id":"video0","max_outputs":1,"ram_size":67108864,"vram_size":33554432,"vram64_size_mb":0,"vgamem_mb":8,"bus":"pcie.0","addr":"0x1"}' \ +-global ICH9-LPC.noreboot=off \ +-watchdog-action reset \ +-sandbox on,obsolete=deny,elevateprivileges=deny,spawn=deny,resourcecontrol=deny \ +-msg timestamp=on diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.xml b/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.xml new file mode 100644 index 0000000000..9aa05febe6 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.xml @@ -0,0 +1,91 @@ +<domain type='qemu'> + <name>q35-test</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static' cpuset='0-1'>2</vcpu> + <os> + <type arch='x86_64' machine='pc-q35-11.1'>hvm</type> + <boot dev='hd'/> + </os> + <cpu mode='custom' match='exact' check='none'> + <model fallback='forbid'>qemu64</model> + </cpu> + <clock offset='utc'/> + <on_poweroff>destroy</on_poweroff> + <on_reboot>restart</on_reboot> + <on_crash>destroy</on_crash> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <disk type='block' device='disk'> + <driver name='qemu' type='raw'/> + <source dev='/dev/HostVG/QEMUGuest1'/> + <target dev='sda' bus='sata'/> + <address type='drive' controller='0' bus='0' target='0' unit='0'/> + </disk> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='1' port='0x10'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x0'/> + </controller> + <controller type='pci' index='2' model='pcie-switch-upstream-port'> + <model name='x3130-upstream'/> + <address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='3' model='pcie-switch-downstream-port'> + <model name='xio3130-downstream'/> + <target chassis='3' port='0x0'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='4' model='pcie-switch-downstream-port'> + <model name='xio3130-downstream'/> + <target chassis='4' port='0x1'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x01' function='0x0'/> + </controller> + <controller type='pci' index='5' model='pcie-switch-downstream-port'> + <model name='xio3130-downstream'/> + <target chassis='5' port='0x2'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x02' function='0x0'/> + </controller> + <controller type='pci' index='6' model='pcie-switch-downstream-port'> + <model name='xio3130-downstream'/> + <target chassis='30' port='0x27'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x03' function='0x0'/> + </controller> + <controller type='pci' index='7' model='pcie-switch-upstream-port'> + <model name='x3130-upstream'/> + <address type='pci' domain='0x0000' bus='0x03' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='8' model='pcie-switch-downstream-port'> + <model name='xio3130-downstream'/> + <target chassis='8' port='0x4'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x04' function='0x0'/> + </controller> + <controller type='pci' index='9' model='pcie-switch-downstream-port'> + <model name='xio3130-downstream'/> + <target chassis='9' port='0x5'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x05' function='0x0'/> + </controller> + <controller type='pci' index='10' model='pcie-switch-downstream-port'> + <model name='xio3130-downstream'/> + <target chassis='10' port='0x6'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x06' function='0x0'/> + </controller> + <controller type='sata' index='0'> + <address type='pci' domain='0x0000' bus='0x00' slot='0x1f' function='0x2'/> + </controller> + <controller type='usb' index='0' model='qemu-xhci'> + <address type='pci' domain='0x0000' bus='0x04' slot='0x00' function='0x0'/> + </controller> + <input type='mouse' bus='ps2'/> + <input type='keyboard' bus='ps2'/> + <audio id='1' type='none'/> + <video> + <model type='qxl' ram='65536' vram='32768' vgamem='8192' heads='1' primary='yes'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x0'/> + </video> + <watchdog model='itco' action='reset'/> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-latest.args b/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-latest.args index aa7d9b0a50..992268b30a 100644 --- a/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-latest.args +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-latest.args @@ -27,15 +27,15 @@ XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.config \ -no-shutdown \ -boot strict=on \ -device '{"driver":"pcie-root-port","port":16,"chassis":1,"id":"pci.1","bus":"pcie.0","addr":"0x2"}' \ --device '{"driver":"x3130-upstream","id":"pci.2","bus":"pci.1","addr":"0x0"}' \ --device '{"driver":"xio3130-downstream","port":0,"chassis":3,"id":"pci.3","bus":"pci.2","addr":"0x0"}' \ --device '{"driver":"xio3130-downstream","port":1,"chassis":4,"id":"pci.4","bus":"pci.2","addr":"0x1"}' \ --device '{"driver":"xio3130-downstream","port":2,"chassis":5,"id":"pci.5","bus":"pci.2","addr":"0x2"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.2","bus":"pci.1","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":0,"chassis":3,"id":"pci.3","bus":"pci.2","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":1,"chassis":4,"id":"pci.4","bus":"pci.2","addr":"0x1"}' \ +-device '{"driver":"pcie-downstream-port","port":2,"chassis":5,"id":"pci.5","bus":"pci.2","addr":"0x2"}' \ -device '{"driver":"xio3130-downstream","port":39,"chassis":30,"id":"pci.6","bus":"pci.2","addr":"0x3"}' \ --device '{"driver":"x3130-upstream","id":"pci.7","bus":"pci.3","addr":"0x0"}' \ --device '{"driver":"xio3130-downstream","port":4,"chassis":8,"id":"pci.8","bus":"pci.2","addr":"0x4"}' \ --device '{"driver":"xio3130-downstream","port":5,"chassis":9,"id":"pci.9","bus":"pci.2","addr":"0x5"}' \ --device '{"driver":"xio3130-downstream","port":6,"chassis":10,"id":"pci.10","bus":"pci.2","addr":"0x6"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.7","bus":"pci.3","addr":"0x0"}' \ +-device '{"driver":"pcie-downstream-port","port":4,"chassis":8,"id":"pci.8","bus":"pci.2","addr":"0x4"}' \ +-device '{"driver":"pcie-downstream-port","port":5,"chassis":9,"id":"pci.9","bus":"pci.2","addr":"0x5"}' \ +-device '{"driver":"pcie-downstream-port","port":6,"chassis":10,"id":"pci.10","bus":"pci.2","addr":"0x6"}' \ -device '{"driver":"qemu-xhci","id":"usb","bus":"pci.4","addr":"0x0"}' \ -blockdev '{"driver":"host_device","filename":"/dev/HostVG/QEMUGuest1","node-name":"libvirt-1-storage","read-only":false}' \ -device '{"driver":"ide-hd","bus":"ide.0","drive":"libvirt-1-storage","id":"sata0-0-0","bootindex":1}' \ diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-latest.xml b/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-latest.xml index bc61f27a87..70546b7758 100644 --- a/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-latest.xml +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-latest.xml @@ -30,21 +30,21 @@ <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x0'/> </controller> <controller type='pci' index='2' model='pcie-switch-upstream-port'> - <model name='x3130-upstream'/> + <model name='pcie-upstream-port'/> <address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='3' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='3' port='0x0'/> <address type='pci' domain='0x0000' bus='0x02' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='4' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='4' port='0x1'/> <address type='pci' domain='0x0000' bus='0x02' slot='0x01' function='0x0'/> </controller> <controller type='pci' index='5' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='5' port='0x2'/> <address type='pci' domain='0x0000' bus='0x02' slot='0x02' function='0x0'/> </controller> @@ -54,21 +54,21 @@ <address type='pci' domain='0x0000' bus='0x02' slot='0x03' function='0x0'/> </controller> <controller type='pci' index='7' model='pcie-switch-upstream-port'> - <model name='x3130-upstream'/> + <model name='pcie-upstream-port'/> <address type='pci' domain='0x0000' bus='0x03' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='8' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='8' port='0x4'/> <address type='pci' domain='0x0000' bus='0x02' slot='0x04' function='0x0'/> </controller> <controller type='pci' index='9' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='9' port='0x5'/> <address type='pci' domain='0x0000' bus='0x02' slot='0x05' function='0x0'/> </controller> <controller type='pci' index='10' model='pcie-switch-downstream-port'> - <model name='xio3130-downstream'/> + <model name='pcie-downstream-port'/> <target chassis='10' port='0x6'/> <address type='pci' domain='0x0000' bus='0x02' slot='0x06' function='0x0'/> </controller> diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-11.1.0.err b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-11.1.0.err new file mode 100644 index 0000000000..f2d6932a83 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-11.1.0.err @@ -0,0 +1 @@ +unsupported configuration: The 'pcie-upstream-port' device is not supported by this QEMU binary diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args new file mode 100644 index 0000000000..5ed1f048fe --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args @@ -0,0 +1,42 @@ +LC_ALL=C \ +PATH=/bin \ +HOME=/var/lib/libvirt/qemu/domain--1-q35-test \ +USER=test \ +LOGNAME=test \ +XDG_DATA_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.local/share \ +XDG_CACHE_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.cache \ +XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.config \ +/usr/bin/qemu-system-x86_64 \ +-name guest=q35-test,debug-threads=on \ +-S \ +-object '{"qom-type":"secret","id":"masterKey0","format":"raw","file":"/var/lib/libvirt/qemu/domain--1-q35-test/master-key.aes"}' \ +-machine q35,usb=off,dump-guest-core=off,memory-backend=pc.ram,acpi=off \ +-accel tcg \ +-cpu qemu64 \ +-m size=2097152k \ +-object '{"qom-type":"memory-backend-ram","id":"pc.ram","size":2147483648}' \ +-overcommit mem-lock=off \ +-smp 2,sockets=2,cores=1,threads=1 \ +-uuid 11dbdcdd-4c3b-482b-8903-9bdb8c0a2774 \ +-display none \ +-no-user-config \ +-nodefaults \ +-chardev socket,id=charmonitor,fd=@mon-fd@,server=on,wait=off \ +-object '{"qom-type":"monitor-qmp","id":"monitor","chardev":"charmonitor"}' \ +-rtc base=utc \ +-no-shutdown \ +-boot strict=on \ +-device '{"driver":"pcie-root-port","port":16,"chassis":1,"id":"pci.1","bus":"pcie.0","multifunction":true,"addr":"0x2"}' \ +-device '{"driver":"pcie-root-port","port":17,"chassis":2,"id":"pci.2","bus":"pcie.0","addr":"0x2.0x1"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.3","bus":"pci.1","addr":"0x0"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.4","bus":"pci.2","addr":"0x0"}' \ +-device '{"driver":"pcie-root-port","port":18,"chassis":5,"id":"pci.5","bus":"pcie.0","addr":"0x2.0x2"}' \ +-device '{"driver":"qemu-xhci","id":"usb","bus":"pci.5","addr":"0x0"}' \ +-blockdev '{"driver":"host_device","filename":"/dev/HostVG/QEMUGuest1","node-name":"libvirt-1-storage","read-only":false}' \ +-device '{"driver":"ide-hd","bus":"ide.0","drive":"libvirt-1-storage","id":"sata0-0-0","bootindex":1}' \ +-audiodev '{"id":"audio1","driver":"none"}' \ +-device '{"driver":"qxl-vga","id":"video0","max_outputs":1,"ram_size":67108864,"vram_size":33554432,"vram64_size_mb":0,"vgamem_mb":8,"bus":"pcie.0","addr":"0x1"}' \ +-global ICH9-LPC.noreboot=off \ +-watchdog-action reset \ +-sandbox on,obsolete=deny,elevateprivileges=deny,spawn=deny,resourcecontrol=deny \ +-msg timestamp=on diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml new file mode 100644 index 0000000000..bd276eccb3 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml @@ -0,0 +1,66 @@ +<domain type='qemu'> + <name>q35-test</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static' cpuset='0-1'>2</vcpu> + <os> + <type arch='x86_64' machine='q35'>hvm</type> + <boot dev='hd'/> + </os> + <cpu mode='custom' match='exact' check='none'> + <model fallback='forbid'>qemu64</model> + </cpu> + <clock offset='utc'/> + <on_poweroff>destroy</on_poweroff> + <on_reboot>restart</on_reboot> + <on_crash>destroy</on_crash> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <disk type='block' device='disk'> + <driver name='qemu' type='raw'/> + <source dev='/dev/HostVG/QEMUGuest1'/> + <target dev='sda' bus='sata'/> + <address type='drive' controller='0' bus='0' target='0' unit='0'/> + </disk> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='1' port='0x10'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x0' multifunction='on'/> + </controller> + <controller type='pci' index='2' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='2' port='0x11'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x1'/> + </controller> + <controller type='pci' index='3' model='pcie-switch-upstream-port'> + <model name='pcie-upstream-port'/> + <address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='4' model='pcie-switch-upstream-port'> + <model name='pcie-upstream-port'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='5' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='5' port='0x12'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x2'/> + </controller> + <controller type='sata' index='0'> + <address type='pci' domain='0x0000' bus='0x00' slot='0x1f' function='0x2'/> + </controller> + <controller type='usb' index='0' model='qemu-xhci'> + <address type='pci' domain='0x0000' bus='0x05' slot='0x00' function='0x0'/> + </controller> + <input type='mouse' bus='ps2'/> + <input type='keyboard' bus='ps2'/> + <audio id='1' type='none'/> + <video> + <model type='qxl' ram='65536' vram='32768' vgamem='8192' heads='1' primary='yes'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x0'/> + </video> + <watchdog model='itco' action='reset'/> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml new file mode 100644 index 0000000000..d015b2631e --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml @@ -0,0 +1,37 @@ +<domain type='qemu'> + <name>q35-test</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static' cpuset='0-1'>2</vcpu> + <os> + <type arch='x86_64' machine='q35'>hvm</type> + <boot dev='hd'/> + </os> + <clock offset='utc'/> + <on_poweroff>destroy</on_poweroff> + <on_reboot>restart</on_reboot> + <on_crash>destroy</on_crash> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <disk type='block' device='disk'> + <source dev='/dev/HostVG/QEMUGuest1'/> + <target dev='sda' bus='sata'/> + <address type='drive' controller='0' bus='0' target='0' unit='0'/> + </disk> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'/> + <controller type='pci' index='2' model='pcie-root-port'/> + <controller type='pci' index='3' model='pcie-switch-upstream-port'/> + <controller type='pci' index='4' model='pcie-switch-upstream-port'> + <model name='pcie-upstream-port'/> + </controller> + <controller type='sata' index='0'/> + <input type='mouse' bus='ps2'/> + <input type='keyboard' bus='ps2'/> + <video> + <model type='qxl' ram='65536' vram='32768' vgamem='8192' heads='1'/> + </video> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.args b/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.args new file mode 100644 index 0000000000..2200f8b825 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.args @@ -0,0 +1,42 @@ +LC_ALL=C \ +PATH=/bin \ +HOME=/var/lib/libvirt/qemu/domain--1-q35-test \ +USER=test \ +LOGNAME=test \ +XDG_DATA_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.local/share \ +XDG_CACHE_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.cache \ +XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.config \ +/usr/bin/qemu-system-x86_64 \ +-name guest=q35-test,debug-threads=on \ +-S \ +-object '{"qom-type":"secret","id":"masterKey0","format":"raw","file":"/var/lib/libvirt/qemu/domain--1-q35-test/master-key.aes"}' \ +-machine pc-q35-11.1,usb=off,dump-guest-core=off,memory-backend=pc.ram,acpi=off \ +-accel tcg \ +-cpu qemu64 \ +-m size=2097152k \ +-object '{"qom-type":"memory-backend-ram","id":"pc.ram","size":2147483648}' \ +-overcommit mem-lock=off \ +-smp 2,sockets=2,cores=1,threads=1 \ +-uuid 11dbdcdd-4c3b-482b-8903-9bdb8c0a2774 \ +-display none \ +-no-user-config \ +-nodefaults \ +-chardev socket,id=charmonitor,fd=@mon-fd@,server=on,wait=off \ +-object '{"qom-type":"monitor-qmp","id":"monitor","chardev":"charmonitor"}' \ +-rtc base=utc \ +-no-shutdown \ +-boot strict=on \ +-device '{"driver":"pcie-root-port","port":16,"chassis":1,"id":"pci.1","bus":"pcie.0","multifunction":true,"addr":"0x2"}' \ +-device '{"driver":"pcie-root-port","port":17,"chassis":2,"id":"pci.2","bus":"pcie.0","addr":"0x2.0x1"}' \ +-device '{"driver":"x3130-upstream","id":"pci.3","bus":"pci.1","addr":"0x0"}' \ +-device '{"driver":"x3130-upstream","id":"pci.4","bus":"pci.2","addr":"0x0"}' \ +-device '{"driver":"pcie-root-port","port":18,"chassis":5,"id":"pci.5","bus":"pcie.0","addr":"0x2.0x2"}' \ +-device '{"driver":"qemu-xhci","id":"usb","bus":"pci.5","addr":"0x0"}' \ +-blockdev '{"driver":"host_device","filename":"/dev/HostVG/QEMUGuest1","node-name":"libvirt-1-storage","read-only":false}' \ +-device '{"driver":"ide-hd","bus":"ide.0","drive":"libvirt-1-storage","id":"sata0-0-0","bootindex":1}' \ +-audiodev '{"id":"audio1","driver":"none"}' \ +-device '{"driver":"qxl-vga","id":"video0","max_outputs":1,"ram_size":67108864,"vram_size":33554432,"vram64_size_mb":0,"vgamem_mb":8,"bus":"pcie.0","addr":"0x1"}' \ +-global ICH9-LPC.noreboot=off \ +-watchdog-action reset \ +-sandbox on,obsolete=deny,elevateprivileges=deny,spawn=deny,resourcecontrol=deny \ +-msg timestamp=on diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.xml b/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.xml new file mode 100644 index 0000000000..78e89c4f94 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.xml @@ -0,0 +1,66 @@ +<domain type='qemu'> + <name>q35-test</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static' cpuset='0-1'>2</vcpu> + <os> + <type arch='x86_64' machine='pc-q35-11.1'>hvm</type> + <boot dev='hd'/> + </os> + <cpu mode='custom' match='exact' check='none'> + <model fallback='forbid'>qemu64</model> + </cpu> + <clock offset='utc'/> + <on_poweroff>destroy</on_poweroff> + <on_reboot>restart</on_reboot> + <on_crash>destroy</on_crash> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <disk type='block' device='disk'> + <driver name='qemu' type='raw'/> + <source dev='/dev/HostVG/QEMUGuest1'/> + <target dev='sda' bus='sata'/> + <address type='drive' controller='0' bus='0' target='0' unit='0'/> + </disk> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='1' port='0x10'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x0' multifunction='on'/> + </controller> + <controller type='pci' index='2' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='2' port='0x11'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x1'/> + </controller> + <controller type='pci' index='3' model='pcie-switch-upstream-port'> + <model name='x3130-upstream'/> + <address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='4' model='pcie-switch-upstream-port'> + <model name='x3130-upstream'/> + <address type='pci' domain='0x0000' bus='0x02' slot='0x00' function='0x0'/> + </controller> + <controller type='pci' index='5' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='5' port='0x12'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x2'/> + </controller> + <controller type='sata' index='0'> + <address type='pci' domain='0x0000' bus='0x00' slot='0x1f' function='0x2'/> + </controller> + <controller type='usb' index='0' model='qemu-xhci'> + <address type='pci' domain='0x0000' bus='0x05' slot='0x00' function='0x0'/> + </controller> + <input type='mouse' bus='ps2'/> + <input type='keyboard' bus='ps2'/> + <audio id='1' type='none'/> + <video> + <model type='qxl' ram='65536' vram='32768' vgamem='8192' heads='1' primary='yes'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x0'/> + </video> + <watchdog model='itco' action='reset'/> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-latest.args b/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-latest.args index 9b9c0ded5d..dfcfd1fa7e 100644 --- a/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-latest.args +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-latest.args @@ -28,7 +28,7 @@ XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.config \ -boot strict=on \ -device '{"driver":"pcie-root-port","port":16,"chassis":1,"id":"pci.1","bus":"pcie.0","multifunction":true,"addr":"0x2"}' \ -device '{"driver":"pcie-root-port","port":17,"chassis":2,"id":"pci.2","bus":"pcie.0","addr":"0x2.0x1"}' \ --device '{"driver":"x3130-upstream","id":"pci.3","bus":"pci.1","addr":"0x0"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.3","bus":"pci.1","addr":"0x0"}' \ -device '{"driver":"x3130-upstream","id":"pci.4","bus":"pci.2","addr":"0x0"}' \ -device '{"driver":"pcie-root-port","port":18,"chassis":5,"id":"pci.5","bus":"pcie.0","addr":"0x2.0x2"}' \ -device '{"driver":"qemu-xhci","id":"usb","bus":"pci.5","addr":"0x0"}' \ diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-latest.xml b/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-latest.xml index 1c92ca3cd6..8fa7dc1bfa 100644 --- a/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-latest.xml +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-latest.xml @@ -35,7 +35,7 @@ <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x1'/> </controller> <controller type='pci' index='3' model='pcie-switch-upstream-port'> - <model name='x3130-upstream'/> + <model name='pcie-upstream-port'/> <address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='4' model='pcie-switch-upstream-port'> diff --git a/tests/qemuxmlconftest.c b/tests/qemuxmlconftest.c index 555c029f58..51d6b94fe6 100644 --- a/tests/qemuxmlconftest.c +++ b/tests/qemuxmlconftest.c @@ -2785,7 +2785,13 @@ mymain(void) DO_TEST_CAPS_LATEST_PARSE_ERROR("pcie-root-port-too-many"); DO_TEST_CAPS_LATEST("pcie-switch-upstream-port"); + DO_TEST_CAPS_VER("pcie-switch-upstream-port", "11.1.0"); + DO_TEST_CAPS_LATEST("pcie-switch-upstream-port-model-generic"); + DO_TEST_CAPS_VER_PARSE_ERROR("pcie-switch-upstream-port-model-generic", "11.1.0"); DO_TEST_CAPS_LATEST("pcie-switch-downstream-port"); + DO_TEST_CAPS_VER("pcie-switch-downstream-port", "11.1.0"); + DO_TEST_CAPS_LATEST("pcie-switch-downstream-port-model-generic"); + DO_TEST_CAPS_VER_PARSE_ERROR("pcie-switch-downstream-port-model-generic", "11.1.0"); DO_TEST_CAPS_LATEST("pci-expander-bus"); DO_TEST_CAPS_LATEST_PARSE_ERROR("pci-expander-bus-bad-node"); -- 2.43.0
The pcie-root-port device in (the future) QEMU 11.2 supports "width" and "speed" properties for setting the (apparent) link bandwidth. The new pcie-upstream-port and pcie-downstream-port devices always support these properties. See also QEMU commit 432b3f707a3c (hw/pci-bridge: Make speed and width for PCIe ports non-experimental). Signed-off-by: David Vrabel <david.vrabel@nutanix.com> --- src/qemu/qemu_capabilities.c | 6 ++++++ src/qemu/qemu_capabilities.h | 4 ++++ tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml | 2 ++ 3 files changed, 12 insertions(+) diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c index de03a515d1..d8217bd72e 100644 --- a/src/qemu/qemu_capabilities.c +++ b/src/qemu/qemu_capabilities.c @@ -778,6 +778,10 @@ VIR_ENUM_IMPL(virQEMUCaps, "win-dmp.guest-aware", /* QEMU_CAPS_WIN_DMP_GUEST_AWARE */ "pcie-upstream-port", /* QEMU_CAPS_DEVICE_PCIE_UPSTREAM_PORT */ "pcie-downstream-port", /* QEMU_CAPS_DEVICE_PCIE_DOWNSTREAM_PORT */ + + /* 505 */ + "pcie-root-port.speed", /* QEMU_CAPS_PCIE_ROOT_PORT_SPEED */ + "pcie-root-port.width", /* QEMU_CAPS_PCIE_ROOT_PORT_WIDTH */ ); @@ -1542,6 +1546,8 @@ static struct virQEMUCapsDevicePropsFlags virQEMUCapsDevicePropsVirtioNet[] = { static struct virQEMUCapsDevicePropsFlags virQEMUCapsDevicePropsPCIeRootPort[] = { { "hotplug", QEMU_CAPS_PCIE_ROOT_PORT_HOTPLUG, NULL }, + { "speed", QEMU_CAPS_PCIE_ROOT_PORT_SPEED, NULL }, + { "width", QEMU_CAPS_PCIE_ROOT_PORT_WIDTH, NULL }, }; static struct virQEMUCapsDevicePropsFlags virQEMUCapsDevicePropsUSBHost[] = { diff --git a/src/qemu/qemu_capabilities.h b/src/qemu/qemu_capabilities.h index 4ee10f18bb..18a21dfaff 100644 --- a/src/qemu/qemu_capabilities.h +++ b/src/qemu/qemu_capabilities.h @@ -753,6 +753,10 @@ typedef enum { /* virQEMUCapsFlags grouping marker for syntax-check */ QEMU_CAPS_DEVICE_PCIE_UPSTREAM_PORT, /* -device pcie-upstream-port */ QEMU_CAPS_DEVICE_PCIE_DOWNSTREAM_PORT, /* -device pcie-downstream-port */ + /* 505 */ + QEMU_CAPS_PCIE_ROOT_PORT_SPEED, /* pcie-root-port.speed */ + QEMU_CAPS_PCIE_ROOT_PORT_WIDTH, /* pcie-root-port.width */ + QEMU_CAPS_LAST /* this must always be the last item */ } virQEMUCapsFlags; diff --git a/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml b/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml index d30e487094..e5ba4520bd 100644 --- a/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_11.2.0_x86_64.xml @@ -227,6 +227,8 @@ <flag name='win-dmp.guest-aware'/> <flag name='pcie-upstream-port'/> <flag name='pcie-downstream-port'/> + <flag name='pcie-root-port.speed'/> + <flag name='pcie-root-port.width'/> <version>11001050</version> <microcodeVersion>43100288</microcodeVersion> <package>v11.1.0-1950-gf7ada39eda</package> -- 2.43.0
Add speed/width target attributes for the generic PCIe root and switch ports to set the link speed/width capability. This is useful when used with passthrough devices to make the in-guest apparent bandwidth match the hardware bandwidth. This allows in-guest software (such as NCCL) to make better decisions about whether to use P2P transfers etc. Signed-off-by: David Vrabel <david.vrabel@nutanix.com> --- docs/formatdomain.rst | 25 ++++++- src/conf/domain_conf.c | 40 +++++++++++ src/conf/domain_conf.h | 30 ++++++++ src/conf/schemas/domaincommon.rng | 24 +++++++ src/libvirt_private.syms | 4 ++ src/qemu/qemu_command.c | 32 +++++++++ src/qemu/qemu_validate.c | 69 +++++++++++++++++++ .../pci-bridge-speed.x86_64-latest.err | 1 + tests/qemuxmlconfdata/pci-bridge-speed.xml | 18 +++++ ...-root-port-speed-ioh3420.x86_64-latest.err | 1 + .../pcie-root-port-speed-ioh3420.xml | 19 +++++ ...ie-root-port-speed-width.x86_64-11.0.0.err | 1 + ...e-root-port-speed-width.x86_64-latest.args | 37 ++++++++++ ...ie-root-port-speed-width.x86_64-latest.xml | 48 +++++++++++++ .../pcie-root-port-speed-width.xml | 23 +++++++ ...ream-port-model-generic.x86_64-latest.args | 2 +- ...tream-port-model-generic.x86_64-latest.xml | 2 +- ...e-switch-downstream-port-model-generic.xml | 2 +- ...tream-port-width-xio3130.x86_64-latest.err | 1 + ...e-switch-downstream-port-width-xio3130.xml | 23 +++++++ ...ream-port-model-generic.x86_64-latest.args | 2 +- ...tream-port-model-generic.x86_64-latest.xml | 1 + ...cie-switch-upstream-port-model-generic.xml | 1 + tests/qemuxmlconftest.c | 5 ++ 24 files changed, 405 insertions(+), 6 deletions(-) create mode 100644 tests/qemuxmlconfdata/pci-bridge-speed.x86_64-latest.err create mode 100644 tests/qemuxmlconfdata/pci-bridge-speed.xml create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.x86_64-latest.err create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.xml create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-11.0.0.err create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.args create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.xml create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.x86_64-latest.err create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.xml diff --git a/docs/formatdomain.rst b/docs/formatdomain.rst index 2160cb4802..77cd6b504b 100644 --- a/docs/formatdomain.rst +++ b/docs/formatdomain.rst @@ -4633,6 +4633,26 @@ generated by libvirt. :since:`Since 1.2.19 (QEMU only)`. reserve more memory (in KiB) so that such PCI device can be hot plugged. For cold plugged PCI devices, the firmware will automatically reserve the correct amount of memory. :since:`Since 10.3.0` +``speed`` + pcie-root-port, pcie-switch-upstream-port, and + pcie-switch-downstream-port controllers can also have a ``speed`` attribute + in the ``<target>`` subelement, which controls the PCIe link speed capability + visible to the guest (in GT/s). Supported values are 2.5, 5, 8, 16, 32, + and 64. This is only supported by the ``pcie-root-port``, + ``pcie-upstream-port``, and ``pcie-downstream-port`` models (see + ``<model>`` above). If omitted, the hypervisor default is used, which for + QEMU depends on its version and the machine type. + :since:`Since 12.10.0 (QEMU only)` +``width`` + pcie-root-port, pcie-switch-upstream-port, and + pcie-switch-downstream-port controllers can also have a ``width`` attribute + in the ``<target>`` subelement, which controls the PCIe link width (number of + lanes) capability visible to the guest. Supported values are 1, 2, 4, 8, 16, + and 32. This is only supported by the ``pcie-root-port``, + ``pcie-upstream-port``, and ``pcie-downstream-port`` models (see + ``<model>`` above). If omitted, the hypervisor default is used, which for + QEMU depends on its version and the machine type. + :since:`Since 12.10.0 (QEMU only)` For machine types which provide an implicit PCI bus, the pci-root controller with index=0 is auto-added and required to use PCI devices. pci-root has no @@ -4699,8 +4719,9 @@ By default, QEMU's generic ``pcie-upstream-port`` and ``pcie-downstream-port`` devices are used for pcie-switch-upstream-port and pcie-switch-downstream-port controllers if the QEMU binary supports them; otherwise the ``x3130-upstream`` and ``xio3130-downstream`` devices (which emulate a TI XIO3130 switch limited -to a 2.5 GT/s x1 link) are used. Existing domains keep the model recorded in -their configuration. :since:`Since 12.10.0` +to a 2.5 GT/s x1 link) are used. The generic devices also support the +``speed`` and ``width`` target attributes. Existing domains keep the model +recorded in their configuration. :since:`Since 12.10.0` :: diff --git a/src/conf/domain_conf.c b/src/conf/domain_conf.c index 14cdc43b37..f3179926c9 100644 --- a/src/conf/domain_conf.c +++ b/src/conf/domain_conf.c @@ -458,6 +458,28 @@ VIR_ENUM_IMPL(virDomainControllerPCIModelName, "pcie-pci-bridge", ); +VIR_ENUM_IMPL(virDomainControllerPCILinkSpeed, + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_LAST, + "default", + "2.5", + "5", + "8", + "16", + "32", + "64", +); + +VIR_ENUM_IMPL(virDomainControllerPCILinkWidth, + VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_LAST, + "default", + "1", + "2", + "4", + "8", + "16", + "32", +); + VIR_ENUM_IMPL(virDomainControllerModelSCSI, VIR_DOMAIN_CONTROLLER_MODEL_SCSI_LAST, "auto", @@ -9233,6 +9255,18 @@ virDomainControllerDefParseXML(virDomainXMLOption *xmlopt, def->opts.pciopts.port) < 0) return NULL; + if (virXMLPropEnum(targetNodes[0], "speed", + virDomainControllerPCILinkSpeedTypeFromString, + VIR_XML_PROP_NONZERO, + &def->opts.pciopts.speed) < 0) + return NULL; + + if (virXMLPropEnum(targetNodes[0], "width", + virDomainControllerPCILinkWidthTypeFromString, + VIR_XML_PROP_NONZERO, + &def->opts.pciopts.width) < 0) + return NULL; + if (virXMLPropInt(targetNodes[0], "busNr", 0, VIR_XML_PROP_NONNEGATIVE, &def->opts.pciopts.busNr, def->opts.pciopts.busNr) < 0) @@ -25019,6 +25053,12 @@ virDomainControllerDefFormatPCI(virBuffer *buf, virBufferAsprintf(&targetAttrBuf, " chassis='%d'", def->opts.pciopts.chassis); if (def->opts.pciopts.port != -1) virBufferAsprintf(&targetAttrBuf, " port='0x%x'", def->opts.pciopts.port); + if (def->opts.pciopts.speed != VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_DEFAULT) + virBufferAsprintf(&targetAttrBuf, " speed='%s'", + virDomainControllerPCILinkSpeedTypeToString(def->opts.pciopts.speed)); + if (def->opts.pciopts.width != VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_DEFAULT) + virBufferAsprintf(&targetAttrBuf, " width='%s'", + virDomainControllerPCILinkWidthTypeToString(def->opts.pciopts.width)); if (def->opts.pciopts.busNr != -1) virBufferAsprintf(&targetAttrBuf, " busNr='%d'", def->opts.pciopts.busNr); if (def->opts.pciopts.targetIndex != -1) diff --git a/src/conf/domain_conf.h b/src/conf/domain_conf.h index c3aa558923..fe56a36155 100644 --- a/src/conf/domain_conf.h +++ b/src/conf/domain_conf.h @@ -670,6 +670,30 @@ typedef enum { VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_LAST } virDomainControllerPCIModelName; +typedef enum { + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_DEFAULT = 0, + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_2_5, + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_5, + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_8, + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_16, + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_32, + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_64, + + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_LAST +} virDomainControllerPCILinkSpeed; + +typedef enum { + VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_DEFAULT = 0, + VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_1, + VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_2, + VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_4, + VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_8, + VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_16, + VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_32, + + VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_LAST +} virDomainControllerPCILinkWidth; + typedef enum { VIR_DOMAIN_CONTROLLER_MODEL_SCSI_DEFAULT = -1, VIR_DOMAIN_CONTROLLER_MODEL_SCSI_AUTO, @@ -767,6 +791,10 @@ struct _virDomainPCIControllerOpts { * pcie-root-port/pcie-switch-downstream-port, -1 = unspecified */ int chassis; int port; + /* speed & width used by pcie-root-port/pcie-switch-upstream-port/ + * pcie-switch-downstream-port */ + virDomainControllerPCILinkSpeed speed; + virDomainControllerPCILinkWidth width; int busNr; /* used by pci-expander-bus, -1 == unspecified */ int targetIndex; /* used by spapr-pci-host-bridge, -1 == unspecified */ /* numaNode is a *subelement* of target (to match existing @@ -4434,6 +4462,8 @@ VIR_ENUM_DECL(virDomainDiskMirrorState); VIR_ENUM_DECL(virDomainController); VIR_ENUM_DECL(virDomainControllerModelPCI); VIR_ENUM_DECL(virDomainControllerPCIModelName); +VIR_ENUM_DECL(virDomainControllerPCILinkSpeed); +VIR_ENUM_DECL(virDomainControllerPCILinkWidth); VIR_ENUM_DECL(virDomainControllerModelSCSI); VIR_ENUM_DECL(virDomainControllerModelUSB); VIR_ENUM_DECL(virDomainControllerModelIDE); diff --git a/src/conf/schemas/domaincommon.rng b/src/conf/schemas/domaincommon.rng index c1dee5470e..4f02b9fabb 100644 --- a/src/conf/schemas/domaincommon.rng +++ b/src/conf/schemas/domaincommon.rng @@ -3113,6 +3113,30 @@ <ref name="uint8"/> </attribute> </optional> + <optional> + <attribute name="speed"> + <choice> + <value>2.5</value> + <value>5</value> + <value>8</value> + <value>16</value> + <value>32</value> + <value>64</value> + </choice> + </attribute> + </optional> + <optional> + <attribute name="width"> + <choice> + <value>1</value> + <value>2</value> + <value>4</value> + <value>8</value> + <value>16</value> + <value>32</value> + </choice> + </attribute> + </optional> <optional> <attribute name="busNr"> <ref name="uint8"/> diff --git a/src/libvirt_private.syms b/src/libvirt_private.syms index 798d2d28c8..47ba4acf95 100644 --- a/src/libvirt_private.syms +++ b/src/libvirt_private.syms @@ -302,6 +302,10 @@ virDomainControllerModelSCSITypeFromString; virDomainControllerModelSCSITypeToString; virDomainControllerModelUSBTypeFromString; virDomainControllerModelUSBTypeToString; +virDomainControllerPCILinkSpeedTypeFromString; +virDomainControllerPCILinkSpeedTypeToString; +virDomainControllerPCILinkWidthTypeFromString; +virDomainControllerPCILinkWidthTypeToString; virDomainControllerPCIModelNameTypeFromString; virDomainControllerPCIModelNameTypeToString; virDomainControllerRemove; diff --git a/src/qemu/qemu_command.c b/src/qemu/qemu_command.c index 9adb18be4f..a27425d8da 100644 --- a/src/qemu/qemu_command.c +++ b/src/qemu/qemu_command.c @@ -182,6 +182,19 @@ qemuOnOffAuto(virTristateSwitch s) } +VIR_ENUM_DECL(qemuControllerPCILinkSpeed); +VIR_ENUM_IMPL(qemuControllerPCILinkSpeed, + VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_LAST, + "", /* default value, we shouldn't see this */ + "2_5", + "5", + "8", + "16", + "32", + "64", +); + + static int qemuBuildObjectCommandlineFromJSON(virCommand *cmd, virJSONValue *props) @@ -2790,6 +2803,25 @@ qemuBuildControllerPCIDevProps(virDomainControllerDef *def, return -1; } + /* Options common to all PCIe ports. */ + if (def->model == VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT_PORT || + def->model == VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_UPSTREAM_PORT || + def->model == VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT) { + if (pciopts->speed != VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_DEFAULT) { + const char *speedstr = qemuControllerPCILinkSpeedTypeToString(pciopts->speed); + + if (virJSONValueObjectAdd(&props, "s:speed", speedstr, NULL) < 0) + return -1; + } + + if (pciopts->width != VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_DEFAULT) { + const char *widthstr = virDomainControllerPCILinkWidthTypeToString(pciopts->width); + + if (virJSONValueObjectAdd(&props, "s:width", widthstr, NULL) < 0) + return -1; + } + } + *devprops = g_steal_pointer(&props); return 0; } diff --git a/src/qemu/qemu_validate.c b/src/qemu/qemu_validate.c index ffd05fe765..04f33df7eb 100644 --- a/src/qemu/qemu_validate.c +++ b/src/qemu/qemu_validate.c @@ -4275,6 +4275,15 @@ virValidateControllerPCIModelNameToQEMUCaps(int modelName) } +static bool +qemuValidateControllerPCIModelNameHasLinkProps(virDomainControllerPCIModelName modelName) +{ + return modelName == VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_ROOT_PORT || + modelName == VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_UPSTREAM_PORT || + modelName == VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_DOWNSTREAM_PORT; +} + + static int qemuValidateDomainDeviceDefControllerAttributes(const virDomainControllerDef *controller) { @@ -4765,6 +4774,66 @@ qemuValidateDomainDeviceDefControllerPCI(const virDomainControllerDef *cont, return -1; } + /* speed and width */ + switch ((virDomainControllerModelPCI) cont->model) { + case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT_PORT: + case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_UPSTREAM_PORT: + case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT: + if (pciopts->speed != VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_DEFAULT) { + if (!qemuValidateControllerPCIModelNameHasLinkProps(pciopts->modelName)) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, + _("setting the 'speed' property on a '%1$s' device is not supported"), + modelName); + return -1; + } + if (pciopts->modelName == VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_ROOT_PORT && + !virQEMUCapsGet(qemuCaps, QEMU_CAPS_PCIE_ROOT_PORT_SPEED)) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, + _("setting the 'speed' property on a '%1$s' device is not supported by this QEMU binary"), + modelName); + return -1; + } + } + + if (pciopts->width != VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_DEFAULT) { + if (!qemuValidateControllerPCIModelNameHasLinkProps(pciopts->modelName)) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, + _("setting the 'width' property on a '%1$s' device is not supported"), + modelName); + return -1; + } + if (pciopts->modelName == VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_PCIE_ROOT_PORT && + !virQEMUCapsGet(qemuCaps, QEMU_CAPS_PCIE_ROOT_PORT_WIDTH)) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, + _("setting the 'width' property on a '%1$s' device is not supported by this QEMU binary"), + modelName); + return -1; + } + } + break; + case VIR_DOMAIN_CONTROLLER_MODEL_PCI_ROOT: + case VIR_DOMAIN_CONTROLLER_MODEL_PCI_BRIDGE: + case VIR_DOMAIN_CONTROLLER_MODEL_DMI_TO_PCI_BRIDGE: + case VIR_DOMAIN_CONTROLLER_MODEL_PCI_EXPANDER_BUS: + case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_EXPANDER_BUS: + case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT: + case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_TO_PCI_BRIDGE: + if (pciopts->speed != VIR_DOMAIN_CONTROLLER_PCI_LINK_SPEED_DEFAULT) { + virReportControllerInvalidOption(cont, model, modelName, "speed"); + return -1; + } + if (pciopts->width != VIR_DOMAIN_CONTROLLER_PCI_LINK_WIDTH_DEFAULT) { + virReportControllerInvalidOption(cont, model, modelName, "width"); + return -1; + } + break; + case VIR_DOMAIN_CONTROLLER_MODEL_PCI_DEFAULT: + case VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST: + default: + virReportEnumRangeError(virDomainControllerModelPCI, cont->model); + return -1; + } + /* hotplug */ if (pciopts->hotplug != VIR_TRISTATE_SWITCH_ABSENT) { switch ((virDomainControllerModelPCI) cont->model) { diff --git a/tests/qemuxmlconfdata/pci-bridge-speed.x86_64-latest.err b/tests/qemuxmlconfdata/pci-bridge-speed.x86_64-latest.err new file mode 100644 index 0000000000..01742d8110 --- /dev/null +++ b/tests/qemuxmlconfdata/pci-bridge-speed.x86_64-latest.err @@ -0,0 +1 @@ +unsupported configuration: Option 'speed' is not valid for PCI controller with index '1', model 'pci-bridge' and modelName 'pci-bridge' diff --git a/tests/qemuxmlconfdata/pci-bridge-speed.xml b/tests/qemuxmlconfdata/pci-bridge-speed.xml new file mode 100644 index 0000000000..336c630f58 --- /dev/null +++ b/tests/qemuxmlconfdata/pci-bridge-speed.xml @@ -0,0 +1,18 @@ +<domain type='qemu'> + <name>guest</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static'>2</vcpu> + <os> + <type arch='x86_64' machine='pc'>hvm</type> + </os> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <controller type='pci' index='0' model='pci-root'/> + <controller type='pci' index='1' model='pci-bridge'> + <target speed='16'/> + </controller> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.x86_64-latest.err b/tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.x86_64-latest.err new file mode 100644 index 0000000000..55ae4423fa --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.x86_64-latest.err @@ -0,0 +1 @@ +unsupported configuration: setting the 'speed' property on a 'ioh3420' device is not supported diff --git a/tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.xml b/tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.xml new file mode 100644 index 0000000000..d06faee66d --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.xml @@ -0,0 +1,19 @@ +<domain type='qemu'> + <name>guest</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static'>2</vcpu> + <os> + <type arch='x86_64' machine='q35'>hvm</type> + </os> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'> + <model name='ioh3420'/> + <target speed='16'/> + </controller> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-11.0.0.err b/tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-11.0.0.err new file mode 100644 index 0000000000..05b799a9e9 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-11.0.0.err @@ -0,0 +1 @@ +unsupported configuration: setting the 'speed' property on a 'pcie-root-port' device is not supported by this QEMU binary diff --git a/tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.args b/tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.args new file mode 100644 index 0000000000..a31e0903bc --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.args @@ -0,0 +1,37 @@ +LC_ALL=C \ +PATH=/bin \ +HOME=/var/lib/libvirt/qemu/domain--1-guest \ +USER=test \ +LOGNAME=test \ +XDG_DATA_HOME=/var/lib/libvirt/qemu/domain--1-guest/.local/share \ +XDG_CACHE_HOME=/var/lib/libvirt/qemu/domain--1-guest/.cache \ +XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-guest/.config \ +/usr/bin/qemu-system-x86_64 \ +-name guest=guest,debug-threads=on \ +-S \ +-object '{"qom-type":"secret","id":"masterKey0","format":"raw","file":"/var/lib/libvirt/qemu/domain--1-guest/master-key.aes"}' \ +-machine q35,usb=off,dump-guest-core=off,memory-backend=pc.ram,acpi=off \ +-accel tcg \ +-cpu qemu64 \ +-m size=2097152k \ +-object '{"qom-type":"memory-backend-ram","id":"pc.ram","size":2147483648}' \ +-overcommit mem-lock=off \ +-smp 2,sockets=2,cores=1,threads=1 \ +-uuid 11dbdcdd-4c3b-482b-8903-9bdb8c0a2774 \ +-display none \ +-no-user-config \ +-nodefaults \ +-chardev socket,id=charmonitor,fd=@mon-fd@,server=on,wait=off \ +-object '{"qom-type":"monitor-qmp","id":"monitor","chardev":"charmonitor"}' \ +-rtc base=utc \ +-no-shutdown \ +-boot strict=on \ +-device '{"driver":"pcie-root-port","port":8,"chassis":1,"id":"pci.1","bus":"pcie.0","multifunction":true,"addr":"0x1"}' \ +-device '{"driver":"pcie-root-port","port":9,"chassis":2,"id":"pci.2","speed":"16","width":"8","bus":"pcie.0","addr":"0x1.0x1"}' \ +-device '{"driver":"ioh3420","port":10,"chassis":3,"id":"pci.3","bus":"pcie.0","addr":"0x1.0x2"}' \ +-device '{"driver":"qemu-xhci","id":"usb","bus":"pci.1","addr":"0x0"}' \ +-audiodev '{"id":"audio1","driver":"none"}' \ +-global ICH9-LPC.noreboot=off \ +-watchdog-action reset \ +-sandbox on,obsolete=deny,elevateprivileges=deny,spawn=deny,resourcecontrol=deny \ +-msg timestamp=on diff --git a/tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.xml b/tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.xml new file mode 100644 index 0000000000..cf6e0f936f --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.xml @@ -0,0 +1,48 @@ +<domain type='qemu'> + <name>guest</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static'>2</vcpu> + <os> + <type arch='x86_64' machine='q35'>hvm</type> + <boot dev='hd'/> + </os> + <cpu mode='custom' match='exact' check='none'> + <model fallback='forbid'>qemu64</model> + </cpu> + <clock offset='utc'/> + <on_poweroff>destroy</on_poweroff> + <on_reboot>restart</on_reboot> + <on_crash>destroy</on_crash> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='1' port='0x8'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x0' multifunction='on'/> + </controller> + <controller type='pci' index='2' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target chassis='2' port='0x9' speed='16' width='8'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x1'/> + </controller> + <controller type='pci' index='3' model='pcie-root-port'> + <model name='ioh3420'/> + <target chassis='3' port='0xa'/> + <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x2'/> + </controller> + <controller type='usb' index='0' model='qemu-xhci'> + <address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/> + </controller> + <controller type='sata' index='0'> + <address type='pci' domain='0x0000' bus='0x00' slot='0x1f' function='0x2'/> + </controller> + <input type='mouse' bus='ps2'/> + <input type='keyboard' bus='ps2'/> + <audio id='1' type='none'/> + <watchdog model='itco' action='reset'/> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-root-port-speed-width.xml b/tests/qemuxmlconfdata/pcie-root-port-speed-width.xml new file mode 100644 index 0000000000..5581730709 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-root-port-speed-width.xml @@ -0,0 +1,23 @@ +<domain type='qemu'> + <name>guest</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static'>2</vcpu> + <os> + <type arch='x86_64' machine='q35'>hvm</type> + </os> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'/> + <controller type='pci' index='2' model='pcie-root-port'> + <model name='pcie-root-port'/> + <target speed='16' width='8'/> + </controller> + <controller type='pci' index='3' model='pcie-root-port'> + <model name='ioh3420'/> + </controller> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args index 024895a9f2..9892050405 100644 --- a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args @@ -31,7 +31,7 @@ XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.config \ -device '{"driver":"pcie-downstream-port","port":0,"chassis":3,"id":"pci.3","bus":"pci.2","addr":"0x0"}' \ -device '{"driver":"pcie-downstream-port","port":1,"chassis":4,"id":"pci.4","bus":"pci.2","addr":"0x1"}' \ -device '{"driver":"pcie-downstream-port","port":2,"chassis":5,"id":"pci.5","bus":"pci.2","addr":"0x2"}' \ --device '{"driver":"pcie-downstream-port","port":39,"chassis":30,"id":"pci.6","bus":"pci.2","addr":"0x3"}' \ +-device '{"driver":"pcie-downstream-port","port":39,"chassis":30,"id":"pci.6","speed":"16","width":"8","bus":"pci.2","addr":"0x3"}' \ -device '{"driver":"pcie-upstream-port","id":"pci.7","bus":"pci.3","addr":"0x0"}' \ -device '{"driver":"pcie-downstream-port","port":4,"chassis":8,"id":"pci.8","bus":"pci.2","addr":"0x4"}' \ -device '{"driver":"pcie-downstream-port","port":5,"chassis":9,"id":"pci.9","bus":"pci.2","addr":"0x5"}' \ diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml index d4ca578b42..e810c82e65 100644 --- a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml @@ -50,7 +50,7 @@ </controller> <controller type='pci' index='6' model='pcie-switch-downstream-port'> <model name='pcie-downstream-port'/> - <target chassis='30' port='0x27'/> + <target chassis='30' port='0x27' speed='16' width='8'/> <address type='pci' domain='0x0000' bus='0x02' slot='0x03' function='0x0'/> </controller> <controller type='pci' index='7' model='pcie-switch-upstream-port'> diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml index 19d5e96233..d0cb8e9939 100644 --- a/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml @@ -27,7 +27,7 @@ <controller type='pci' index='5' model='pcie-switch-downstream-port'/> <controller type='pci' index='6' model='pcie-switch-downstream-port'> <model name='pcie-downstream-port'/> - <target chassis='30' port='0x27'/> + <target chassis='30' port='0x27' speed='16' width='8'/> </controller> <controller type='pci' index='7' model='pcie-switch-upstream-port'/> <controller type='pci' index='8' model='pcie-switch-downstream-port'/> diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.x86_64-latest.err b/tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.x86_64-latest.err new file mode 100644 index 0000000000..38c97b77b6 --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.x86_64-latest.err @@ -0,0 +1 @@ +unsupported configuration: setting the 'width' property on a 'xio3130-downstream' device is not supported diff --git a/tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.xml b/tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.xml new file mode 100644 index 0000000000..d83bea51dc --- /dev/null +++ b/tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.xml @@ -0,0 +1,23 @@ +<domain type='qemu'> + <name>guest</name> + <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid> + <memory unit='KiB'>2097152</memory> + <currentMemory unit='KiB'>2097152</currentMemory> + <vcpu placement='static'>2</vcpu> + <os> + <type arch='x86_64' machine='q35'>hvm</type> + </os> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='pci' index='1' model='pcie-root-port'/> + <controller type='pci' index='2' model='pcie-switch-upstream-port'> + <model name='x3130-upstream'/> + </controller> + <controller type='pci' index='3' model='pcie-switch-downstream-port'> + <model name='xio3130-downstream'/> + <target width='8'/> + </controller> + <memballoon model='none'/> + </devices> +</domain> diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args index 5ed1f048fe..d551ca070f 100644 --- a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args @@ -29,7 +29,7 @@ XDG_CONFIG_HOME=/var/lib/libvirt/qemu/domain--1-q35-test/.config \ -device '{"driver":"pcie-root-port","port":16,"chassis":1,"id":"pci.1","bus":"pcie.0","multifunction":true,"addr":"0x2"}' \ -device '{"driver":"pcie-root-port","port":17,"chassis":2,"id":"pci.2","bus":"pcie.0","addr":"0x2.0x1"}' \ -device '{"driver":"pcie-upstream-port","id":"pci.3","bus":"pci.1","addr":"0x0"}' \ --device '{"driver":"pcie-upstream-port","id":"pci.4","bus":"pci.2","addr":"0x0"}' \ +-device '{"driver":"pcie-upstream-port","id":"pci.4","speed":"16","width":"8","bus":"pci.2","addr":"0x0"}' \ -device '{"driver":"pcie-root-port","port":18,"chassis":5,"id":"pci.5","bus":"pcie.0","addr":"0x2.0x2"}' \ -device '{"driver":"qemu-xhci","id":"usb","bus":"pci.5","addr":"0x0"}' \ -blockdev '{"driver":"host_device","filename":"/dev/HostVG/QEMUGuest1","node-name":"libvirt-1-storage","read-only":false}' \ diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml index bd276eccb3..07027c2f6d 100644 --- a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml @@ -40,6 +40,7 @@ </controller> <controller type='pci' index='4' model='pcie-switch-upstream-port'> <model name='pcie-upstream-port'/> + <target speed='16' width='8'/> <address type='pci' domain='0x0000' bus='0x02' slot='0x00' function='0x0'/> </controller> <controller type='pci' index='5' model='pcie-root-port'> diff --git a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml index d015b2631e..b46e895d41 100644 --- a/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml +++ b/tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml @@ -25,6 +25,7 @@ <controller type='pci' index='3' model='pcie-switch-upstream-port'/> <controller type='pci' index='4' model='pcie-switch-upstream-port'> <model name='pcie-upstream-port'/> + <target speed='16' width='8'/> </controller> <controller type='sata' index='0'/> <input type='mouse' bus='ps2'/> diff --git a/tests/qemuxmlconftest.c b/tests/qemuxmlconftest.c index 51d6b94fe6..ca64f89d4c 100644 --- a/tests/qemuxmlconftest.c +++ b/tests/qemuxmlconftest.c @@ -2770,6 +2770,11 @@ mymain(void) * based on QEMU binary capabilities. We use x86/q35 for the test, but * any PCIe machine type (such as aarch64/virt) will behave the same */ DO_TEST_CAPS_LATEST("pcie-root-port-model-generic"); + DO_TEST_CAPS_LATEST("pcie-root-port-speed-width"); + DO_TEST_CAPS_VER_PARSE_ERROR("pcie-root-port-speed-width", "11.0.0"); + DO_TEST_CAPS_LATEST_PARSE_ERROR("pcie-root-port-speed-ioh3420"); + DO_TEST_CAPS_LATEST_PARSE_ERROR("pcie-switch-downstream-port-width-xio3130"); + DO_TEST_CAPS_LATEST_PARSE_ERROR("pci-bridge-speed"); DO_TEST_CAPS_LATEST("pcie-root-port-model-ioh3420"); DO_TEST_CAPS_LATEST("pcie-root-port-nohotplug"); -- 2.43.0
Signed-off-by: David Vrabel <david.vrabel@nutanix.com> --- NEWS.rst | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/NEWS.rst b/NEWS.rst index 9312d9ce0f..802f89190a 100644 --- a/NEWS.rst +++ b/NEWS.rst @@ -17,6 +17,22 @@ v12.10.0 (unreleased) * **New features** + * qemu: support generic PCIe switch ports + + The ``pcie-switch-upstream-port`` and ``pcie-switch-downstream-port`` + controllers now use QEMU's generic ``pcie-upstream-port`` and + ``pcie-downstream-port`` devices by default, if available, instead of the + ``x3130-upstream`` and ``xio3130-downstream`` devices, which are limited to + a 2.5 GT/s x1 link. Existing domains are unaffected. + + * qemu: configurable PCIe link speed and width + + The new ``speed`` and ``width`` attributes of the ``<target>`` element of + ``pcie-root-port``, ``pcie-switch-upstream-port``, and + ``pcie-switch-downstream-port`` controllers set the PCIe link speed and + width reported to the guest. This allows the apparent bandwidth of a + passed-through device to match the host hardware. + * **Improvements** * **Bug fixes** -- 2.43.0
On 11/4/26 16:32, David Vrabel wrote:
When a VM has been assigned a number of PCIe devices behind a common PCIe switch and the VM intends to use peer-to-peer (P2P) transfers between the devices, it is useful to be able to more report the apparent PCIe bandwidth so it reflects the real handwidth of the underlying hardware. This allows software in the VM (such as NCCL[1]) to make better decisions about whether to use P2P or not.
The future QEMU 11.2[1] will support new upstream and downstream port models that have configurable speed and width properties and extend the existing root port model to support the same options.
If supported by QEMU, prefer the new upstream and downstream port models, and support new attributes to set the speed and width.
Patch 1 (tests: Update QEMU 11.2.0 x86_64 caps for generic PCIe switch ports qemu: add capabilities for generic PCIe switch port devices) should be replaced with a more comprehensive refresh of the QEMU capabilities, and is only included here so tests continue to pass.
David
[1] See QEMU commits 432b3f707a3c (hw/pci-bridge: Make speed and width for PCIe ports non-experimental) and 73962cc5f06a (hw/pci-bridge: Add generic PCIe switch upstream and downstream ports).
David Vrabel (6): tests: Update QEMU 11.2.0 x86_64 caps for generic PCIe switch ports qemu: add capabilities for generic PCIe switch port devices qemu: support generic PCIe switch port models qemu: add capabilities for pcie-root-port speed and width properties qemu: add PCIe link speed and width attributes NEWS: mention generic PCIe switch ports and link speed/width
You earn bonus points for remembering to add NEWS entries :-)
46 files changed, 1170 insertions(+), 120 deletions(-) create mode 100644 tests/qemuxmlconfdata/pci-bridge-speed.x86_64-latest.err create mode 100644 tests/qemuxmlconfdata/pci-bridge-speed.xml create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.x86_64-latest.err create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-ioh3420.xml create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-11.0.0.err create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.args create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.x86_64-latest.xml create mode 100644 tests/qemuxmlconfdata/pcie-root-port-speed-width.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-11.1.0.err create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.x86_64-latest.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-model-generic.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.x86_64-latest.err create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port-width-xio3130.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-downstream-port.x86_64-11.1.0.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-11.1.0.err create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.x86_64-latest.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port-model-generic.xml create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.args create mode 100644 tests/qemuxmlconfdata/pcie-switch-upstream-port.x86_64-11.1.0.xml
Reviewed-by: Michal Privoznik <mprivozn@redhat.com> and will merge after Peter refreshes caps. Michal
participants (3)
-
David Vrabel -
Michal Prívozník -
Peter Krempa