[libvirt] [PowerPC Patch v3] Libvirt CPU enhancements for Power KVM
This patch series is a collection of enhancements for PowerPC CPUs on PowerKVM. Series Summary: ========== Patch 1/3 : Introduce a new architecture 'ppc64le' for libvirt. Patch 2/3 : Add libvirt support for VMs running in 'compat' mode on Power KVM. Patch 3/3 : Optimize PVR comparison for PowerPC CPUs. Detail: ==== * PowerPC has traditionally been a Big-endian architecture. However, with PowerPC ISA version 2.07, it can run in Little-endian mode as well. IBM Power8 processors, compliant with ISA 2.07 allow launching VMs in little-endian mode. This is signified by 'ppc64le' architecture. Patch 1 adds this support to libvirt, to allow running VMs based on ppc64le architecture. * Patch 2,3 tweak libvirt to correctly model PowerPC CPUs based on recent PowerKVM implementation. PowerKVM permits VMs with vcpus in the following allowed modes : i) Host native mode: where the vcpu seen in the VM belongs to the same processor generation as the host. Example: A POWER7 host, conforming to PowerISA version 2.06, will run VMs with "power7" vcpus. ii) Binary Compatibility ("compat") mode: PowerISA allows processors to run VMs in binary compatibility ("compat") mode supporting an older version of ISA. As an example: In compatibility mode, a POWER7 host can run a "power6" VM, conforming to power ISA v2.05. Similarly, a POWER8 host can run a "power7" VM conforming to PowerISA v2.06. QEMU has recently added support to explicitly denote a VM running in compatibility mode through commits 6d9412ea & 8dfa3a5e85. Henceforth, VMs of type (i) will be invoked with the QEMU invocation "-cpu host", while VMs of type (ii) will be invoked using "-cpu host, compat=power6". Now, an explicit cpu selection using "-cpu POWER6" is not valid. Instead, the recommended practice is to use the matching compat mode, if the requested cpu type differs from the host. Patches 2-3 address various aspects of this change. * Patch 2 : Adds support for generating the correct command line for QEMU. New xml semantics are introduced to signify this type. * Patch 3 : PowerKVM vCPUs differ uniquely across generations ( such as power6, power7, power8). Each generation signifies a new PowerISA version that exhibits features unique to that generation. The higher order 16 bits of PVR denote the processor generation and the lower order 16 bits denote the cpu chip (sub)version. For all practical purposes of launching a VM, we care about the generation the vCPU will belong to, and not specifically the chip version. In fact, PowerKVM does not seek out specification of a unique chip version(such as POWER7_v2.3) for running a vCPU. This patch updates the libvirt PVR check to reflect this relationship. Changelog: ========= v1 : https://www.redhat.com/archives/libvir-list/2014-June/msg01338.html v2 : http://www.redhat.com/archives/libvir-list/2014-October/msg00351.html Changes since v2: i) CPU compat mode is now introduced under CPU mode 'host-model' as against the original proposal of using cpu mode'custom'. (Thanks for the tip, Dan.) ii) Patch 4/4 that renamed models in cpu_map.xml is dropped. Instead, CPU generations are added to cpu_map.xml as new listings. The PVR check in patch 3 of this series takes care of making the right match happen for compat mode. Regards, -- Prerna Saxena Linux Technology Centre, IBM Systems and Technology Lab, Bangalore, India
From 74993aa5eab2cc59e71d038b6f6d3fdb4d0956e1 Mon Sep 17 00:00:00 2001 From: "Pradipta Kr. Banerjee" <bpradip@in.ibm.com> Date: Tue, 7 Oct 2014 10:33:44 +0530
This adds support for PowerPC Little Endian architecture., and allows libvirt to spawn VMs based on 'ppc64le' architecture. Signed-off-by: Pradipta Kr. Banerjee <bpradip@in.ibm.com> Signed-off-by: Prerna Saxena <prerna@linux.vnet.ibm.com> --- src/cpu/cpu_powerpc.c | 2 +- src/qemu/qemu_capabilities.c | 6 +++--- src/qemu/qemu_command.c | 22 +++++++++++----------- src/qemu/qemu_domain.c | 1 + src/util/virarch.h | 3 +++ 5 files changed, 19 insertions(+), 15 deletions(-) diff --git a/src/cpu/cpu_powerpc.c b/src/cpu/cpu_powerpc.c index 67cb9ff..d591c18 100644 --- a/src/cpu/cpu_powerpc.c +++ b/src/cpu/cpu_powerpc.c @@ -38,7 +38,7 @@ VIR_LOG_INIT("cpu.cpu_powerpc"); -static const virArch archs[] = { VIR_ARCH_PPC64 }; +static const virArch archs[] = { VIR_ARCH_PPC64, VIR_ARCH_PPC64LE }; struct ppc_vendor { char *name; diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c index 6fcb5c7..bb59a36 100644 --- a/src/qemu/qemu_capabilities.c +++ b/src/qemu/qemu_capabilities.c @@ -633,7 +633,7 @@ virQEMUCapsProbeCPUModels(virQEMUCapsPtr qemuCaps, uid_t runUid, gid_t runGid) if (qemuCaps->arch == VIR_ARCH_I686 || qemuCaps->arch == VIR_ARCH_X86_64) { parse = virQEMUCapsParseX86Models; - } else if (qemuCaps->arch == VIR_ARCH_PPC64) { + } else if ARCH_IS_PPC64(qemuCaps->arch) { parse = virQEMUCapsParsePPCModels; } else { VIR_DEBUG("don't know how to parse %s CPU models", @@ -2003,7 +2003,7 @@ bool virQEMUCapsHasPCIMultiBus(virQEMUCapsPtr qemuCaps, return true; if (def->os.arch == VIR_ARCH_PPC || - def->os.arch == VIR_ARCH_PPC64) { + ARCH_IS_PPC64(def->os.arch)) { /* * Usage of pci.0 naming: * @@ -3573,7 +3573,7 @@ virQEMUCapsSupportsChardev(virDomainDefPtr def, !virQEMUCapsGet(qemuCaps, QEMU_CAPS_DEVICE)) return false; - if ((def->os.arch == VIR_ARCH_PPC) || (def->os.arch == VIR_ARCH_PPC64)) { + if ((def->os.arch == VIR_ARCH_PPC) || ARCH_IS_PPC64(def->os.arch)) { /* only pseries need -device spapr-vty with -chardev */ return (chr->deviceType == VIR_DOMAIN_CHR_DEVICE_TYPE_SERIAL && chr->info.type == VIR_DOMAIN_DEVICE_ADDRESS_TYPE_SPAPRVIO); diff --git a/src/qemu/qemu_command.c b/src/qemu/qemu_command.c index 2e5af4f..d60f274 100644 --- a/src/qemu/qemu_command.c +++ b/src/qemu/qemu_command.c @@ -713,7 +713,7 @@ qemuSetSCSIControllerModel(virDomainDefPtr def, return -1; } } else { - if ((def->os.arch == VIR_ARCH_PPC64) && + if (ARCH_IS_PPC64(def->os.arch) && STRPREFIX(def->os.machine, "pseries")) { *model = VIR_DOMAIN_CONTROLLER_MODEL_SCSI_IBMVSCSI; } else if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_SCSI_LSI)) { @@ -1264,7 +1264,7 @@ int qemuDomainAssignSpaprVIOAddresses(virDomainDefPtr def, for (i = 0; i < def->nserials; i++) { if (def->serials[i]->deviceType == VIR_DOMAIN_CHR_DEVICE_TYPE_SERIAL && - (def->os.arch == VIR_ARCH_PPC64) && + ARCH_IS_PPC64(def->os.arch) && STRPREFIX(def->os.machine, "pseries")) def->serials[i]->info.type = VIR_DOMAIN_DEVICE_ADDRESS_TYPE_SPAPRVIO; if (qemuAssignSpaprVIOAddress(def, &def->serials[i]->info, @@ -1273,7 +1273,7 @@ int qemuDomainAssignSpaprVIOAddresses(virDomainDefPtr def, } if (def->nvram) { - if (def->os.arch == VIR_ARCH_PPC64 && + if (ARCH_IS_PPC64(def->os.arch) && STRPREFIX(def->os.machine, "pseries")) def->nvram->info.type = VIR_DOMAIN_DEVICE_ADDRESS_TYPE_SPAPRVIO; if (qemuAssignSpaprVIOAddress(def, &def->nvram->info, @@ -4195,7 +4195,7 @@ qemuBuildUSBControllerDevStr(virDomainDefPtr domainDef, model = def->model; if (model == -1) { - if (domainDef->os.arch == VIR_ARCH_PPC64) + if ARCH_IS_PPC64(domainDef->os.arch) model = VIR_DOMAIN_CONTROLLER_MODEL_USB_PCI_OHCI; else model = VIR_DOMAIN_CONTROLLER_MODEL_USB_PIIX3_UHCI; @@ -8573,7 +8573,7 @@ qemuBuildCommandLine(virConnectPtr conn, !qemuDomainMachineIsQ35(def) && (!virQEMUCapsGet(qemuCaps, QEMU_CAPS_PIIX3_USB_UHCI) || (!virQEMUCapsGet(qemuCaps, QEMU_CAPS_PCI_OHCI) && - def->os.arch == VIR_ARCH_PPC64))) { + ARCH_IS_PPC64(def->os.arch)))) { if (usblegacy) { virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s", _("Multiple legacy USB controllers are " @@ -9771,7 +9771,7 @@ qemuBuildCommandLine(virConnectPtr conn, } if (def->nvram) { - if (def->os.arch == VIR_ARCH_PPC64 && + if (ARCH_IS_PPC64(def->os.arch) && STRPREFIX(def->os.machine, "pseries")) { if (!virQEMUCapsGet(qemuCaps, QEMU_CAPS_DEVICE_NVRAM)) { virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s", @@ -9894,7 +9894,7 @@ qemuBuildSerialChrDeviceStr(char **deviceStr, { virBuffer cmd = VIR_BUFFER_INITIALIZER; - if ((arch == VIR_ARCH_PPC64) && STRPREFIX(machine, "pseries")) { + if (ARCH_IS_PPC64(arch) && STRPREFIX(machine, "pseries")) { if (serial->deviceType == VIR_DOMAIN_CHR_DEVICE_TYPE_SERIAL && serial->info.type == VIR_DOMAIN_DEVICE_ADDRESS_TYPE_SPAPRVIO) { virBufferAsprintf(&cmd, "spapr-vty,chardev=char%s", @@ -10316,7 +10316,7 @@ qemuParseCommandLineDisk(virDomainXMLOptionPtr xmlopt, if (VIR_ALLOC(def->src) < 0) goto error; - if (((dom->os.arch == VIR_ARCH_PPC64) && + if ((ARCH_IS_PPC64(dom->os.arch) && dom->os.machine && STRPREFIX(dom->os.machine, "pseries"))) def->bus = VIR_DOMAIN_DISK_BUS_SCSI; else @@ -10409,7 +10409,7 @@ qemuParseCommandLineDisk(virDomainXMLOptionPtr xmlopt, } else if (STREQ(keywords[i], "if")) { if (STREQ(values[i], "ide")) { def->bus = VIR_DOMAIN_DISK_BUS_IDE; - if (((dom->os.arch == VIR_ARCH_PPC64) && + if ((ARCH_IS_PPC64(dom->os.arch) && dom->os.machine && STRPREFIX(dom->os.machine, "pseries"))) { virReportError(VIR_ERR_INTERNAL_ERROR, _("pseries systems do not support ide devices '%s'"), val); @@ -11654,7 +11654,7 @@ qemuParseCommandLine(virCapsPtr qemuCaps, } if (STREQ(arg, "-cdrom")) { disk->device = VIR_DOMAIN_DISK_DEVICE_CDROM; - if (((def->os.arch == VIR_ARCH_PPC64) && + if ((ARCH_IS_PPC64(def->os.arch) && def->os.machine && STRPREFIX(def->os.machine, "pseries"))) disk->bus = VIR_DOMAIN_DISK_BUS_SCSI; if (VIR_STRDUP(disk->dst, "hdc") < 0) @@ -11670,7 +11670,7 @@ qemuParseCommandLine(virCapsPtr qemuCaps, disk->bus = VIR_DOMAIN_DISK_BUS_IDE; else disk->bus = VIR_DOMAIN_DISK_BUS_SCSI; - if (((def->os.arch == VIR_ARCH_PPC64) && + if ((ARCH_IS_PPC64(def->os.arch) && def->os.machine && STRPREFIX(def->os.machine, "pseries"))) disk->bus = VIR_DOMAIN_DISK_BUS_SCSI; } diff --git a/src/qemu/qemu_domain.c b/src/qemu/qemu_domain.c index 76fccce..e4edf34 100644 --- a/src/qemu/qemu_domain.c +++ b/src/qemu/qemu_domain.c @@ -980,6 +980,7 @@ qemuDomainDefPostParse(virDomainDefPtr def, break; case VIR_ARCH_PPC64: + case VIR_ARCH_PPC64LE: addPCIRoot = true; addDefaultUSBKBD = true; addDefaultUSBMouse = true; diff --git a/src/util/virarch.h b/src/util/virarch.h index d395e58..3206ce2 100644 --- a/src/util/virarch.h +++ b/src/util/virarch.h @@ -79,6 +79,9 @@ typedef enum { (arch) == VIR_ARCH_PPC64LE ||\ (arch) == VIR_ARCH_PPCEMB) +# define ARCH_IS_PPC64(arch) ((arch) == VIR_ARCH_PPC64 ||\ + (arch) == VIR_ARCH_PPC64LE) + # define ARCH_IS_ARM(arch) ((arch) == VIR_ARCH_ARMV6L ||\ (arch) == VIR_ARCH_ARMV7L ||\ (arch) == VIR_ARCH_ARMV7B ||\ -- 1.8.3.1 -- Prerna Saxena Linux Technology Centre, IBM Systems and Technology Lab, Bangalore, India
On 26.10.2014 12:05, Prerna Saxena wrote:
From 74993aa5eab2cc59e71d038b6f6d3fdb4d0956e1 Mon Sep 17 00:00:00 2001 From: "Pradipta Kr. Banerjee" <bpradip@in.ibm.com> Date: Tue, 7 Oct 2014 10:33:44 +0530
This adds support for PowerPC Little Endian architecture., and allows libvirt to spawn VMs based on 'ppc64le' architecture.
Signed-off-by: Pradipta Kr. Banerjee <bpradip@in.ibm.com> Signed-off-by: Prerna Saxena <prerna@linux.vnet.ibm.com> --- src/cpu/cpu_powerpc.c | 2 +- src/qemu/qemu_capabilities.c | 6 +++--- src/qemu/qemu_command.c | 22 +++++++++++----------- src/qemu/qemu_domain.c | 1 + src/util/virarch.h | 3 +++ 5 files changed, 19 insertions(+), 15 deletions(-)
There's one more occurrence in virDomainVideoDefaultType that should be fixed too. Well, I'm under impression that PPC64 and PPC64LE share the same default video device. Other than that the patch looks good. Michal
From c3572e59f1e56322ba92ab35e31da48dd63b7cec Mon Sep 17 00:00:00 2001 From: Prerna Saxena <prerna@linux.vnet.ibm.com> Date: Tue, 21 Oct 2014 01:06:51 -0400
PowerISA allows processors to run VMs in binary compatibility ("compat") mode supporting an older version of ISA. QEMU has recently added support to explicitly denote a VM running in compatibility mode through commit 6d9412ea & 8dfa3a5e85. Now, a "compat" mode VM can be run by invoking this qemu commandline on a POWER8 host: -cpu host,compat=power7. This patch allows libvirt to extend the "fallback" semantics of cpu model to describe this new mode for PowerKVM guests. As an example: When a user wants to request a power7 vm to run in compatibility mode on a Power8 host, this can be described in XML as follows : <cpu mode='host-model'> <model fallback='compat'>power7</model> </cpu> Signed-off-by: Prerna Saxena <prerna@linux.vnet.ibm.com> Signed-off-by: Li Zhang <zhlcindy@linux.vnet.ibm.com> Signed-off-by: Pradipta Kr. Banerjee <bpradip@in.ibm.com> --- docs/schemas/domaincommon.rng | 1 + src/conf/cpu_conf.c | 4 +++- src/conf/cpu_conf.h | 1 + src/cpu/cpu_powerpc.c | 14 ++++---------- src/qemu/qemu_command.c | 11 ++++++++++- 5 files changed, 19 insertions(+), 12 deletions(-) diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng index 20d81ae..ebab482 100644 --- a/docs/schemas/domaincommon.rng +++ b/docs/schemas/domaincommon.rng @@ -4067,6 +4067,7 @@ <choice> <value>allow</value> <value>forbid</value> + <value>compat</value> </choice> </attribute> </optional> diff --git a/src/conf/cpu_conf.c b/src/conf/cpu_conf.c index 9b7fbb0..e12d3db 100644 --- a/src/conf/cpu_conf.c +++ b/src/conf/cpu_conf.c @@ -47,7 +47,8 @@ VIR_ENUM_IMPL(virCPUMatch, VIR_CPU_MATCH_LAST, VIR_ENUM_IMPL(virCPUFallback, VIR_CPU_FALLBACK_LAST, "allow", - "forbid") + "forbid", + "compat") VIR_ENUM_IMPL(virCPUFeaturePolicy, VIR_CPU_FEATURE_LAST, "force", @@ -619,6 +620,7 @@ virCPUDefFormatBuf(virBufferPtr buf, return 0; formatModel = (def->mode == VIR_CPU_MODE_CUSTOM || + def->mode == VIR_CPU_MODE_HOST_MODEL || (flags & VIR_DOMAIN_XML_UPDATE_CPU)); formatFallback = (def->type == VIR_CPU_TYPE_GUEST && (def->mode == VIR_CPU_MODE_HOST_MODEL || diff --git a/src/conf/cpu_conf.h b/src/conf/cpu_conf.h index d45210b..69d8584 100644 --- a/src/conf/cpu_conf.h +++ b/src/conf/cpu_conf.h @@ -65,6 +65,7 @@ VIR_ENUM_DECL(virCPUMatch) typedef enum { VIR_CPU_FALLBACK_ALLOW, VIR_CPU_FALLBACK_FORBID, + VIR_CPU_FALLBACK_COMPAT, VIR_CPU_FALLBACK_LAST } virCPUFallback; diff --git a/src/cpu/cpu_powerpc.c b/src/cpu/cpu_powerpc.c index d591c18..ad887fe 100644 --- a/src/cpu/cpu_powerpc.c +++ b/src/cpu/cpu_powerpc.c @@ -479,7 +479,8 @@ ppcDecode(virCPUDefPtr cpu, goto cleanup; } - if (!cpuModelIsAllowed(model->name, models, nmodels)) { + if (cpu->fallback != VIR_CPU_FALLBACK_COMPAT && + !cpuModelIsAllowed(model->name, models, nmodels)) { virReportError(VIR_ERR_CONFIG_UNSUPPORTED, _("CPU model %s is not supported by hypervisor"), model->name); @@ -562,8 +563,8 @@ ppcUpdate(virCPUDefPtr guest, static virCPUDefPtr ppcBaseline(virCPUDefPtr *cpus, unsigned int ncpus, - const char **models, - unsigned int nmodels, + const char **models ATTRIBUTE_UNUSED, + unsigned int nmodels ATTRIBUTE_UNUSED, unsigned int flags) { struct ppc_map *map = NULL; @@ -583,13 +584,6 @@ ppcBaseline(virCPUDefPtr *cpus, goto error; } - if (!cpuModelIsAllowed(model->name, models, nmodels)) { - virReportError(VIR_ERR_CONFIG_UNSUPPORTED, - _("CPU model %s is not supported by hypervisor"), - model->name); - goto error; - } - for (i = 0; i < ncpus; i++) { const struct ppc_vendor *vnd; diff --git a/src/qemu/qemu_command.c b/src/qemu/qemu_command.c index d60f274..3143bd8 100644 --- a/src/qemu/qemu_command.c +++ b/src/qemu/qemu_command.c @@ -6221,7 +6221,9 @@ qemuBuildCpuModelArgStr(virQEMUDriverPtr driver, *hasHwVirt = hasSVM > 0 ? true : false; } - if (cpu->mode == VIR_CPU_MODE_HOST_PASSTHROUGH) { + if ((cpu->mode == VIR_CPU_MODE_HOST_PASSTHROUGH) || + ((cpu->mode == VIR_CPU_MODE_HOST_MODEL) && + ARCH_IS_PPC64(def->os.arch))) { const char *mode = virCPUModeTypeToString(cpu->mode); if (!virQEMUCapsGet(qemuCaps, QEMU_CAPS_CPU_HOST)) { virReportError(VIR_ERR_CONFIG_UNSUPPORTED, @@ -6236,6 +6238,13 @@ qemuBuildCpuModelArgStr(virQEMUDriverPtr driver, goto cleanup; } virBufferAddLit(buf, "host"); + + if (ARCH_IS_PPC64(def->os.arch) && + cpu->mode == VIR_CPU_MODE_HOST_MODEL && + cpu->fallback == VIR_CPU_FALLBACK_COMPAT) { + virBufferAsprintf(buf, ",compat=%s", def->cpu->model); + } + } else { if (VIR_ALLOC(guest) < 0) goto cleanup; -- 1.8.3.1 -- Prerna Saxena Linux Technology Centre, IBM Systems and Technology Lab, Bangalore, India
On 26.10.2014 12:07, Prerna Saxena wrote:
From c3572e59f1e56322ba92ab35e31da48dd63b7cec Mon Sep 17 00:00:00 2001 From: Prerna Saxena <prerna@linux.vnet.ibm.com> Date: Tue, 21 Oct 2014 01:06:51 -0400
PowerISA allows processors to run VMs in binary compatibility ("compat") mode supporting an older version of ISA. QEMU has recently added support to explicitly denote a VM running in compatibility mode through commit 6d9412ea & 8dfa3a5e85. Now, a "compat" mode VM can be run by invoking this qemu commandline on a POWER8 host: -cpu host,compat=power7.
This patch allows libvirt to extend the "fallback" semantics of cpu model to describe this new mode for PowerKVM guests. As an example: When a user wants to request a power7 vm to run in compatibility mode on a Power8 host, this can be described in XML as follows : <cpu mode='host-model'> <model fallback='compat'>power7</model> </cpu>
Signed-off-by: Prerna Saxena <prerna@linux.vnet.ibm.com> Signed-off-by: Li Zhang <zhlcindy@linux.vnet.ibm.com> Signed-off-by: Pradipta Kr. Banerjee <bpradip@in.ibm.com> --- docs/schemas/domaincommon.rng | 1 + src/conf/cpu_conf.c | 4 +++- src/conf/cpu_conf.h | 1 + src/cpu/cpu_powerpc.c | 14 ++++---------- src/qemu/qemu_command.c | 11 ++++++++++- 5 files changed, 19 insertions(+), 12 deletions(-)
diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng index 20d81ae..ebab482 100644 --- a/docs/schemas/domaincommon.rng +++ b/docs/schemas/domaincommon.rng @@ -4067,6 +4067,7 @@ <choice> <value>allow</value> <value>forbid</value> + <value>compat</value> </choice> </attribute> </optional>
Each RNG change should go hand in hand with docs change. Therefore I can't ACK this one.
diff --git a/src/conf/cpu_conf.c b/src/conf/cpu_conf.c index 9b7fbb0..e12d3db 100644 --- a/src/conf/cpu_conf.c +++ b/src/conf/cpu_conf.c @@ -47,7 +47,8 @@ VIR_ENUM_IMPL(virCPUMatch, VIR_CPU_MATCH_LAST,
VIR_ENUM_IMPL(virCPUFallback, VIR_CPU_FALLBACK_LAST, "allow", - "forbid") + "forbid", + "compat")
VIR_ENUM_IMPL(virCPUFeaturePolicy, VIR_CPU_FEATURE_LAST, "force", @@ -619,6 +620,7 @@ virCPUDefFormatBuf(virBufferPtr buf, return 0;
formatModel = (def->mode == VIR_CPU_MODE_CUSTOM || + def->mode == VIR_CPU_MODE_HOST_MODEL || (flags & VIR_DOMAIN_XML_UPDATE_CPU)); formatFallback = (def->type == VIR_CPU_TYPE_GUEST && (def->mode == VIR_CPU_MODE_HOST_MODEL || diff --git a/src/conf/cpu_conf.h b/src/conf/cpu_conf.h index d45210b..69d8584 100644 --- a/src/conf/cpu_conf.h +++ b/src/conf/cpu_conf.h @@ -65,6 +65,7 @@ VIR_ENUM_DECL(virCPUMatch) typedef enum { VIR_CPU_FALLBACK_ALLOW, VIR_CPU_FALLBACK_FORBID, + VIR_CPU_FALLBACK_COMPAT,
VIR_CPU_FALLBACK_LAST } virCPUFallback; diff --git a/src/cpu/cpu_powerpc.c b/src/cpu/cpu_powerpc.c index d591c18..ad887fe 100644 --- a/src/cpu/cpu_powerpc.c +++ b/src/cpu/cpu_powerpc.c @@ -479,7 +479,8 @@ ppcDecode(virCPUDefPtr cpu, goto cleanup; }
- if (!cpuModelIsAllowed(model->name, models, nmodels)) { + if (cpu->fallback != VIR_CPU_FALLBACK_COMPAT && + !cpuModelIsAllowed(model->name, models, nmodels)) {
Indentation's off.
virReportError(VIR_ERR_CONFIG_UNSUPPORTED, _("CPU model %s is not supported by hypervisor"), model->name); @@ -562,8 +563,8 @@ ppcUpdate(virCPUDefPtr guest, static virCPUDefPtr ppcBaseline(virCPUDefPtr *cpus, unsigned int ncpus, - const char **models, - unsigned int nmodels, + const char **models ATTRIBUTE_UNUSED, + unsigned int nmodels ATTRIBUTE_UNUSED, unsigned int flags) {
Michal
From 24608d7df3ec29604a8862a9a646983cb7f686fa Mon Sep 17 00:00:00 2001 From: Prerna Saxena <prerna@linux.vnet.ibm.com> Date: Tue, 21 Oct 2014 08:09:19 -0400
IBM Power processors differ uniquely across generations (such as power6, power7, power8). Each generation signifies a new PowerISA version that exhibits features unique to that generation. The higher 16 bits of PVR for IBM Power processors encode the CPU generation, while the CPU chip (sub)version is encoded in lower 16 bits. For all practical purposes of launching a VM, we care about the generation which the vCPU will belong to, and not specifically the chip version. This patch updates the libvirt PVR check to reflect this relationship. It allows libvirt to select the right CPU generation in case the exact match for a a specific CPU is not found. It also contains addition to cpu_map.xml for various generations of PowerISA-compatible IBM Power CPUs. This is required to account for processor generations as understood by QEMU compat mode, which go as "power6", "power7" or "power8" [Reference : QEMU commit 8dfa3a5e85 ] Signed-off-by: Pradipta Kr. Banerjee <bpradip@in.ibm.com> Signed-off-by: Prerna Saxena <prerna@linux.vnet.ibm.com> --- src/cpu/cpu_map.xml | 24 ++++++++++++++++++++++++ src/cpu/cpu_powerpc.c | 8 ++++++++ 2 files changed, 32 insertions(+) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 18c7b0d..f9d8d38 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -627,5 +627,29 @@ <pvr value='0x004b0100'/> </model> + <model name='power6'> + <vendor name='IBM'/> + <compat isa='2.05'/> + <pvr value='0x003e0000'/> + </model> + + <model name='power7'> + <vendor name='IBM'/> + <compat isa='2.06'/> + <pvr value='0x003f0000'/> + </model> + + <model name='power7+'> + <vendor name='IBM'/> + <compat isa='2.06B'/> + <pvr value='0x004a0000'/> + </model> + + <model name='power8'> + <vendor name='IBM'/> + <compat isa='2.07'/> + <pvr value='0x004b0000'/> + </model> + </arch> </cpus> diff --git a/src/cpu/cpu_powerpc.c b/src/cpu/cpu_powerpc.c index ad887fe..d0b79ff 100644 --- a/src/cpu/cpu_powerpc.c +++ b/src/cpu/cpu_powerpc.c @@ -99,6 +99,14 @@ ppcModelFindPVR(const struct ppc_map *map, model = model->next; } + /* PowerPC Processor Version Register is interpreted as follows : + * Higher order 16 bits : Power ISA generation. + * Lower order 16 bits : CPU chip version number. + * If the exact CPU isnt found, return the nearest matching CPU generation + */ + if (pvr & 0x0000FFFFul) + return ppcModelFindPVR(map, (pvr & 0xFFFF0000ul)); + return NULL; } -- 1.8.3.1 -- Prerna Saxena Linux Technology Centre, IBM Systems and Technology Lab, Bangalore, India
On 26.10.2014 12:11, Prerna Saxena wrote:
From 24608d7df3ec29604a8862a9a646983cb7f686fa Mon Sep 17 00:00:00 2001 From: Prerna Saxena <prerna@linux.vnet.ibm.com> Date: Tue, 21 Oct 2014 08:09:19 -0400
IBM Power processors differ uniquely across generations (such as power6, power7, power8). Each generation signifies a new PowerISA version that exhibits features unique to that generation. The higher 16 bits of PVR for IBM Power processors encode the CPU generation, while the CPU chip (sub)version is encoded in lower 16 bits.
For all practical purposes of launching a VM, we care about the generation which the vCPU will belong to, and not specifically the chip version. This patch updates the libvirt PVR check to reflect this relationship. It allows libvirt to select the right CPU generation in case the exact match for a a specific CPU is not found.
It also contains addition to cpu_map.xml for various generations of PowerISA-compatible IBM Power CPUs. This is required to account for processor generations as understood by QEMU compat mode, which go as "power6", "power7" or "power8" [Reference : QEMU commit 8dfa3a5e85 ]
Signed-off-by: Pradipta Kr. Banerjee <bpradip@in.ibm.com> Signed-off-by: Prerna Saxena <prerna@linux.vnet.ibm.com> --- src/cpu/cpu_map.xml | 24 ++++++++++++++++++++++++ src/cpu/cpu_powerpc.c | 8 ++++++++ 2 files changed, 32 insertions(+)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 18c7b0d..f9d8d38 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -627,5 +627,29 @@ <pvr value='0x004b0100'/> </model>
+ <model name='power6'> + <vendor name='IBM'/> + <compat isa='2.05'/> + <pvr value='0x003e0000'/> + </model> + + <model name='power7'> + <vendor name='IBM'/> + <compat isa='2.06'/> + <pvr value='0x003f0000'/> + </model> + + <model name='power7+'> + <vendor name='IBM'/> + <compat isa='2.06B'/> + <pvr value='0x004a0000'/> + </model> + + <model name='power8'> + <vendor name='IBM'/> + <compat isa='2.07'/> + <pvr value='0x004b0000'/> + </model> + </arch> </cpus> diff --git a/src/cpu/cpu_powerpc.c b/src/cpu/cpu_powerpc.c index ad887fe..d0b79ff 100644 --- a/src/cpu/cpu_powerpc.c +++ b/src/cpu/cpu_powerpc.c @@ -99,6 +99,14 @@ ppcModelFindPVR(const struct ppc_map *map, model = model->next; }
+ /* PowerPC Processor Version Register is interpreted as follows : + * Higher order 16 bits : Power ISA generation. + * Lower order 16 bits : CPU chip version number. + * If the exact CPU isnt found, return the nearest matching CPU generation + */ + if (pvr & 0x0000FFFFul) + return ppcModelFindPVR(map, (pvr & 0xFFFF0000ul)); + return NULL; }
ACK, although prior to pushing it's worth to wrap the long line in the commit message. Michal
On 26.10.2014 11:56, Prerna Saxena wrote:
This patch series is a collection of enhancements for PowerPC CPUs on PowerKVM.
Series Summary: ========== Patch 1/3 : Introduce a new architecture 'ppc64le' for libvirt. Patch 2/3 : Add libvirt support for VMs running in 'compat' mode on Power KVM. Patch 3/3 : Optimize PVR comparison for PowerPC CPUs.
Detail: ==== * PowerPC has traditionally been a Big-endian architecture. However, with PowerPC ISA version 2.07, it can run in Little-endian mode as well. IBM Power8 processors, compliant with ISA 2.07 allow launching VMs in little-endian mode. This is signified by 'ppc64le' architecture. Patch 1 adds this support to libvirt, to allow running VMs based on ppc64le architecture.
* Patch 2,3 tweak libvirt to correctly model PowerPC CPUs based on recent PowerKVM implementation.
PowerKVM permits VMs with vcpus in the following allowed modes : i) Host native mode: where the vcpu seen in the VM belongs to the same processor generation as the host. Example: A POWER7 host, conforming to PowerISA version 2.06, will run VMs with "power7" vcpus. ii) Binary Compatibility ("compat") mode: PowerISA allows processors to run VMs in binary compatibility ("compat") mode supporting an older version of ISA. As an example: In compatibility mode, a POWER7 host can run a "power6" VM, conforming to power ISA v2.05. Similarly, a POWER8 host can run a "power7" VM conforming to PowerISA v2.06.
QEMU has recently added support to explicitly denote a VM running in compatibility mode through commits 6d9412ea & 8dfa3a5e85. Henceforth, VMs of type (i) will be invoked with the QEMU invocation "-cpu host", while VMs of type (ii) will be invoked using "-cpu host, compat=power6". Now, an explicit cpu selection using "-cpu POWER6" is not valid. Instead, the recommended practice is to use the matching compat mode, if the requested cpu type differs from the host. Patches 2-3 address various aspects of this change.
* Patch 2 : Adds support for generating the correct command line for QEMU. New xml semantics are introduced to signify this type.
* Patch 3 : PowerKVM vCPUs differ uniquely across generations ( such as power6, power7, power8). Each generation signifies a new PowerISA version that exhibits features unique to that generation. The higher order 16 bits of PVR denote the processor generation and the lower order 16 bits denote the cpu chip (sub)version. For all practical purposes of launching a VM, we care about the generation the vCPU will belong to, and not specifically the chip version. In fact, PowerKVM does not seek out specification of a unique chip version(such as POWER7_v2.3) for running a vCPU. This patch updates the libvirt PVR check to reflect this relationship.
Changelog: ========= v1 : https://www.redhat.com/archives/libvir-list/2014-June/msg01338.html v2 : http://www.redhat.com/archives/libvir-list/2014-October/msg00351.html
Changes since v2: i) CPU compat mode is now introduced under CPU mode 'host-model' as against the original proposal of using cpu mode'custom'. (Thanks for the tip, Dan.) ii) Patch 4/4 that renamed models in cpu_map.xml is dropped. Instead, CPU generations are added to cpu_map.xml as new listings. The PVR check in patch 3 of this series takes care of making the right match happen for compat mode.
Regards,
So, I went through the patches and they look good to me from code POV. However, I couldn't ACK 2/3 due to missing documentation. I'm not sure if you are okay with posting v4 and possibly slipping this release (depending when DV freezes the upstream) or just post a follow up patch that would be squashed into 2/3 prior to pushing. Michal
On Monday 27 October 2014 08:10 PM, Michal Privoznik wrote:
On 26.10.2014 11:56, Prerna Saxena wrote:
This patch series is a collection of enhancements for PowerPC CPUs on PowerKVM.
Series Summary: ========== Patch 1/3 : Introduce a new architecture 'ppc64le' for libvirt. Patch 2/3 : Add libvirt support for VMs running in 'compat' mode on Power KVM. Patch 3/3 : Optimize PVR comparison for PowerPC CPUs.
Detail: ==== * PowerPC has traditionally been a Big-endian architecture. However, with PowerPC ISA version 2.07, it can run in Little-endian mode as well. IBM Power8 processors, compliant with ISA 2.07 allow launching VMs in little-endian mode. This is signified by 'ppc64le' architecture. Patch 1 adds this support to libvirt, to allow running VMs based on ppc64le architecture.
* Patch 2,3 tweak libvirt to correctly model PowerPC CPUs based on recent PowerKVM implementation.
PowerKVM permits VMs with vcpus in the following allowed modes : i) Host native mode: where the vcpu seen in the VM belongs to the same processor generation as the host. Example: A POWER7 host, conforming to PowerISA version 2.06, will run VMs with "power7" vcpus. ii) Binary Compatibility ("compat") mode: PowerISA allows processors to run VMs in binary compatibility ("compat") mode supporting an older version of ISA. As an example: In compatibility mode, a POWER7 host can run a "power6" VM, conforming to power ISA v2.05. Similarly, a POWER8 host can run a "power7" VM conforming to PowerISA v2.06.
QEMU has recently added support to explicitly denote a VM running in compatibility mode through commits 6d9412ea & 8dfa3a5e85. Henceforth, VMs of type (i) will be invoked with the QEMU invocation "-cpu host", while VMs of type (ii) will be invoked using "-cpu host, compat=power6". Now, an explicit cpu selection using "-cpu POWER6" is not valid. Instead, the recommended practice is to use the matching compat mode, if the requested cpu type differs from the host. Patches 2-3 address various aspects of this change.
* Patch 2 : Adds support for generating the correct command line for QEMU. New xml semantics are introduced to signify this type.
* Patch 3 : PowerKVM vCPUs differ uniquely across generations ( such as power6, power7, power8). Each generation signifies a new PowerISA version that exhibits features unique to that generation. The higher order 16 bits of PVR denote the processor generation and the lower order 16 bits denote the cpu chip (sub)version. For all practical purposes of launching a VM, we care about the generation the vCPU will belong to, and not specifically the chip version. In fact, PowerKVM does not seek out specification of a unique chip version(such as POWER7_v2.3) for running a vCPU. This patch updates the libvirt PVR check to reflect this relationship.
Changelog: ========= v1 : https://www.redhat.com/archives/libvir-list/2014-June/msg01338.html v2 : http://www.redhat.com/archives/libvir-list/2014-October/msg00351.html
Changes since v2: i) CPU compat mode is now introduced under CPU mode 'host-model' as against the original proposal of using cpu mode'custom'. (Thanks for the tip, Dan.) ii) Patch 4/4 that renamed models in cpu_map.xml is dropped. Instead, CPU generations are added to cpu_map.xml as new listings. The PVR check in patch 3 of this series takes care of making the right match happen for compat mode.
Regards,
So, I went through the patches and they look good to me from code POV. However, I couldn't ACK 2/3 due to missing documentation. I'm not sure if you are okay with posting v4 and possibly slipping this release (depending when DV freezes the upstream) or just post a follow up patch that would be squashed into 2/3 prior to pushing.
Hi Michal, Thanks for taking a look. I'll quickly make changes and post a v4 in time for this release. Regards, -- Prerna Saxena Linux Technology Centre, IBM Systems and Technology Lab, Bangalore, India
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Prerna Saxena