[PATCH 0/4] Remove deprecated Power8E and 8NVL CPUs
Overview ======== Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL") Hence, remove usage (chip and core types) of Power8E and 8NVL from PowerNV, PSeries as well as testcases. NOTE: PRE-REQUISITE: Requires following "Testcase improvements for PowerNV" to be merged first: https://lore.kernel.org/qemu-devel/20260610090235.3665904-1-adityag@linux.ib... Aditya Gupta (4): ppc/pnv: Replace Power8E with Power11 for 'none' machine test ppc/pnv: Remove Power8E and Power8NVL pnv chips ppc/pnv: Remove Power8E and Power8NVL spapr cores ppc/pnv: Remove Power8E and Power8NVL CPUs docs/about/deprecated.rst | 9 ----- docs/system/ppc/powernv.rst | 2 +- docs/system/ppc/pseries.rst | 2 +- hw/ppc/pnv.c | 62 --------------------------------- hw/ppc/pnv_core.c | 2 -- hw/ppc/spapr_cpu_core.c | 2 -- include/hw/ppc/pnv.h | 8 ----- target/ppc/cpu-models.c | 6 ---- target/ppc/cpu-models.h | 4 --- target/ppc/cpu_init.c | 6 ---- target/ppc/kvm.c | 4 +-- tests/qtest/machine-none-test.c | 2 +- tests/qtest/pnv-xscom.h | 9 ----- 13 files changed, 4 insertions(+), 114 deletions(-) base-commit: de5d8bfd6105d3dd3ae668df9762df244a6d1506 -- 2.54.0
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL") As Power8E chip is removed in future commits, remove the use of Power8E chip for use with the none machine test, and replace with Power11 for ppc64 test coverage for the test Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- tests/qtest/machine-none-test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qtest/machine-none-test.c b/tests/qtest/machine-none-test.c index bafd7d660ec7..3205df190f35 100644 --- a/tests/qtest/machine-none-test.c +++ b/tests/qtest/machine-none-test.c @@ -38,7 +38,7 @@ static struct arch2cpu cpus_map[] = { { "mips64el", "I6500" }, { "or1k", "or1200" }, { "ppc", "604" }, - { "ppc64", "power8e_v2.1" }, + { "ppc64", "power11_v2.0" }, { "s390x", "qemu" }, { "sh4", "sh7750r" }, { "sh4eb", "sh7751r" }, -- 2.54.0
On 6/10/26 11:07, Aditya Gupta via Devel wrote:
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL")
As Power8E chip is removed in future commits, remove the use of Power8E chip for use with the none machine test, and replace with Power11 for ppc64 test coverage for the test
yes It's better to be in sync with the default pnv and spapr cpus. power8e was hardly never used even in 2016. C.
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- tests/qtest/machine-none-test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/machine-none-test.c b/tests/qtest/machine-none-test.c index bafd7d660ec7..3205df190f35 100644 --- a/tests/qtest/machine-none-test.c +++ b/tests/qtest/machine-none-test.c @@ -38,7 +38,7 @@ static struct arch2cpu cpus_map[] = { { "mips64el", "I6500" }, { "or1k", "or1200" }, { "ppc", "604" }, - { "ppc64", "power8e_v2.1" }, + { "ppc64", "power11_v2.0" }, { "s390x", "qemu" }, { "sh4", "sh7750r" }, { "sh4eb", "sh7751r" },
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL") With no use of 8E and 8NVL, in powernv chips or spapr cores, remove the CPU definitions for the cores Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- docs/about/deprecated.rst | 9 --------- target/ppc/cpu-models.c | 6 ------ target/ppc/cpu-models.h | 4 ---- target/ppc/cpu_init.c | 6 ------ target/ppc/kvm.c | 4 +--- 5 files changed, 1 insertion(+), 28 deletions(-) diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index 97750f5edc91..3930ef08ed4b 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -215,15 +215,6 @@ embedded 405 for power management (OCC) and other internal tasks, it is theoretically possible to use QEMU to model them. Let's keep the CPU implementation for a while before removing all support. -Power8E and Power8NVL CPUs and corresponding Pnv chips (since 10.1) -''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' - -The Power8E and Power8NVL variants of Power8 are not really useful anymore -in qemu, and are old and unmaintained now. - -The CPUs as well as corresponding Power8NVL and Power8E PnvChips will also -be considered deprecated. - System emulator machines ------------------------ diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c index 26b6debcfc96..aa13654e83e8 100644 --- a/target/ppc/cpu-models.c +++ b/target/ppc/cpu-models.c @@ -734,12 +734,8 @@ "POWER7 v2.3") POWERPC_DEF("power7p_v2.1", CPU_POWERPC_POWER7P_v21, POWER7, "POWER7+ v2.1") - POWERPC_DEPRECATED_CPU("power8e_v2.1", CPU_POWERPC_POWER8E_v21, POWER8, - "POWER8E v2.1", "CPU is unmaintained.") POWERPC_DEF("power8_v2.0", CPU_POWERPC_POWER8_v20, POWER8, "POWER8 v2.0") - POWERPC_DEPRECATED_CPU("power8nvl_v1.0", CPU_POWERPC_POWER8NVL_v10, POWER8, - "POWER8NVL v1.0", "CPU is unmaintained.") POWERPC_DEF("power9_v2.0", CPU_POWERPC_POWER9_DD20, POWER9, "POWER9 v2.0") POWERPC_DEF("power9_v2.2", CPU_POWERPC_POWER9_DD22, POWER9, @@ -918,9 +914,7 @@ PowerPCCPUAlias ppc_cpu_aliases[] = { { "power7", "power7_v2.3" }, { "power7+", "power7p_v2.1" }, { "power7+_v2.1", "power7p_v2.1" }, - { "power8e", "power8e_v2.1" }, { "power8", "power8_v2.0" }, - { "power8nvl", "power8nvl_v1.0" }, { "power9", "power9_v2.2" }, { "power10", "power10_v2.0" }, { "power11", "power11_v2.0" }, diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h index a439eb37ee41..ef019cdb1f3c 100644 --- a/target/ppc/cpu-models.h +++ b/target/ppc/cpu-models.h @@ -341,12 +341,8 @@ enum { CPU_POWERPC_POWER7_v23 = 0x003F0203, CPU_POWERPC_POWER7P_BASE = 0x004A0000, CPU_POWERPC_POWER7P_v21 = 0x004A0201, - CPU_POWERPC_POWER8E_BASE = 0x004B0000, - CPU_POWERPC_POWER8E_v21 = 0x004B0201, CPU_POWERPC_POWER8_BASE = 0x004D0000, CPU_POWERPC_POWER8_v20 = 0x004D0200, - CPU_POWERPC_POWER8NVL_BASE = 0x004C0000, - CPU_POWERPC_POWER8NVL_v10 = 0x004C0100, CPU_POWERPC_POWER9_BASE = 0x004E0000, CPU_POWERPC_POWER9_DD1 = 0x004E1100, CPU_POWERPC_POWER9_DD20 = 0x004E1200, diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index d25f69f13ba5..87186ec32179 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6310,12 +6310,6 @@ static bool ppc_pvr_match_power8(PowerPCCPUClass *pcc, uint32_t pvr, bool best) if (base == CPU_POWERPC_POWER8_BASE) { return true; } - if (base == CPU_POWERPC_POWER8E_BASE) { - return true; - } - if (base == CPU_POWERPC_POWER8NVL_BASE) { - return true; - } } if (base != pcc_base) { return false; diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index b94c2997a07f..78a1c4a8393e 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2437,9 +2437,7 @@ static bool kvmppc_power8_host(void) #ifdef TARGET_PPC64 { uint32_t base_pvr = CPU_POWERPC_POWER_SERVER_MASK & mfpvr(); - ret = (base_pvr == CPU_POWERPC_POWER8E_BASE) || - (base_pvr == CPU_POWERPC_POWER8NVL_BASE) || - (base_pvr == CPU_POWERPC_POWER8_BASE); + ret = (base_pvr == CPU_POWERPC_POWER8_BASE); } #endif /* TARGET_PPC64 */ return ret; -- 2.54.0
On 10/6/26 11:08, Aditya Gupta wrote:
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL")
With no use of 8E and 8NVL, in powernv chips or spapr cores, remove the CPU definitions for the cores
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- docs/about/deprecated.rst | 9 --------- target/ppc/cpu-models.c | 6 ------ target/ppc/cpu-models.h | 4 ---- target/ppc/cpu_init.c | 6 ------ target/ppc/kvm.c | 4 +--- 5 files changed, 1 insertion(+), 28 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
On 6/10/26 11:08, Aditya Gupta via Devel wrote:
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL")
With no use of 8E and 8NVL, in powernv chips or spapr cores, remove the CPU definitions for the cores
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- docs/about/deprecated.rst | 9 --------- target/ppc/cpu-models.c | 6 ------ target/ppc/cpu-models.h | 4 ---- target/ppc/cpu_init.c | 6 ------ target/ppc/kvm.c | 4 +--- 5 files changed, 1 insertion(+), 28 deletions(-)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index 97750f5edc91..3930ef08ed4b 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -215,15 +215,6 @@ embedded 405 for power management (OCC) and other internal tasks, it is theoretically possible to use QEMU to model them. Let's keep the CPU implementation for a while before removing all support.
-Power8E and Power8NVL CPUs and corresponding Pnv chips (since 10.1) -''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' - -The Power8E and Power8NVL variants of Power8 are not really useful anymore -in qemu, and are old and unmaintained now. - -The CPUs as well as corresponding Power8NVL and Power8E PnvChips will also -be considered deprecated. -
docs/about/removed-features.rst needs an update too. C.
System emulator machines ------------------------
diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c index 26b6debcfc96..aa13654e83e8 100644 --- a/target/ppc/cpu-models.c +++ b/target/ppc/cpu-models.c @@ -734,12 +734,8 @@ "POWER7 v2.3") POWERPC_DEF("power7p_v2.1", CPU_POWERPC_POWER7P_v21, POWER7, "POWER7+ v2.1") - POWERPC_DEPRECATED_CPU("power8e_v2.1", CPU_POWERPC_POWER8E_v21, POWER8, - "POWER8E v2.1", "CPU is unmaintained.") POWERPC_DEF("power8_v2.0", CPU_POWERPC_POWER8_v20, POWER8, "POWER8 v2.0") - POWERPC_DEPRECATED_CPU("power8nvl_v1.0", CPU_POWERPC_POWER8NVL_v10, POWER8, - "POWER8NVL v1.0", "CPU is unmaintained.") POWERPC_DEF("power9_v2.0", CPU_POWERPC_POWER9_DD20, POWER9, "POWER9 v2.0") POWERPC_DEF("power9_v2.2", CPU_POWERPC_POWER9_DD22, POWER9, @@ -918,9 +914,7 @@ PowerPCCPUAlias ppc_cpu_aliases[] = { { "power7", "power7_v2.3" }, { "power7+", "power7p_v2.1" }, { "power7+_v2.1", "power7p_v2.1" }, - { "power8e", "power8e_v2.1" }, { "power8", "power8_v2.0" }, - { "power8nvl", "power8nvl_v1.0" }, { "power9", "power9_v2.2" }, { "power10", "power10_v2.0" }, { "power11", "power11_v2.0" }, diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h index a439eb37ee41..ef019cdb1f3c 100644 --- a/target/ppc/cpu-models.h +++ b/target/ppc/cpu-models.h @@ -341,12 +341,8 @@ enum { CPU_POWERPC_POWER7_v23 = 0x003F0203, CPU_POWERPC_POWER7P_BASE = 0x004A0000, CPU_POWERPC_POWER7P_v21 = 0x004A0201, - CPU_POWERPC_POWER8E_BASE = 0x004B0000, - CPU_POWERPC_POWER8E_v21 = 0x004B0201, CPU_POWERPC_POWER8_BASE = 0x004D0000, CPU_POWERPC_POWER8_v20 = 0x004D0200, - CPU_POWERPC_POWER8NVL_BASE = 0x004C0000, - CPU_POWERPC_POWER8NVL_v10 = 0x004C0100, CPU_POWERPC_POWER9_BASE = 0x004E0000, CPU_POWERPC_POWER9_DD1 = 0x004E1100, CPU_POWERPC_POWER9_DD20 = 0x004E1200, diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index d25f69f13ba5..87186ec32179 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6310,12 +6310,6 @@ static bool ppc_pvr_match_power8(PowerPCCPUClass *pcc, uint32_t pvr, bool best) if (base == CPU_POWERPC_POWER8_BASE) { return true; } - if (base == CPU_POWERPC_POWER8E_BASE) { - return true; - } - if (base == CPU_POWERPC_POWER8NVL_BASE) { - return true; - } } if (base != pcc_base) { return false; diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index b94c2997a07f..78a1c4a8393e 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2437,9 +2437,7 @@ static bool kvmppc_power8_host(void) #ifdef TARGET_PPC64 { uint32_t base_pvr = CPU_POWERPC_POWER_SERVER_MASK & mfpvr(); - ret = (base_pvr == CPU_POWERPC_POWER8E_BASE) || - (base_pvr == CPU_POWERPC_POWER8NVL_BASE) || - (base_pvr == CPU_POWERPC_POWER8_BASE); + ret = (base_pvr == CPU_POWERPC_POWER8_BASE); } #endif /* TARGET_PPC64 */ return ret;
On 26/06/12 09:16AM, Cédric Le Goater wrote:
On 6/10/26 11:08, Aditya Gupta via Devel wrote: <...snip...>
--- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -215,15 +215,6 @@ embedded 405 for power management (OCC) and other internal tasks, it is theoretically possible to use QEMU to model them. Let's keep the CPU implementation for a while before removing all support. -Power8E and Power8NVL CPUs and corresponding Pnv chips (since 10.1) -''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' - -The Power8E and Power8NVL variants of Power8 are not really useful anymore -in qemu, and are old and unmaintained now. - -The CPUs as well as corresponding Power8NVL and Power8E PnvChips will also -be considered deprecated. -
docs/about/removed-features.rst needs an update too.
Sure cédric, will update it Thanks, - Aditya G
C.
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL") Accordingly, remove usage of 8E and 8NVL chips from powernv, as it's old and unmaintained now. Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- docs/system/ppc/powernv.rst | 2 +- hw/ppc/pnv.c | 62 ------------------------------------- hw/ppc/pnv_core.c | 2 -- include/hw/ppc/pnv.h | 8 ----- tests/qtest/pnv-xscom.h | 9 ------ 5 files changed, 1 insertion(+), 82 deletions(-) diff --git a/docs/system/ppc/powernv.rst b/docs/system/ppc/powernv.rst index 5154794cc8cd..1de696b588a8 100644 --- a/docs/system/ppc/powernv.rst +++ b/docs/system/ppc/powernv.rst @@ -15,7 +15,7 @@ beyond the scope of what QEMU addresses today. Supported devices ----------------- - * Multi processor support for POWER8, POWER8NVL, POWER9, Power10 and Power11. + * Multi processor support for POWER8, POWER9, Power10 and Power11. * XSCOM, serial communication sideband bus to configure chiplets. * Simple LPC Controller. * Processor Service Interface (PSI) Controller. diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 8df697da94cb..be3c46dcfcf2 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -864,16 +864,6 @@ static ISABus *pnv_chip_power8_isa_create(PnvChip *chip, Error **errp) return pnv_lpc_isa_create(&chip8->lpc, true, errp); } -static ISABus *pnv_chip_power8nvl_isa_create(PnvChip *chip, Error **errp) -{ - Pnv8Chip *chip8 = PNV8_CHIP(chip); - qemu_irq irq = qdev_get_gpio_in(DEVICE(&chip8->psi), PSIHB_IRQ_LPC_I2C); - - qdev_connect_gpio_out_named(DEVICE(&chip8->lpc), "LPCHC", 0, irq); - - return pnv_lpc_isa_create(&chip8->lpc, false, errp); -} - static ISABus *pnv_chip_power9_isa_create(PnvChip *chip, Error **errp) { Pnv9Chip *chip9 = PNV9_CHIP(chip); @@ -1641,7 +1631,6 @@ static void *pnv_chip_power11_intc_get(PnvChip *chip) * EX14 * <EX15 reserved> */ -#define POWER8E_CORE_MASK (0x7070ull) #define POWER8_CORE_MASK (0x7e7eull) /* @@ -1822,30 +1811,6 @@ static uint32_t pnv_chip_power8_xscom_pcba(PnvChip *chip, uint64_t addr) return ((addr >> 4) & ~0xfull) | ((addr >> 3) & 0xf); } -static void pnv_chip_power8e_class_init(ObjectClass *klass, const void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PnvChipClass *k = PNV_CHIP_CLASS(klass); - - k->chip_cfam_id = 0x221ef04980000000ull; /* P8 Murano DD2.1 */ - k->cores_mask = POWER8E_CORE_MASK; - k->num_phbs = 3; - k->get_pir_tir = pnv_get_pir_tir_p8; - k->intc_create = pnv_chip_power8_intc_create; - k->intc_reset = pnv_chip_power8_intc_reset; - k->intc_destroy = pnv_chip_power8_intc_destroy; - k->intc_print_info = pnv_chip_power8_intc_print_info; - k->isa_create = pnv_chip_power8_isa_create; - k->dt_populate = pnv_chip_power8_dt_populate; - k->pic_print_info = pnv_chip_power8_pic_print_info; - k->xscom_core_base = pnv_chip_power8_xscom_core_base; - k->xscom_pcba = pnv_chip_power8_xscom_pcba; - dc->desc = "PowerNV Chip POWER8E"; - - device_class_set_parent_realize(dc, pnv_chip_power8_realize, - &k->parent_realize); -} - static void pnv_chip_power8_class_init(ObjectClass *klass, const void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -1870,30 +1835,6 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, const void *data) &k->parent_realize); } -static void pnv_chip_power8nvl_class_init(ObjectClass *klass, const void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PnvChipClass *k = PNV_CHIP_CLASS(klass); - - k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */ - k->cores_mask = POWER8_CORE_MASK; - k->num_phbs = 4; - k->get_pir_tir = pnv_get_pir_tir_p8; - k->intc_create = pnv_chip_power8_intc_create; - k->intc_reset = pnv_chip_power8_intc_reset; - k->intc_destroy = pnv_chip_power8_intc_destroy; - k->intc_print_info = pnv_chip_power8_intc_print_info; - k->isa_create = pnv_chip_power8nvl_isa_create; - k->dt_populate = pnv_chip_power8_dt_populate; - k->pic_print_info = pnv_chip_power8_pic_print_info; - k->xscom_core_base = pnv_chip_power8_xscom_core_base; - k->xscom_pcba = pnv_chip_power8_xscom_pcba; - dc->desc = "PowerNV Chip POWER8NVL"; - - device_class_set_parent_realize(dc, pnv_chip_power8_realize, - &k->parent_realize); -} - static void pnv_chip_power9_instance_init(Object *obj) { PnvChip *chip = PNV_CHIP(obj); @@ -3780,9 +3721,6 @@ static const TypeInfo types[] = { .instance_size = sizeof(Pnv8Chip), }, DEFINE_PNV8_CHIP_TYPE(TYPE_PNV_CHIP_POWER8, pnv_chip_power8_class_init), - DEFINE_PNV8_CHIP_TYPE(TYPE_PNV_CHIP_POWER8E, pnv_chip_power8e_class_init), - DEFINE_PNV8_CHIP_TYPE(TYPE_PNV_CHIP_POWER8NVL, - pnv_chip_power8nvl_class_init), }; DEFINE_TYPES(types) diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 8939515c2c34..61dc8211e32f 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -515,9 +515,7 @@ static const TypeInfo pnv_core_infos[] = { .class_init = pnv_core_class_init, .abstract = true, }, - DEFINE_PNV_CORE_TYPE(power8, "power8e_v2.1"), DEFINE_PNV_CORE_TYPE(power8, "power8_v2.0"), - DEFINE_PNV_CORE_TYPE(power8, "power8nvl_v1.0"), DEFINE_PNV_CORE_TYPE(power9, "power9_v2.2"), DEFINE_PNV_CORE_TYPE(power10, "power10_v2.0"), DEFINE_PNV_CORE_TYPE(power11, "power11_v2.0"), diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index f8234fb3cd31..60e902d9c5bb 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -39,18 +39,10 @@ typedef struct Pnv10Chip Pnv11Chip; #define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP #define PNV_CHIP_TYPE_NAME(cpu_model) cpu_model PNV_CHIP_TYPE_SUFFIX -#define TYPE_PNV_CHIP_POWER8E PNV_CHIP_TYPE_NAME("power8e_v2.1") -DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8E, - TYPE_PNV_CHIP_POWER8E) - #define TYPE_PNV_CHIP_POWER8 PNV_CHIP_TYPE_NAME("power8_v2.0") DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8, TYPE_PNV_CHIP_POWER8) -#define TYPE_PNV_CHIP_POWER8NVL PNV_CHIP_TYPE_NAME("power8nvl_v1.0") -DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8NVL, - TYPE_PNV_CHIP_POWER8NVL) - #define TYPE_PNV_CHIP_POWER9 PNV_CHIP_TYPE_NAME("power9_v2.2") DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER9, TYPE_PNV_CHIP_POWER9) diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h index 5aa1701ea768..ddd6e1953ce4 100644 --- a/tests/qtest/pnv-xscom.h +++ b/tests/qtest/pnv-xscom.h @@ -12,9 +12,7 @@ #define SMT 4 /* some tests will break if less than 4 */ typedef enum PnvChipType { - PNV_CHIP_POWER8E, /* AKA Murano (default) */ PNV_CHIP_POWER8, /* AKA Venice */ - PNV_CHIP_POWER8NVL, /* AKA Naples */ PNV_CHIP_POWER9, /* AKA Nimbus */ PNV_CHIP_POWER10, } PnvChipType; @@ -36,13 +34,6 @@ static const PnvChip pnv_chips[] = { .cfam_id = 0x220ea04980000000ull, .first_core = 0x1, .num_i2c = 0, - }, { - .chip_type = PNV_CHIP_POWER8NVL, - .cpu_model = "POWER8NVL", - .xscom_base = 0x0003fc0000000000ull, - .cfam_id = 0x120d304980000000ull, - .first_core = 0x1, - .num_i2c = 0, }, { .chip_type = PNV_CHIP_POWER9, -- 2.54.0
On 10/6/26 11:07, Aditya Gupta wrote:
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL")
Accordingly, remove usage of 8E and 8NVL chips from powernv, as it's old and unmaintained now.
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- docs/system/ppc/powernv.rst | 2 +- hw/ppc/pnv.c | 62 ------------------------------------- hw/ppc/pnv_core.c | 2 -- include/hw/ppc/pnv.h | 8 ----- tests/qtest/pnv-xscom.h | 9 ------ 5 files changed, 1 insertion(+), 82 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL") Remove the corresponding 8E and 8NVL CPU cores from spapr/pseries Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- docs/system/ppc/pseries.rst | 2 +- hw/ppc/spapr_cpu_core.c | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/docs/system/ppc/pseries.rst b/docs/system/ppc/pseries.rst index bbc51aa7fcdb..1477028bc5ea 100644 --- a/docs/system/ppc/pseries.rst +++ b/docs/system/ppc/pseries.rst @@ -16,7 +16,7 @@ Supported devices * Multi processor support for many Power processors generations: - POWER7, POWER7+ - - POWER8, POWER8NVL + - POWER8 - POWER9 - Power10 - Power11 diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 41e37103c043..9a9351991c95 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -408,8 +408,6 @@ static const TypeInfo spapr_cpu_core_type_infos[] = { DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"), DEFINE_SPAPR_CPU_CORE_TYPE("power7p_v2.1"), DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"), - DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"), - DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"), DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"), DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.2"), DEFINE_SPAPR_CPU_CORE_TYPE("power10_v2.0"), -- 2.54.0
On 10/6/26 11:07, Aditya Gupta wrote:
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL")
Remove the corresponding 8E and 8NVL CPU cores from spapr/pseries
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- docs/system/ppc/pseries.rst | 2 +- hw/ppc/spapr_cpu_core.c | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-)
Squash with following?
On 11/06/26 12:12, Philippe Mathieu-Daudé wrote:
On 10/6/26 11:07, Aditya Gupta wrote:
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL")
Remove the corresponding 8E and 8NVL CPU cores from spapr/pseries
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- docs/system/ppc/pseries.rst | 2 +- hw/ppc/spapr_cpu_core.c | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-)
Squash with following?
Sure, you mean squash into patch #4, the target/ppc change ? Thanks for reviewing ! - Aditya G
On 12/6/26 08:36, Aditya Gupta wrote:
On 11/06/26 12:12, Philippe Mathieu-Daudé wrote:
On 10/6/26 11:07, Aditya Gupta wrote:
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL")
Remove the corresponding 8E and 8NVL CPU cores from spapr/pseries
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> --- docs/system/ppc/pseries.rst | 2 +- hw/ppc/spapr_cpu_core.c | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-)
Squash with following?
Sure, you mean squash into patch #4, the target/ppc change ?
Yes.
Thanks for reviewing !
;)
On 6/10/26 11:07, Aditya Gupta via Devel wrote:
Overview ========
Power8E and Power8NVL were deprecated since QEMU 10.1, with commit 264a604e7163 ("target/ppc: Deprecate Power8E and Power8NVL")
Hence, remove usage (chip and core types) of Power8E and 8NVL from PowerNV, PSeries as well as testcases.
NOTE: PRE-REQUISITE: Requires following "Testcase improvements for PowerNV" to be merged first:
https://lore.kernel.org/qemu-devel/20260610090235.3665904-1-adityag@linux.ib...
Aditya Gupta (4): ppc/pnv: Replace Power8E with Power11 for 'none' machine test ppc/pnv: Remove Power8E and Power8NVL pnv chips ppc/pnv: Remove Power8E and Power8NVL spapr cores ppc/pnv: Remove Power8E and Power8NVL CPUs
docs/about/deprecated.rst | 9 ----- docs/system/ppc/powernv.rst | 2 +- docs/system/ppc/pseries.rst | 2 +- hw/ppc/pnv.c | 62 --------------------------------- hw/ppc/pnv_core.c | 2 -- hw/ppc/spapr_cpu_core.c | 2 -- include/hw/ppc/pnv.h | 8 ----- target/ppc/cpu-models.c | 6 ---- target/ppc/cpu-models.h | 4 --- target/ppc/cpu_init.c | 6 ---- target/ppc/kvm.c | 4 +-- tests/qtest/machine-none-test.c | 2 +- tests/qtest/pnv-xscom.h | 9 ----- 13 files changed, 4 insertions(+), 114 deletions(-)
base-commit: de5d8bfd6105d3dd3ae668df9762df244a6d1506
I think you can remove a bit more in the LPC model. Check the cpld support in pnv_lpc_isa_create. Thanks, C.
participants (3)
-
Aditya Gupta -
Cédric Le Goater -
Philippe Mathieu-Daudé