[PATCH] cpu_map: Introduce Neoverse-N1
Add Neoverse-N1 as a supported cpu model. Signed-off-by: Zhang Zhenyu <zhenyzha@redhat.com> --- src/cpu_map/arm_neoverse-n1.xml | 6 ++++++ src/cpu_map/arm_vendors.xml | 1 + src/cpu_map/index.xml | 3 +++ src/cpu_map/meson.build | 1 + 4 files changed, 11 insertions(+) create mode 100644 src/cpu_map/arm_neoverse-n1.xml diff --git a/src/cpu_map/arm_neoverse-n1.xml b/src/cpu_map/arm_neoverse-n1.xml new file mode 100644 index 0000000000..14c7f7c300 --- /dev/null +++ b/src/cpu_map/arm_neoverse-n1.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='Neoverse-N1'> + <vendor name='Ampere'/> + <pvr value='0xd0c'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_vendors.xml b/src/cpu_map/arm_vendors.xml index 92d10565f4..a9a945584b 100644 --- a/src/cpu_map/arm_vendors.xml +++ b/src/cpu_map/arm_vendors.xml @@ -13,4 +13,5 @@ <vendor name='Marvell' value='0x56'/> <vendor name='Intel' value='0x69'/> <vendor name='Phytium' value='0x70'/> + <vendor name='Ampere' value='0x71'/> </cpus> diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index d533a28865..2419fa0a64 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -98,6 +98,9 @@ <include filename='arm_cortex-a57.xml'/> <include filename='arm_cortex-a72.xml'/> + <!-- Ampere-based CPU models --> + <include filename='arm_neoverse-n1.xml'/> + <!-- Qualcomm-based CPU models --> <include filename='arm_Falkor.xml'/> diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build index 99264289e2..c8f2e36eea 100644 --- a/src/cpu_map/meson.build +++ b/src/cpu_map/meson.build @@ -7,6 +7,7 @@ cpumap_data = [ 'arm_FT-2000plus.xml', 'arm_features.xml', 'arm_Kunpeng-920.xml', + 'arm_neoverse-n1.xml', 'arm_Tengyun-S2500.xml', 'arm_ThunderX299xx.xml', 'arm_vendors.xml', -- 2.31.1
On Tue, Sep 13, 2022 at 10:10:02PM -0400, Zhenyu Zhang wrote:
Add Neoverse-N1 as a supported cpu model.
I would like to review this patch, but I could not find the vendor ID in any official documentation. I know I am bad at searching, but the only thing I could find was that Ampere vendor uses "0xc0" as the value and part values for neoverse n1/n2/v1 which ought to be "0xd0c", "0xd49" and "0xd40" respectively. It could speed up the review if you included some pointer to a technical specification or something that would make it easier to check.
Signed-off-by: Zhang Zhenyu <zhenyzha@redhat.com> --- src/cpu_map/arm_neoverse-n1.xml | 6 ++++++ src/cpu_map/arm_vendors.xml | 1 + src/cpu_map/index.xml | 3 +++ src/cpu_map/meson.build | 1 + 4 files changed, 11 insertions(+) create mode 100644 src/cpu_map/arm_neoverse-n1.xml
diff --git a/src/cpu_map/arm_neoverse-n1.xml b/src/cpu_map/arm_neoverse-n1.xml new file mode 100644 index 0000000000..14c7f7c300 --- /dev/null +++ b/src/cpu_map/arm_neoverse-n1.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='Neoverse-N1'> + <vendor name='Ampere'/> + <pvr value='0xd0c'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_vendors.xml b/src/cpu_map/arm_vendors.xml index 92d10565f4..a9a945584b 100644 --- a/src/cpu_map/arm_vendors.xml +++ b/src/cpu_map/arm_vendors.xml @@ -13,4 +13,5 @@ <vendor name='Marvell' value='0x56'/> <vendor name='Intel' value='0x69'/> <vendor name='Phytium' value='0x70'/> + <vendor name='Ampere' value='0x71'/> </cpus> diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index d533a28865..2419fa0a64 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -98,6 +98,9 @@ <include filename='arm_cortex-a57.xml'/> <include filename='arm_cortex-a72.xml'/>
+ <!-- Ampere-based CPU models --> + <include filename='arm_neoverse-n1.xml'/> + <!-- Qualcomm-based CPU models --> <include filename='arm_Falkor.xml'/>
diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build index 99264289e2..c8f2e36eea 100644 --- a/src/cpu_map/meson.build +++ b/src/cpu_map/meson.build @@ -7,6 +7,7 @@ cpumap_data = [ 'arm_FT-2000plus.xml', 'arm_features.xml', 'arm_Kunpeng-920.xml', + 'arm_neoverse-n1.xml', 'arm_Tengyun-S2500.xml', 'arm_ThunderX299xx.xml', 'arm_vendors.xml', -- 2.31.1
Of course, you can check Neoverse N1 core "0xd0c" from the link below. Also do you think I should add the values for neoverse n2 and v1 at the same time? https://developer.arm.com/documentation/100616/0301/register-descriptions/aa... On Tue, Sep 20, 2022 at 8:38 PM Martin Kletzander <mkletzan@redhat.com> wrote:
On Tue, Sep 13, 2022 at 10:10:02PM -0400, Zhenyu Zhang wrote:
Add Neoverse-N1 as a supported cpu model.
I would like to review this patch, but I could not find the vendor ID in any official documentation. I know I am bad at searching, but the only thing I could find was that Ampere vendor uses "0xc0" as the value and part values for neoverse n1/n2/v1 which ought to be "0xd0c", "0xd49" and "0xd40" respectively.
It could speed up the review if you included some pointer to a technical specification or something that would make it easier to check.
Signed-off-by: Zhang Zhenyu <zhenyzha@redhat.com> --- src/cpu_map/arm_neoverse-n1.xml | 6 ++++++ src/cpu_map/arm_vendors.xml | 1 + src/cpu_map/index.xml | 3 +++ src/cpu_map/meson.build | 1 + 4 files changed, 11 insertions(+) create mode 100644 src/cpu_map/arm_neoverse-n1.xml
diff --git a/src/cpu_map/arm_neoverse-n1.xml b/src/cpu_map/arm_neoverse-n1.xml new file mode 100644 index 0000000000..14c7f7c300 --- /dev/null +++ b/src/cpu_map/arm_neoverse-n1.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='Neoverse-N1'> + <vendor name='Ampere'/> + <pvr value='0xd0c'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_vendors.xml b/src/cpu_map/arm_vendors.xml index 92d10565f4..a9a945584b 100644 --- a/src/cpu_map/arm_vendors.xml +++ b/src/cpu_map/arm_vendors.xml @@ -13,4 +13,5 @@ <vendor name='Marvell' value='0x56'/> <vendor name='Intel' value='0x69'/> <vendor name='Phytium' value='0x70'/> + <vendor name='Ampere' value='0x71'/> </cpus> diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index d533a28865..2419fa0a64 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -98,6 +98,9 @@ <include filename='arm_cortex-a57.xml'/> <include filename='arm_cortex-a72.xml'/>
+ <!-- Ampere-based CPU models --> + <include filename='arm_neoverse-n1.xml'/> + <!-- Qualcomm-based CPU models --> <include filename='arm_Falkor.xml'/>
diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build index 99264289e2..c8f2e36eea 100644 --- a/src/cpu_map/meson.build +++ b/src/cpu_map/meson.build @@ -7,6 +7,7 @@ cpumap_data = [ 'arm_FT-2000plus.xml', 'arm_features.xml', 'arm_Kunpeng-920.xml', + 'arm_neoverse-n1.xml', 'arm_Tengyun-S2500.xml', 'arm_ThunderX299xx.xml', 'arm_vendors.xml', -- 2.31.1
On Fri, Sep 23, 2022 at 06:35:52PM +0800, Zhenyu Zhang wrote:
Of course, you can check Neoverse N1 core "0xd0c" from the link below. Also do you think I should add the values for neoverse n2 and v1 at the same time?
Might just as well.
https://developer.arm.com/documentation/100616/0301/register-descriptions/aa...
Thanks, I still can't find that Ampere is 0x71.
On Tue, Sep 20, 2022 at 8:38 PM Martin Kletzander <mkletzan@redhat.com> wrote:
On Tue, Sep 13, 2022 at 10:10:02PM -0400, Zhenyu Zhang wrote:
Add Neoverse-N1 as a supported cpu model.
I would like to review this patch, but I could not find the vendor ID in any official documentation. I know I am bad at searching, but the only thing I could find was that Ampere vendor uses "0xc0" as the value and part values for neoverse n1/n2/v1 which ought to be "0xd0c", "0xd49" and "0xd40" respectively.
It could speed up the review if you included some pointer to a technical specification or something that would make it easier to check.
Signed-off-by: Zhang Zhenyu <zhenyzha@redhat.com> --- src/cpu_map/arm_neoverse-n1.xml | 6 ++++++ src/cpu_map/arm_vendors.xml | 1 + src/cpu_map/index.xml | 3 +++ src/cpu_map/meson.build | 1 + 4 files changed, 11 insertions(+) create mode 100644 src/cpu_map/arm_neoverse-n1.xml
diff --git a/src/cpu_map/arm_neoverse-n1.xml b/src/cpu_map/arm_neoverse-n1.xml new file mode 100644 index 0000000000..14c7f7c300 --- /dev/null +++ b/src/cpu_map/arm_neoverse-n1.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='Neoverse-N1'> + <vendor name='Ampere'/> + <pvr value='0xd0c'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_vendors.xml b/src/cpu_map/arm_vendors.xml index 92d10565f4..a9a945584b 100644 --- a/src/cpu_map/arm_vendors.xml +++ b/src/cpu_map/arm_vendors.xml @@ -13,4 +13,5 @@ <vendor name='Marvell' value='0x56'/> <vendor name='Intel' value='0x69'/> <vendor name='Phytium' value='0x70'/> + <vendor name='Ampere' value='0x71'/> </cpus> diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index d533a28865..2419fa0a64 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -98,6 +98,9 @@ <include filename='arm_cortex-a57.xml'/> <include filename='arm_cortex-a72.xml'/>
+ <!-- Ampere-based CPU models --> + <include filename='arm_neoverse-n1.xml'/> + <!-- Qualcomm-based CPU models --> <include filename='arm_Falkor.xml'/>
diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build index 99264289e2..c8f2e36eea 100644 --- a/src/cpu_map/meson.build +++ b/src/cpu_map/meson.build @@ -7,6 +7,7 @@ cpumap_data = [ 'arm_FT-2000plus.xml', 'arm_features.xml', 'arm_Kunpeng-920.xml', + 'arm_neoverse-n1.xml', 'arm_Tengyun-S2500.xml', 'arm_ThunderX299xx.xml', 'arm_vendors.xml', -- 2.31.1
Oh Sorry I misunderstood, you are right. After checking Ampere is "0xc0" I will correct it in v2. https://llvm.org/doxygen/Host_8cpp_source.html Thanks again. On Fri, Sep 23, 2022 at 9:17 PM Martin Kletzander <mkletzan@redhat.com> wrote:
On Fri, Sep 23, 2022 at 06:35:52PM +0800, Zhenyu Zhang wrote:
Of course, you can check Neoverse N1 core "0xd0c" from the link below. Also do you think I should add the values for neoverse n2 and v1 at the same time?
Might just as well.
https://developer.arm.com/documentation/100616/0301/register-descriptions/aa...
Thanks, I still can't find that Ampere is 0x71.
On Tue, Sep 20, 2022 at 8:38 PM Martin Kletzander <mkletzan@redhat.com> wrote:
On Tue, Sep 13, 2022 at 10:10:02PM -0400, Zhenyu Zhang wrote:
Add Neoverse-N1 as a supported cpu model.
I would like to review this patch, but I could not find the vendor ID in any official documentation. I know I am bad at searching, but the only thing I could find was that Ampere vendor uses "0xc0" as the value and part values for neoverse n1/n2/v1 which ought to be "0xd0c", "0xd49" and "0xd40" respectively.
It could speed up the review if you included some pointer to a technical specification or something that would make it easier to check.
Signed-off-by: Zhang Zhenyu <zhenyzha@redhat.com> --- src/cpu_map/arm_neoverse-n1.xml | 6 ++++++ src/cpu_map/arm_vendors.xml | 1 + src/cpu_map/index.xml | 3 +++ src/cpu_map/meson.build | 1 + 4 files changed, 11 insertions(+) create mode 100644 src/cpu_map/arm_neoverse-n1.xml
diff --git a/src/cpu_map/arm_neoverse-n1.xml b/src/cpu_map/arm_neoverse-n1.xml new file mode 100644 index 0000000000..14c7f7c300 --- /dev/null +++ b/src/cpu_map/arm_neoverse-n1.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='Neoverse-N1'> + <vendor name='Ampere'/> + <pvr value='0xd0c'/> + </model> +</cpus> diff --git a/src/cpu_map/arm_vendors.xml b/src/cpu_map/arm_vendors.xml index 92d10565f4..a9a945584b 100644 --- a/src/cpu_map/arm_vendors.xml +++ b/src/cpu_map/arm_vendors.xml @@ -13,4 +13,5 @@ <vendor name='Marvell' value='0x56'/> <vendor name='Intel' value='0x69'/> <vendor name='Phytium' value='0x70'/> + <vendor name='Ampere' value='0x71'/> </cpus> diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index d533a28865..2419fa0a64 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -98,6 +98,9 @@ <include filename='arm_cortex-a57.xml'/> <include filename='arm_cortex-a72.xml'/>
+ <!-- Ampere-based CPU models --> + <include filename='arm_neoverse-n1.xml'/> + <!-- Qualcomm-based CPU models --> <include filename='arm_Falkor.xml'/>
diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build index 99264289e2..c8f2e36eea 100644 --- a/src/cpu_map/meson.build +++ b/src/cpu_map/meson.build @@ -7,6 +7,7 @@ cpumap_data = [ 'arm_FT-2000plus.xml', 'arm_features.xml', 'arm_Kunpeng-920.xml', + 'arm_neoverse-n1.xml', 'arm_Tengyun-S2500.xml', 'arm_ThunderX299xx.xml', 'arm_vendors.xml', -- 2.31.1
participants (2)
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Martin Kletzander -
Zhenyu Zhang