[libvirt] [PATCH 0/4] cpu: modularize the CPU map data file

Currently we have a cpu_map.xml file that contains all the features and CPU models for all architectures in one place. I frequently find myself wondering about the differences between CPU models, but it is hard to compare them as the list of features is huge. With this patch series we end up with a large set of small files, one per named CPU model, along with one for the feature and vendor definitions cpu_map_ppc64_POWER6.xml cpu_map_ppc64_POWER7.xml cpu_map_ppc64_POWER8.xml cpu_map_ppc64_POWER9.xml cpu_map_ppc64_POWERPC_e5500.xml cpu_map_ppc64_POWERPC_e6500.xml cpu_map_ppc64_vendors.xml cpu_map_x86_486.xml cpu_map_x86_athlon.xml cpu_map_x86_Broadwell-IBRS.xml cpu_map_x86_Broadwell-noTSX-IBRS.xml cpu_map_x86_Broadwell-noTSX.xml cpu_map_x86_Broadwell.xml cpu_map_x86_Conroe.xml cpu_map_x86_core2duo.xml cpu_map_x86_coreduo.xml cpu_map_x86_cpu64-rhel5.xml cpu_map_x86_cpu64-rhel6.xml cpu_map_x86_EPYC-IBRS.xml cpu_map_x86_EPYC.xml cpu_map_x86_features.xml cpu_map_x86_Haswell-IBRS.xml cpu_map_x86_Haswell-noTSX-IBRS.xml cpu_map_x86_Haswell-noTSX.xml cpu_map_x86_Haswell.xml cpu_map_x86_IvyBridge-IBRS.xml cpu_map_x86_IvyBridge.xml cpu_map_x86_kvm32.xml cpu_map_x86_kvm64.xml cpu_map_x86_n270.xml cpu_map_x86_Nehalem-IBRS.xml cpu_map_x86_Nehalem.xml cpu_map_x86_Opteron_G1.xml cpu_map_x86_Opteron_G2.xml cpu_map_x86_Opteron_G3.xml cpu_map_x86_Opteron_G4.xml cpu_map_x86_Opteron_G5.xml cpu_map_x86_Penryn.xml cpu_map_x86_pentium2.xml cpu_map_x86_pentium3.xml cpu_map_x86_pentiumpro.xml cpu_map_x86_pentium.xml cpu_map_x86_phenom.xml cpu_map_x86_qemu32.xml cpu_map_x86_qemu64.xml cpu_map_x86_SandyBridge-IBRS.xml cpu_map_x86_SandyBridge.xml cpu_map_x86_Skylake-Client-IBRS.xml cpu_map_x86_Skylake-Client.xml cpu_map_x86_Skylake-Server-IBRS.xml cpu_map_x86_Skylake-Server.xml cpu_map_x86_vendors.xml cpu_map_x86_Westmere-IBRS.xml cpu_map_x86_Westmere.xml The main cpu_map.xml file is now just a list of <include filename="XXX"/> statements to pull in the individual files Now we can easily see the differences in each model: $ diff cpu_map_x86_Broadwell.xml cpu_map_x86_Skylake-Client.xml 2,3c2,3 < <model name='Broadwell'> < <signature family='6' model='61'/> --- > <model name='Skylake-Client'> > <signature family='6' model='94'/> 5a6 > <feature name='abm'/> 8a10 > <feature name='arat'/> 18a21 > <feature name='f16c'/> 30a34 > <feature name='mpx'/> 42a47 > <feature name='rdrand'/> 56a62 > <feature name='vme'/> 57a64 > <feature name='xgetbv1'/> 58a66,67 > <feature name='xsavec'/> > <feature name='xsaveopt'/> Daniel P. Berrangé (4): cpu: allow include files for CPU definition cpu: push more parsing logic into common code cpu: split PPC64 map data into separate files cpu: split x86 map data into separate files libvirt.spec.in | 2 +- mingw-libvirt.spec.in | 4 +- src/Makefile.am | 2 +- src/cpu/cpu_map.c | 160 +- src/cpu/cpu_map.h | 22 +- src/cpu/cpu_map.xml | 2415 +----------------- src/cpu/cpu_map_ppc64_POWER6.xml | 6 + src/cpu/cpu_map_ppc64_POWER7.xml | 7 + src/cpu/cpu_map_ppc64_POWER8.xml | 8 + src/cpu/cpu_map_ppc64_POWER9.xml | 6 + src/cpu/cpu_map_ppc64_POWERPC_e5500.xml | 6 + src/cpu/cpu_map_ppc64_POWERPC_e6500.xml | 6 + src/cpu/cpu_map_ppc64_vendors.xml | 4 + src/cpu/cpu_map_x86_486.xml | 7 + src/cpu/cpu_map_x86_Broadwell-IBRS.xml | 61 + src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml | 59 + src/cpu/cpu_map_x86_Broadwell-noTSX.xml | 58 + src/cpu/cpu_map_x86_Broadwell.xml | 60 + src/cpu/cpu_map_x86_Conroe.xml | 33 + src/cpu/cpu_map_x86_EPYC-IBRS.xml | 73 + src/cpu/cpu_map_x86_EPYC.xml | 72 + src/cpu/cpu_map_x86_Haswell-IBRS.xml | 57 + src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml | 55 + src/cpu/cpu_map_x86_Haswell-noTSX.xml | 54 + src/cpu/cpu_map_x86_Haswell.xml | 56 + src/cpu/cpu_map_x86_IvyBridge-IBRS.xml | 51 + src/cpu/cpu_map_x86_IvyBridge.xml | 50 + src/cpu/cpu_map_x86_Nehalem-IBRS.xml | 38 + src/cpu/cpu_map_x86_Nehalem.xml | 37 + src/cpu/cpu_map_x86_Opteron_G1.xml | 31 + src/cpu/cpu_map_x86_Opteron_G2.xml | 35 + src/cpu/cpu_map_x86_Opteron_G3.xml | 40 + src/cpu/cpu_map_x86_Opteron_G4.xml | 50 + src/cpu/cpu_map_x86_Opteron_G5.xml | 53 + src/cpu/cpu_map_x86_Penryn.xml | 35 + src/cpu/cpu_map_x86_SandyBridge-IBRS.xml | 45 + src/cpu/cpu_map_x86_SandyBridge.xml | 44 + src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml | 70 + src/cpu/cpu_map_x86_Skylake-Client.xml | 69 + src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml | 77 + src/cpu/cpu_map_x86_Skylake-Server.xml | 76 + src/cpu/cpu_map_x86_Westmere-IBRS.xml | 39 + src/cpu/cpu_map_x86_Westmere.xml | 38 + src/cpu/cpu_map_x86_athlon.xml | 28 + src/cpu/cpu_map_x86_core2duo.xml | 33 + src/cpu/cpu_map_x86_coreduo.xml | 29 + src/cpu/cpu_map_x86_cpu64-rhel5.xml | 29 + src/cpu/cpu_map_x86_cpu64-rhel6.xml | 31 + src/cpu/cpu_map_x86_features.xml | 440 ++++ src/cpu/cpu_map_x86_kvm32.xml | 26 + src/cpu/cpu_map_x86_kvm64.xml | 30 + src/cpu/cpu_map_x86_n270.xml | 30 + src/cpu/cpu_map_x86_pentium.xml | 13 + src/cpu/cpu_map_x86_pentium2.xml | 22 + src/cpu/cpu_map_x86_pentium3.xml | 23 + src/cpu/cpu_map_x86_pentiumpro.xml | 21 + src/cpu/cpu_map_x86_phenom.xml | 36 + src/cpu/cpu_map_x86_qemu32.xml | 22 + src/cpu/cpu_map_x86_qemu64.xml | 40 + src/cpu/cpu_map_x86_vendors.xml | 4 + src/cpu/cpu_ppc64.c | 112 +- src/cpu/cpu_x86.c | 196 +- 62 files changed, 2703 insertions(+), 2633 deletions(-) create mode 100644 src/cpu/cpu_map_ppc64_POWER6.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER7.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER8.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER9.xml create mode 100644 src/cpu/cpu_map_ppc64_POWERPC_e5500.xml create mode 100644 src/cpu/cpu_map_ppc64_POWERPC_e6500.xml create mode 100644 src/cpu/cpu_map_ppc64_vendors.xml create mode 100644 src/cpu/cpu_map_x86_486.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell.xml create mode 100644 src/cpu/cpu_map_x86_Conroe.xml create mode 100644 src/cpu/cpu_map_x86_EPYC-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_EPYC.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX.xml create mode 100644 src/cpu/cpu_map_x86_Haswell.xml create mode 100644 src/cpu/cpu_map_x86_IvyBridge-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_IvyBridge.xml create mode 100644 src/cpu/cpu_map_x86_Nehalem-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Nehalem.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G1.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G2.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G3.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G4.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G5.xml create mode 100644 src/cpu/cpu_map_x86_Penryn.xml create mode 100644 src/cpu/cpu_map_x86_SandyBridge-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_SandyBridge.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Client.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Server.xml create mode 100644 src/cpu/cpu_map_x86_Westmere-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Westmere.xml create mode 100644 src/cpu/cpu_map_x86_athlon.xml create mode 100644 src/cpu/cpu_map_x86_core2duo.xml create mode 100644 src/cpu/cpu_map_x86_coreduo.xml create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel5.xml create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel6.xml create mode 100644 src/cpu/cpu_map_x86_features.xml create mode 100644 src/cpu/cpu_map_x86_kvm32.xml create mode 100644 src/cpu/cpu_map_x86_kvm64.xml create mode 100644 src/cpu/cpu_map_x86_n270.xml create mode 100644 src/cpu/cpu_map_x86_pentium.xml create mode 100644 src/cpu/cpu_map_x86_pentium2.xml create mode 100644 src/cpu/cpu_map_x86_pentium3.xml create mode 100644 src/cpu/cpu_map_x86_pentiumpro.xml create mode 100644 src/cpu/cpu_map_x86_phenom.xml create mode 100644 src/cpu/cpu_map_x86_qemu32.xml create mode 100644 src/cpu/cpu_map_x86_qemu64.xml create mode 100644 src/cpu/cpu_map_x86_vendors.xml -- 2.17.1

Allow for syntax <include filename="fooo.xml"/> to reference other files in the CPU database directory Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- libvirt.spec.in | 2 +- mingw-libvirt.spec.in | 4 +-- src/Makefile.am | 2 +- src/cpu/cpu_map.c | 84 +++++++++++++++++++++++++++++++++++++++++-- 4 files changed, 86 insertions(+), 6 deletions(-) diff --git a/libvirt.spec.in b/libvirt.spec.in index 19ae55cdaf..b6745dbffa 100644 --- a/libvirt.spec.in +++ b/libvirt.spec.in @@ -1856,7 +1856,7 @@ exit 0 %{_datadir}/libvirt/schemas/storagepool.rng %{_datadir}/libvirt/schemas/storagevol.rng -%{_datadir}/libvirt/cpu_map.xml +%{_datadir}/libvirt/cpu_map*.xml %{_datadir}/libvirt/test-screenshot.png diff --git a/mingw-libvirt.spec.in b/mingw-libvirt.spec.in index cc1e619927..22fe7a000f 100644 --- a/mingw-libvirt.spec.in +++ b/mingw-libvirt.spec.in @@ -260,7 +260,7 @@ rm -rf $RPM_BUILD_ROOT%{mingw64_libexecdir}/libvirt-guests.sh %{mingw32_datadir}/libvirt/api/libvirt-qemu-api.xml %{mingw32_datadir}/libvirt/api/libvirt-admin-api.xml -%{mingw32_datadir}/libvirt/cpu_map.xml +%{mingw32_datadir}/libvirt/cpu_map*.xml %{mingw32_datadir}/libvirt/test-screenshot.png @@ -347,7 +347,7 @@ rm -rf $RPM_BUILD_ROOT%{mingw64_libexecdir}/libvirt-guests.sh %{mingw64_datadir}/libvirt/api/libvirt-qemu-api.xml %{mingw64_datadir}/libvirt/api/libvirt-admin-api.xml -%{mingw64_datadir}/libvirt/cpu_map.xml +%{mingw64_datadir}/libvirt/cpu_map*.xml %{mingw64_datadir}/libvirt/test-screenshot.png diff --git a/src/Makefile.am b/src/Makefile.am index a4f213480e..11a7ac81e2 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -366,7 +366,7 @@ check-local: check-protocol check-symfile check-symsorting \ -pkgdata_DATA = cpu/cpu_map.xml +pkgdata_DATA = $(wildcard $(srcdir)/cpu/cpu_map*.xml) EXTRA_DIST += $(pkgdata_DATA) diff --git a/src/cpu/cpu_map.c b/src/cpu/cpu_map.c index d263eb8cdd..9e090919ed 100644 --- a/src/cpu/cpu_map.c +++ b/src/cpu/cpu_map.c @@ -70,6 +70,83 @@ static int load(xmlXPathContextPtr ctxt, return ret; } +static int +cpuMapLoadInclude(const char *filename, + cpuMapLoadCallback cb, + void *data) +{ + xmlDocPtr xml = NULL; + xmlXPathContextPtr ctxt = NULL; + int ret = -1; + int element; + char *mapfile; + + if (!(mapfile = virFileFindResource(filename, + abs_topsrcdir "/src/cpu", + PKGDATADIR))) + return -1; + + VIR_DEBUG("Loading CPU map include from %s", mapfile); + + if (!(xml = virXMLParseFileCtxt(mapfile, &ctxt))) + goto cleanup; + + ctxt->node = xmlDocGetRootElement(xml); + + for (element = 0; element < CPU_MAP_ELEMENT_LAST; element++) { + if (load(ctxt, element, cb, data) < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("cannot parse CPU map '%s'"), mapfile); + goto cleanup; + } + } + + ret = 0; + + cleanup: + xmlXPathFreeContext(ctxt); + xmlFreeDoc(xml); + VIR_FREE(mapfile); + + return ret; +} + + +static int loadIncludes(xmlXPathContextPtr ctxt, + cpuMapLoadCallback callback, + void *data) +{ + int ret = -1; + xmlNodePtr ctxt_node; + xmlNodePtr *nodes = NULL; + int n; + size_t i; + + ctxt_node = ctxt->node; + + n = virXPathNodeSet("include", ctxt, &nodes); + if (n < 0) + goto cleanup; + + for (i = 0; i < n; i++) { + char *filename = virXMLPropString(nodes[i], "filename"); + VIR_DEBUG("Finding CPU map include '%s'", filename); + if (cpuMapLoadInclude(filename, callback, data) < 0) { + VIR_FREE(filename); + goto cleanup; + } + VIR_FREE(filename); + } + + ret = 0; + + cleanup: + ctxt->node = ctxt_node; + VIR_FREE(nodes); + + return ret; +} + int cpuMapLoad(const char *arch, cpuMapLoadCallback cb, @@ -88,7 +165,7 @@ int cpuMapLoad(const char *arch, PKGDATADIR))) return -1; - VIR_DEBUG("Loading CPU map from %s", mapfile); + VIR_DEBUG("Loading '%s' CPU map from %s", arch, mapfile); if (arch == NULL) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -122,11 +199,14 @@ int cpuMapLoad(const char *arch, for (element = 0; element < CPU_MAP_ELEMENT_LAST; element++) { if (load(ctxt, element, cb, data) < 0) { virReportError(VIR_ERR_INTERNAL_ERROR, - _("cannot parse CPU map for %s architecture"), arch); + _("cannot parse CPU map '%s'"), mapfile); goto cleanup; } } + if (loadIncludes(ctxt, cb, data) < 0) + goto cleanup; + ret = 0; cleanup: -- 2.17.1

On 08/01/2018 01:02 PM, Daniel P. Berrangé wrote:
Allow for syntax
<include filename="fooo.xml"/>
to reference other files in the CPU database directory
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- libvirt.spec.in | 2 +- mingw-libvirt.spec.in | 4 +-- src/Makefile.am | 2 +- src/cpu/cpu_map.c | 84 +++++++++++++++++++++++++++++++++++++++++-- 4 files changed, 86 insertions(+), 6 deletions(-)
I'll assume you got the spec/makefile magic correct as it's not in my wheelhouse!
diff --git a/src/cpu/cpu_map.c b/src/cpu/cpu_map.c index d263eb8cdd..9e090919ed 100644 --- a/src/cpu/cpu_map.c +++ b/src/cpu/cpu_map.c @@ -70,6 +70,83 @@ static int load(xmlXPathContextPtr ctxt, return ret; }
[...]
+ + +static int loadIncludes(xmlXPathContextPtr ctxt, + cpuMapLoadCallback callback, + void *data)
static int loadIncludes(...) for consistency
+{ + int ret = -1;
[...]
int cpuMapLoad(const char *arch, cpuMapLoadCallback cb, @@ -88,7 +165,7 @@ int cpuMapLoad(const char *arch, PKGDATADIR))) return -1;
- VIR_DEBUG("Loading CPU map from %s", mapfile); + VIR_DEBUG("Loading '%s' CPU map from %s", arch, mapfile);
Considering the subsequent NULL check: s/arch/NULLSTR(arch)/ or move the VIR_DEBUG after the check (IDC). I'm not even sure why @mapfile filling is above the argument validation checks, but that's a different issue and since more changes are about to come, it's not that important ;-)... As long there is either a NULLSTR or moved message, that's fine. Reviewed-by: John Ferlan <jferlan@redhat.com> John [...]

On Wed, Aug 01, 2018 at 18:02:29 +0100, Daniel P. Berrangé wrote:
Allow for syntax
<include filename="fooo.xml"/>
It seems the code should just work with <include filename="cpu_map/arch_foo.xml"/> but Makefile.am and libvirt.spec would need some adjustment.
to reference other files in the CPU database directory
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- libvirt.spec.in | 2 +- mingw-libvirt.spec.in | 4 +-- src/Makefile.am | 2 +- src/cpu/cpu_map.c | 84 +++++++++++++++++++++++++++++++++++++++++-- 4 files changed, 86 insertions(+), 6 deletions(-)
diff --git a/libvirt.spec.in b/libvirt.spec.in index 19ae55cdaf..b6745dbffa 100644 --- a/libvirt.spec.in +++ b/libvirt.spec.in @@ -1856,7 +1856,7 @@ exit 0 %{_datadir}/libvirt/schemas/storagepool.rng %{_datadir}/libvirt/schemas/storagevol.rng
-%{_datadir}/libvirt/cpu_map.xml +%{_datadir}/libvirt/cpu_map*.xml
%{_datadir}/libvirt/test-screenshot.png
diff --git a/mingw-libvirt.spec.in b/mingw-libvirt.spec.in index cc1e619927..22fe7a000f 100644 --- a/mingw-libvirt.spec.in +++ b/mingw-libvirt.spec.in @@ -260,7 +260,7 @@ rm -rf $RPM_BUILD_ROOT%{mingw64_libexecdir}/libvirt-guests.sh %{mingw32_datadir}/libvirt/api/libvirt-qemu-api.xml %{mingw32_datadir}/libvirt/api/libvirt-admin-api.xml
-%{mingw32_datadir}/libvirt/cpu_map.xml +%{mingw32_datadir}/libvirt/cpu_map*.xml
%{mingw32_datadir}/libvirt/test-screenshot.png
@@ -347,7 +347,7 @@ rm -rf $RPM_BUILD_ROOT%{mingw64_libexecdir}/libvirt-guests.sh %{mingw64_datadir}/libvirt/api/libvirt-qemu-api.xml %{mingw64_datadir}/libvirt/api/libvirt-admin-api.xml
-%{mingw64_datadir}/libvirt/cpu_map.xml +%{mingw64_datadir}/libvirt/cpu_map*.xml
%{mingw64_datadir}/libvirt/test-screenshot.png
diff --git a/src/Makefile.am b/src/Makefile.am index a4f213480e..11a7ac81e2 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -366,7 +366,7 @@ check-local: check-protocol check-symfile check-symsorting \
-pkgdata_DATA = cpu/cpu_map.xml +pkgdata_DATA = $(wildcard $(srcdir)/cpu/cpu_map*.xml)
EXTRA_DIST += $(pkgdata_DATA)
diff --git a/src/cpu/cpu_map.c b/src/cpu/cpu_map.c index d263eb8cdd..9e090919ed 100644 --- a/src/cpu/cpu_map.c +++ b/src/cpu/cpu_map.c @@ -70,6 +70,83 @@ static int load(xmlXPathContextPtr ctxt, .. +static int loadIncludes(xmlXPathContextPtr ctxt, + cpuMapLoadCallback callback, + void *data) +{ + int ret = -1; + xmlNodePtr ctxt_node; + xmlNodePtr *nodes = NULL; + int n; + size_t i; + + ctxt_node = ctxt->node; + + n = virXPathNodeSet("include", ctxt, &nodes); + if (n < 0) + goto cleanup; + + for (i = 0; i < n; i++) { + char *filename = virXMLPropString(nodes[i], "filename");
This would be a nice candidate for VIR_AUTOFREE(char *) :-)
+ VIR_DEBUG("Finding CPU map include '%s'", filename); + if (cpuMapLoadInclude(filename, callback, data) < 0) { + VIR_FREE(filename); + goto cleanup; + } + VIR_FREE(filename); + }
Jirka

On Tue, Aug 14, 2018 at 12:55:19PM +0200, Jiri Denemark wrote:
On Wed, Aug 01, 2018 at 18:02:29 +0100, Daniel P. Berrangé wrote:
Allow for syntax
<include filename="fooo.xml"/>
It seems the code should just work with
<include filename="cpu_map/arch_foo.xml"/>
but Makefile.am and libvirt.spec would need some adjustment.
to reference other files in the CPU database directory
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- libvirt.spec.in | 2 +- mingw-libvirt.spec.in | 4 +-- src/Makefile.am | 2 +- src/cpu/cpu_map.c | 84 +++++++++++++++++++++++++++++++++++++++++-- 4 files changed, 86 insertions(+), 6 deletions(-)
diff --git a/libvirt.spec.in b/libvirt.spec.in index 19ae55cdaf..b6745dbffa 100644 --- a/libvirt.spec.in +++ b/libvirt.spec.in @@ -1856,7 +1856,7 @@ exit 0 %{_datadir}/libvirt/schemas/storagepool.rng %{_datadir}/libvirt/schemas/storagevol.rng
-%{_datadir}/libvirt/cpu_map.xml +%{_datadir}/libvirt/cpu_map*.xml
%{_datadir}/libvirt/test-screenshot.png
diff --git a/mingw-libvirt.spec.in b/mingw-libvirt.spec.in index cc1e619927..22fe7a000f 100644 --- a/mingw-libvirt.spec.in +++ b/mingw-libvirt.spec.in @@ -260,7 +260,7 @@ rm -rf $RPM_BUILD_ROOT%{mingw64_libexecdir}/libvirt-guests.sh %{mingw32_datadir}/libvirt/api/libvirt-qemu-api.xml %{mingw32_datadir}/libvirt/api/libvirt-admin-api.xml
-%{mingw32_datadir}/libvirt/cpu_map.xml +%{mingw32_datadir}/libvirt/cpu_map*.xml
%{mingw32_datadir}/libvirt/test-screenshot.png
@@ -347,7 +347,7 @@ rm -rf $RPM_BUILD_ROOT%{mingw64_libexecdir}/libvirt-guests.sh %{mingw64_datadir}/libvirt/api/libvirt-qemu-api.xml %{mingw64_datadir}/libvirt/api/libvirt-admin-api.xml
-%{mingw64_datadir}/libvirt/cpu_map.xml +%{mingw64_datadir}/libvirt/cpu_map*.xml
%{mingw64_datadir}/libvirt/test-screenshot.png
diff --git a/src/Makefile.am b/src/Makefile.am index a4f213480e..11a7ac81e2 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -366,7 +366,7 @@ check-local: check-protocol check-symfile check-symsorting \
-pkgdata_DATA = cpu/cpu_map.xml +pkgdata_DATA = $(wildcard $(srcdir)/cpu/cpu_map*.xml)
EXTRA_DIST += $(pkgdata_DATA)
diff --git a/src/cpu/cpu_map.c b/src/cpu/cpu_map.c index d263eb8cdd..9e090919ed 100644 --- a/src/cpu/cpu_map.c +++ b/src/cpu/cpu_map.c @@ -70,6 +70,83 @@ static int load(xmlXPathContextPtr ctxt, .. +static int loadIncludes(xmlXPathContextPtr ctxt, + cpuMapLoadCallback callback, + void *data) +{ + int ret = -1; + xmlNodePtr ctxt_node; + xmlNodePtr *nodes = NULL; + int n; + size_t i; + + ctxt_node = ctxt->node; + + n = virXPathNodeSet("include", ctxt, &nodes); + if (n < 0) + goto cleanup; + + for (i = 0; i < n; i++) { + char *filename = virXMLPropString(nodes[i], "filename");
This would be a nice candidate for VIR_AUTOFREE(char *) :-)
Since none of the src/cpu code has been switched to this style yet, its probably best not to introduce it here. Rather wait for the bulk convert Regards, Daniel -- |: https://berrange.com -o- https://www.flickr.com/photos/dberrange :| |: https://libvirt.org -o- https://fstop138.berrange.com :| |: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|

The x86 and ppc impls both duplicate some logic when parsing CPU features. Change the callback signature so that this duplication can be pushed up a level to common code. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- src/cpu/cpu_map.c | 106 +++++++++++++++--------- src/cpu/cpu_map.h | 22 ++--- src/cpu/cpu_ppc64.c | 112 ++++++------------------- src/cpu/cpu_x86.c | 196 +++++++++++++------------------------------- 4 files changed, 155 insertions(+), 281 deletions(-) diff --git a/src/cpu/cpu_map.c b/src/cpu/cpu_map.c index 9e090919ed..17ed53fda6 100644 --- a/src/cpu/cpu_map.c +++ b/src/cpu/cpu_map.c @@ -35,31 +35,51 @@ VIR_LOG_INIT("cpu.cpu_map"); -VIR_ENUM_IMPL(cpuMapElement, CPU_MAP_ELEMENT_LAST, - "vendor", - "feature", - "model") - - -static int load(xmlXPathContextPtr ctxt, - cpuMapElement element, - cpuMapLoadCallback callback, - void *data) +static int +loadData(const char *mapfile, + xmlXPathContextPtr ctxt, + const char *xpath, + cpuMapLoadCallback callback, + void *data) { int ret = -1; xmlNodePtr ctxt_node; xmlNodePtr *nodes = NULL; int n; + size_t i; + int rv; ctxt_node = ctxt->node; - n = virXPathNodeSet(cpuMapElementTypeToString(element), ctxt, &nodes); - if (n < 0) + n = virXPathNodeSet(xpath, ctxt, &nodes); + if (n < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("cannot find '%s' in CPU map '%s'"), xpath, mapfile); goto cleanup; + } - if (n > 0 && - callback(element, ctxt, nodes, n, data) < 0) + if (n > 0 && !callback) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Unexpected %s in CPU map '%s'"), xpath, mapfile); goto cleanup; + } + + for (i = 0; i < n; i++) { + xmlNodePtr old = ctxt->node; + char *name = virXMLPropString(nodes[i], "name"); + if (!name) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("cannot find %s name in CPU map '%s'"), xpath, mapfile); + goto cleanup; + } + VIR_DEBUG("Load %s name %s", xpath, name); + ctxt->node = nodes[i]; + rv = callback(ctxt, name, data); + ctxt->node = old; + VIR_FREE(name); + if (rv < 0) + goto cleanup; + } ret = 0; @@ -72,13 +92,14 @@ static int load(xmlXPathContextPtr ctxt, static int cpuMapLoadInclude(const char *filename, - cpuMapLoadCallback cb, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { xmlDocPtr xml = NULL; xmlXPathContextPtr ctxt = NULL; int ret = -1; - int element; char *mapfile; if (!(mapfile = virFileFindResource(filename, @@ -93,13 +114,14 @@ cpuMapLoadInclude(const char *filename, ctxt->node = xmlDocGetRootElement(xml); - for (element = 0; element < CPU_MAP_ELEMENT_LAST; element++) { - if (load(ctxt, element, cb, data) < 0) { - virReportError(VIR_ERR_INTERNAL_ERROR, - _("cannot parse CPU map '%s'"), mapfile); - goto cleanup; - } - } + if (loadData(mapfile, ctxt, "vendor", vendorCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "feature", featureCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "model", modelCB, data) < 0) + goto cleanup; ret = 0; @@ -113,7 +135,9 @@ cpuMapLoadInclude(const char *filename, static int loadIncludes(xmlXPathContextPtr ctxt, - cpuMapLoadCallback callback, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { int ret = -1; @@ -131,7 +155,7 @@ static int loadIncludes(xmlXPathContextPtr ctxt, for (i = 0; i < n; i++) { char *filename = virXMLPropString(nodes[i], "filename"); VIR_DEBUG("Finding CPU map include '%s'", filename); - if (cpuMapLoadInclude(filename, callback, data) < 0) { + if (cpuMapLoadInclude(filename, vendorCB, featureCB, modelCB, data) < 0) { VIR_FREE(filename); goto cleanup; } @@ -149,7 +173,9 @@ static int loadIncludes(xmlXPathContextPtr ctxt, int cpuMapLoad(const char *arch, - cpuMapLoadCallback cb, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { xmlDocPtr xml = NULL; @@ -157,7 +183,6 @@ int cpuMapLoad(const char *arch, virBuffer buf = VIR_BUFFER_INITIALIZER; char *xpath = NULL; int ret = -1; - int element; char *mapfile; if (!(mapfile = virFileFindResource("cpu_map.xml", @@ -173,9 +198,15 @@ int cpuMapLoad(const char *arch, goto cleanup; } - if (cb == NULL) { + if (vendorCB == NULL) { + virReportError(VIR_ERR_INTERNAL_ERROR, + "%s", _("no vendor callback provided")); + goto cleanup; + } + + if (modelCB == NULL) { virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("no callback provided")); + "%s", _("no model callback provided")); goto cleanup; } @@ -196,15 +227,16 @@ int cpuMapLoad(const char *arch, goto cleanup; } - for (element = 0; element < CPU_MAP_ELEMENT_LAST; element++) { - if (load(ctxt, element, cb, data) < 0) { - virReportError(VIR_ERR_INTERNAL_ERROR, - _("cannot parse CPU map '%s'"), mapfile); - goto cleanup; - } - } + if (loadData(mapfile, ctxt, "vendor", vendorCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "feature", featureCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "model", modelCB, data) < 0) + goto cleanup; - if (loadIncludes(ctxt, cb, data) < 0) + if (loadIncludes(ctxt, vendorCB, featureCB, modelCB, data) < 0) goto cleanup; ret = 0; diff --git a/src/cpu/cpu_map.h b/src/cpu/cpu_map.h index 0c7507e98f..4596987150 100644 --- a/src/cpu/cpu_map.h +++ b/src/cpu/cpu_map.h @@ -26,28 +26,16 @@ # include "virxml.h" - -typedef enum { - CPU_MAP_ELEMENT_VENDOR, - CPU_MAP_ELEMENT_FEATURE, - CPU_MAP_ELEMENT_MODEL, - - CPU_MAP_ELEMENT_LAST -} cpuMapElement; - -VIR_ENUM_DECL(cpuMapElement) - - typedef int -(*cpuMapLoadCallback) (cpuMapElement element, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n, +(*cpuMapLoadCallback) (xmlXPathContextPtr ctxt, + const char *name, void *data); int cpuMapLoad(const char *arch, - cpuMapLoadCallback cb, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data); #endif /* __VIR_CPU_MAP_H__ */ diff --git a/src/cpu/cpu_ppc64.c b/src/cpu/cpu_ppc64.c index d562677fa3..75da5b77d8 100644 --- a/src/cpu/cpu_ppc64.c +++ b/src/cpu/cpu_ppc64.c @@ -281,21 +281,19 @@ ppc64MapFree(struct ppc64_map *map) VIR_FREE(map); } -static struct ppc64_vendor * -ppc64VendorParse(xmlXPathContextPtr ctxt, - struct ppc64_map *map) +static int +ppc64VendorParse(xmlXPathContextPtr ctxt ATTRIBUTE_UNUSED, + const char *name, + void *data) { + struct ppc64_map *map = data; struct ppc64_vendor *vendor; if (VIR_ALLOC(vendor) < 0) - return NULL; + return -1; - vendor->name = virXPathString("string(@name)", ctxt); - if (!vendor->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU vendor name")); + if (VIR_STRDUP(vendor->name, name) < 0) goto error; - } if (ppc64VendorFind(map, vendor->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -303,57 +301,36 @@ ppc64VendorParse(xmlXPathContextPtr ctxt, goto error; } - return vendor; + if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0) + goto error; + + return 0; error: ppc64VendorFree(vendor); - return NULL; + return -1; } static int -ppc64VendorsLoad(struct ppc64_map *map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - struct ppc64_vendor *vendor; - size_t i; - - if (VIR_ALLOC_N(map->vendors, n) < 0) - return -1; - - for (i = 0; i < n; i++) { - ctxt->node = nodes[i]; - if (!(vendor = ppc64VendorParse(ctxt, map))) - return -1; - map->vendors[map->nvendors++] = vendor; - } - - return 0; -} - - -static struct ppc64_model * ppc64ModelParse(xmlXPathContextPtr ctxt, - struct ppc64_map *map) + const char *name, + void *data) { + struct ppc64_map *map = data; struct ppc64_model *model; xmlNodePtr *nodes = NULL; char *vendor = NULL; unsigned long pvr; size_t i; int n; + int ret = -1; if (VIR_ALLOC(model) < 0) goto error; - model->name = virXPathString("string(@name)", ctxt); - if (!model->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU model name")); + if (VIR_STRDUP(model->name, name) < 0) goto error; - } if (ppc64ModelFind(map, model->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -410,63 +387,22 @@ ppc64ModelParse(xmlXPathContextPtr ctxt, model->data.pvr[i].mask = pvr; } + if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + goto error; + + ret = 0; + cleanup: VIR_FREE(vendor); VIR_FREE(nodes); - return model; + return ret; error: ppc64ModelFree(model); - model = NULL; goto cleanup; } -static int -ppc64ModelsLoad(struct ppc64_map *map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - struct ppc64_model *model; - size_t i; - - if (VIR_ALLOC_N(map->models, n) < 0) - return -1; - - for (i = 0; i < n; i++) { - ctxt->node = nodes[i]; - if (!(model = ppc64ModelParse(ctxt, map))) - return -1; - map->models[map->nmodels++] = model; - } - - return 0; -} - - -static int -ppc64MapLoadCallback(cpuMapElement element, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n, - void *data) -{ - struct ppc64_map *map = data; - - switch (element) { - case CPU_MAP_ELEMENT_VENDOR: - return ppc64VendorsLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_MODEL: - return ppc64ModelsLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_FEATURE: - case CPU_MAP_ELEMENT_LAST: - break; - } - - return 0; -} - static struct ppc64_map * ppc64LoadMap(void) { @@ -475,7 +411,7 @@ ppc64LoadMap(void) if (VIR_ALLOC(map) < 0) goto error; - if (cpuMapLoad("ppc64", ppc64MapLoadCallback, map) < 0) + if (cpuMapLoad("ppc64", ppc64VendorParse, NULL, ppc64ModelParse, map) < 0) goto error; return map; diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index 809da94117..76f1d417c1 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -712,22 +712,21 @@ x86VendorFind(virCPUx86MapPtr map, } -static virCPUx86VendorPtr +static int x86VendorParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) { + virCPUx86MapPtr map = data; virCPUx86VendorPtr vendor = NULL; char *string = NULL; + int ret = -1; if (VIR_ALLOC(vendor) < 0) goto error; - vendor->name = virXPathString("string(@name)", ctxt); - if (!vendor->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, "%s", - _("Missing CPU vendor name")); + if (VIR_STRDUP(vendor->name, name) < 0) goto error; - } if (x86VendorFind(map, vendor->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -746,40 +745,21 @@ x86VendorParse(xmlXPathContextPtr ctxt, if (virCPUx86VendorToCPUID(string, &vendor->cpuid) < 0) goto error; + if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0) + goto error; + + ret = 0; + cleanup: VIR_FREE(string); - return vendor; + return ret; error: x86VendorFree(vendor); - vendor = NULL; goto cleanup; } -static int -x86VendorsLoad(virCPUx86MapPtr map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - virCPUx86VendorPtr vendor; - size_t i; - - if (VIR_ALLOC_N(map->vendors, n) < 0) - return -1; - - for (i = 0; i < n; i++) { - ctxt->node = nodes[i]; - if (!(vendor = x86VendorParse(ctxt, map))) - return -1; - map->vendors[map->nvendors++] = vendor; - } - - return 0; -} - - static virCPUx86FeaturePtr x86FeatureNew(void) { @@ -901,27 +881,27 @@ x86ParseCPUID(xmlXPathContextPtr ctxt, } -static virCPUx86FeaturePtr +static int x86FeatureParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) { + virCPUx86MapPtr map = data; xmlNodePtr *nodes = NULL; virCPUx86FeaturePtr feature; virCPUx86CPUID cpuid; size_t i; int n; char *str = NULL; + int ret = -1; if (!(feature = x86FeatureNew())) goto error; feature->migratable = true; - feature->name = virXPathString("string(@name)", ctxt); - if (!feature->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU feature name")); + + if (VIR_STRDUP(feature->name, name) < 0) goto error; - } if (x86FeatureFind(map, feature->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -949,46 +929,28 @@ x86FeatureParse(xmlXPathContextPtr ctxt, goto error; } + if (!feature->migratable && + VIR_APPEND_ELEMENT_COPY(map->migrate_blockers, + map->nblockers, + feature) < 0) + goto error; + + if (VIR_APPEND_ELEMENT(map->features, map->nfeatures, feature) < 0) + goto error; + + ret = 0; + cleanup: VIR_FREE(nodes); VIR_FREE(str); - return feature; + return ret; error: x86FeatureFree(feature); - feature = NULL; goto cleanup; } -static int -x86FeaturesLoad(virCPUx86MapPtr map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - virCPUx86FeaturePtr feature; - size_t i; - - if (VIR_ALLOC_N(map->features, n) < 0) - return -1; - - for (i = 0; i < n; i++) { - ctxt->node = nodes[i]; - if (!(feature = x86FeatureParse(ctxt, map))) - return -1; - map->features[map->nfeatures++] = feature; - if (!feature->migratable && - VIR_APPEND_ELEMENT(map->migrate_blockers, - map->nblockers, - feature) < 0) - return -1; - } - - return 0; -} - - static virCPUx86ModelPtr x86ModelNew(void) { @@ -1184,47 +1146,46 @@ x86ModelCompare(virCPUx86ModelPtr model1, } -static virCPUx86ModelPtr +static int x86ModelParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) { + virCPUx86MapPtr map = data; xmlNodePtr *nodes = NULL; virCPUx86ModelPtr model; char *vendor = NULL; size_t i; int n; + int ret = -1; if (!(model = x86ModelNew())) goto error; - model->name = virXPathString("string(@name)", ctxt); - if (!model->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU model name")); + if (VIR_STRDUP(model->name, name) < 0) goto error; - } if (virXPathNode("./model", ctxt)) { virCPUx86ModelPtr ancestor; - char *name; + char *anname; - name = virXPathString("string(./model/@name)", ctxt); - if (!name) { + anname = virXPathString("string(./model/@name)", ctxt); + if (!anname) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Missing ancestor's name in CPU model %s"), model->name); goto error; } - if (!(ancestor = x86ModelFind(map, name))) { + if (!(ancestor = x86ModelFind(map, anname))) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Ancestor model %s not found for CPU model %s"), - name, model->name); - VIR_FREE(name); + anname, model->name); + VIR_FREE(anname); goto error; } - VIR_FREE(name); + VIR_FREE(anname); model->vendor = ancestor->vendor; model->signature = ancestor->signature; @@ -1279,62 +1240,43 @@ x86ModelParse(xmlXPathContextPtr ctxt, for (i = 0; i < n; i++) { virCPUx86FeaturePtr feature; - char *name; + char *ftname; - if (!(name = virXMLPropString(nodes[i], "name"))) { + if (!(ftname = virXMLPropString(nodes[i], "name"))) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Missing feature name for CPU model %s"), model->name); goto error; } - if (!(feature = x86FeatureFind(map, name))) { + if (!(feature = x86FeatureFind(map, ftname))) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Feature %s required by CPU model %s not found"), - name, model->name); - VIR_FREE(name); + ftname, model->name); + VIR_FREE(ftname); goto error; } - VIR_FREE(name); + VIR_FREE(ftname); if (x86DataAdd(&model->data, &feature->data)) goto error; } + if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + goto error; + + ret = 0; + cleanup: VIR_FREE(vendor); VIR_FREE(nodes); - return model; + return ret; error: x86ModelFree(model); - model = NULL; goto cleanup; } -static int -x86ModelsLoad(virCPUx86MapPtr map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - virCPUx86ModelPtr model; - size_t i; - - if (VIR_ALLOC_N(map->models, n) < 0) - return -1; - - for (i = 0; i < n; i++) { - ctxt->node = nodes[i]; - if (!(model = x86ModelParse(ctxt, map))) - return -1; - map->models[map->nmodels++] = model; - } - - return 0; -} - - static void x86MapFree(virCPUx86MapPtr map) { @@ -1364,30 +1306,6 @@ x86MapFree(virCPUx86MapPtr map) } -static int -x86MapLoadCallback(cpuMapElement element, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n, - void *data) -{ - virCPUx86MapPtr map = data; - - switch (element) { - case CPU_MAP_ELEMENT_VENDOR: - return x86VendorsLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_FEATURE: - return x86FeaturesLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_MODEL: - return x86ModelsLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_LAST: - break; - } - - return 0; -} - - static virCPUx86MapPtr virCPUx86LoadMap(void) { @@ -1396,7 +1314,7 @@ virCPUx86LoadMap(void) if (VIR_ALLOC(map) < 0) return NULL; - if (cpuMapLoad("x86", x86MapLoadCallback, map) < 0) + if (cpuMapLoad("x86", x86VendorParse, x86FeatureParse, x86ModelParse, map) < 0) goto error; return map; -- 2.17.1

On 08/01/2018 01:02 PM, Daniel P. Berrangé wrote:
The x86 and ppc impls both duplicate some logic when parsing CPU features. Change the callback signature so that this duplication can be pushed up a level to common code.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- src/cpu/cpu_map.c | 106 +++++++++++++++--------- src/cpu/cpu_map.h | 22 ++--- src/cpu/cpu_ppc64.c | 112 ++++++------------------- src/cpu/cpu_x86.c | 196 +++++++++++++------------------------------- 4 files changed, 155 insertions(+), 281 deletions(-)
diff --git a/src/cpu/cpu_map.c b/src/cpu/cpu_map.c index 9e090919ed..17ed53fda6 100644 --- a/src/cpu/cpu_map.c +++ b/src/cpu/cpu_map.c @@ -35,31 +35,51 @@
VIR_LOG_INIT("cpu.cpu_map");
-VIR_ENUM_IMPL(cpuMapElement, CPU_MAP_ELEMENT_LAST, - "vendor", - "feature", - "model") - - -static int load(xmlXPathContextPtr ctxt, - cpuMapElement element, - cpuMapLoadCallback callback, - void *data) +static int +loadData(const char *mapfile, + xmlXPathContextPtr ctxt, + const char *xpath, + cpuMapLoadCallback callback, + void *data) { int ret = -1; xmlNodePtr ctxt_node; xmlNodePtr *nodes = NULL; int n; + size_t i; + int rv;
ctxt_node = ctxt->node;
- n = virXPathNodeSet(cpuMapElementTypeToString(element), ctxt, &nodes); - if (n < 0) + n = virXPathNodeSet(xpath, ctxt, &nodes); + if (n < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("cannot find '%s' in CPU map '%s'"), xpath, mapfile); goto cleanup; + }
- if (n > 0 && - callback(element, ctxt, nodes, n, data) < 0) + if (n > 0 && !callback) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Unexpected %s in CPU map '%s'"), xpath, mapfile);
How about "Unexpected element %s..." to be fair it's a callback function isn't provided for a specific arch, but adding that level of detail would be a bit more painful for the low level of benefit at least.
goto cleanup; + } +
[...]
int cpuMapLoad(const char *arch, - cpuMapLoadCallback cb, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { xmlDocPtr xml = NULL; @@ -157,7 +183,6 @@ int cpuMapLoad(const char *arch, virBuffer buf = VIR_BUFFER_INITIALIZER; char *xpath = NULL; int ret = -1; - int element; char *mapfile;
if (!(mapfile = virFileFindResource("cpu_map.xml", @@ -173,9 +198,15 @@ int cpuMapLoad(const char *arch, goto cleanup; }
- if (cb == NULL) { + if (vendorCB == NULL) { + virReportError(VIR_ERR_INTERNAL_ERROR, + "%s", _("no vendor callback provided")); + goto cleanup; + }
To be fair, loadData does check "if (n > 0 && !callback)", so these checks perhaps aren't necessary as if they were NULL we'd fail a bit later on (if I'm reading things properly ;-)). I suppose it doesn't matter if they stay or not until someone, some day wonders why featureCB isn't checked.
+ + if (modelCB == NULL) { virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("no callback provided")); + "%s", _("no model callback provided")); goto cleanup; }
[...]
diff --git a/src/cpu/cpu_ppc64.c b/src/cpu/cpu_ppc64.c index d562677fa3..75da5b77d8 100644 --- a/src/cpu/cpu_ppc64.c +++ b/src/cpu/cpu_ppc64.c @@ -281,21 +281,19 @@ ppc64MapFree(struct ppc64_map *map) VIR_FREE(map); }
[...]
ppc64ModelParse(xmlXPathContextPtr ctxt, - struct ppc64_map *map) + const char *name, + void *data) { + struct ppc64_map *map = data; struct ppc64_model *model; xmlNodePtr *nodes = NULL; char *vendor = NULL; unsigned long pvr; size_t i; int n; + int ret = -1;
if (VIR_ALLOC(model) < 0) goto error;
- model->name = virXPathString("string(@name)", ctxt); - if (!model->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU model name")); + if (VIR_STRDUP(model->name, name) < 0) goto error; - }
if (ppc64ModelFind(map, model->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -410,63 +387,22 @@ ppc64ModelParse(xmlXPathContextPtr ctxt, model->data.pvr[i].mask = pvr; }
+ if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + goto error; +
Since VIR_APPEND_ELEMENT would clear @model on success, we don't necessarily need the error and cleanup labels. More churn on the changes though with the ppc64ModelFree moved to cleanup.
+ ret = 0; + cleanup: VIR_FREE(vendor); VIR_FREE(nodes); - return model; + return ret;
error: ppc64ModelFree(model); - model = NULL; goto cleanup; }
[...]
diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index 809da94117..76f1d417c1 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -712,22 +712,21 @@ x86VendorFind(virCPUx86MapPtr map, }
-static virCPUx86VendorPtr +static int x86VendorParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) { + virCPUx86MapPtr map = data; virCPUx86VendorPtr vendor = NULL; char *string = NULL; + int ret = -1;
if (VIR_ALLOC(vendor) < 0) goto error;
- vendor->name = virXPathString("string(@name)", ctxt); - if (!vendor->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, "%s", - _("Missing CPU vendor name")); + if (VIR_STRDUP(vendor->name, name) < 0) goto error; - }
if (x86VendorFind(map, vendor->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -746,40 +745,21 @@ x86VendorParse(xmlXPathContextPtr ctxt, if (virCPUx86VendorToCPUID(string, &vendor->cpuid) < 0) goto error;
+ if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0) + goto error;
Similar comment here regarding macro and cleanup/error labels
+ + ret = 0; + cleanup: VIR_FREE(string); - return vendor; + return ret;
error: x86VendorFree(vendor); - vendor = NULL; goto cleanup; }
[...]
-static virCPUx86FeaturePtr +static int x86FeatureParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) { + virCPUx86MapPtr map = data; xmlNodePtr *nodes = NULL; virCPUx86FeaturePtr feature; virCPUx86CPUID cpuid; size_t i; int n; char *str = NULL; + int ret = -1;
if (!(feature = x86FeatureNew())) goto error;
feature->migratable = true; - feature->name = virXPathString("string(@name)", ctxt); - if (!feature->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU feature name")); + + if (VIR_STRDUP(feature->name, name) < 0) goto error; - }
if (x86FeatureFind(map, feature->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -949,46 +929,28 @@ x86FeatureParse(xmlXPathContextPtr ctxt, goto error; }
+ if (!feature->migratable && + VIR_APPEND_ELEMENT_COPY(map->migrate_blockers, + map->nblockers, + feature) < 0) + goto error; + + if (VIR_APPEND_ELEMENT(map->features, map->nfeatures, feature) < 0) + goto error; +
Same here too.
+ ret = 0; + cleanup: VIR_FREE(nodes); VIR_FREE(str); - return feature; + return ret;
error: x86FeatureFree(feature); - feature = NULL; goto cleanup; }
[...]
+static int x86ModelParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) {
[...]
+ if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + goto error;
Similar regarding cleanup/error; however, ...
+ + ret = 0; + cleanup:
I ran the changes through Coverity and it complains here because one can goto cleanup if the signature code fails, return -1, but the @model wouldn't be free'd. Prior to this change it seems failing in that code wasn't necessarily an error, but it would generate the error, not go through the vendor and feature processing, and return a somewhat empty @model. Perhaps a bug in existing code, but uncovered in this refactoring.
VIR_FREE(vendor); VIR_FREE(nodes); - return model; + return ret;
error: x86ModelFree(model); - model = NULL; goto cleanup; }
[...] Whether the VIR_APPEND_ELEMENT cleanup/error changes are made is your call. The code is fine as is. I think the signature return issue noted in x86ModelParse should probably be it's own patch, but I'm not 100% clear what would happen if you now error instead of just returning a mostly empty model. Since it'd be developer error generating the file, perhaps we should just error. Hopefully Jirka chimes in! Reviewed-by: John Ferlan <jferlan@redhat.com> John

On Mon, Aug 13, 2018 at 18:27:06 -0400, John Ferlan wrote:
On 08/01/2018 01:02 PM, Daniel P. Berrangé wrote:
The x86 and ppc impls both duplicate some logic when parsing CPU features. Change the callback signature so that this duplication can be pushed up a level to common code.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- src/cpu/cpu_map.c | 106 +++++++++++++++--------- src/cpu/cpu_map.h | 22 ++--- src/cpu/cpu_ppc64.c | 112 ++++++------------------- src/cpu/cpu_x86.c | 196 +++++++++++++------------------------------- 4 files changed, 155 insertions(+), 281 deletions(-)
...
+static int x86ModelParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) {
[...]
+ if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + goto error;
Similar regarding cleanup/error; however, ...
+ + ret = 0; + cleanup:
I ran the changes through Coverity and it complains here because one can goto cleanup if the signature code fails, return -1, but the @model wouldn't be free'd.
Prior to this change it seems failing in that code wasn't necessarily an error, but it would generate the error, not go through the vendor and feature processing, and return a somewhat empty @model. Perhaps a bug in existing code, but uncovered in this refactoring.
Hmm, the gotos in the signature code should be jumping to the error label. I guess the best fix would be a separate patch removing the error label completely. Jirka

On Wed, Aug 01, 2018 at 18:02:30 +0100, Daniel P. Berrangé wrote:
The x86 and ppc impls both duplicate some logic when parsing CPU features. Change the callback signature so that this duplication can be pushed up a level to common code.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- src/cpu/cpu_map.c | 106 +++++++++++++++--------- src/cpu/cpu_map.h | 22 ++--- src/cpu/cpu_ppc64.c | 112 ++++++------------------- src/cpu/cpu_x86.c | 196 +++++++++++++------------------------------- 4 files changed, 155 insertions(+), 281 deletions(-)
diff --git a/src/cpu/cpu_map.c b/src/cpu/cpu_map.c index 9e090919ed..17ed53fda6 100644 --- a/src/cpu/cpu_map.c +++ b/src/cpu/cpu_map.c @@ -35,31 +35,51 @@
VIR_LOG_INIT("cpu.cpu_map");
-VIR_ENUM_IMPL(cpuMapElement, CPU_MAP_ELEMENT_LAST, - "vendor", - "feature", - "model") - - -static int load(xmlXPathContextPtr ctxt, - cpuMapElement element, - cpuMapLoadCallback callback, - void *data) +static int +loadData(const char *mapfile, + xmlXPathContextPtr ctxt, + const char *xpath,
Do you have any further plans with @xpath and actually pass something more fancy than just an element name in it? If not, I'd suggest renaming this parameter as "element" or something similar. Initially I was confused what XPath expression you'd be passing to loadData and whether including the expression in the error messages is a good idea.
+ cpuMapLoadCallback callback, + void *data) { int ret = -1; xmlNodePtr ctxt_node; xmlNodePtr *nodes = NULL; int n; + size_t i; + int rv;
ctxt_node = ctxt->node;
- n = virXPathNodeSet(cpuMapElementTypeToString(element), ctxt, &nodes); - if (n < 0) + n = virXPathNodeSet(xpath, ctxt, &nodes); + if (n < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("cannot find '%s' in CPU map '%s'"), xpath, mapfile);
virXPathNodeSet already reports an appropriate error message before returning -1. Not to mention that the function would return 0 if the element was not found (in which case you don't want to report error anyway). Simply removing the call to virReportError will fix both issues.
goto cleanup; + }
- if (n > 0 && - callback(element, ctxt, nodes, n, data) < 0) + if (n > 0 && !callback) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Unexpected %s in CPU map '%s'"), xpath, mapfile); goto cleanup; + } + + for (i = 0; i < n; i++) { + xmlNodePtr old = ctxt->node; + char *name = virXMLPropString(nodes[i], "name"); + if (!name) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("cannot find %s name in CPU map '%s'"), xpath, mapfile); + goto cleanup; + } + VIR_DEBUG("Load %s name %s", xpath, name); + ctxt->node = nodes[i]; + rv = callback(ctxt, name, data); + ctxt->node = old; + VIR_FREE(name); + if (rv < 0) + goto cleanup; + }
ret = 0;
@@ -72,13 +92,14 @@ static int load(xmlXPathContextPtr ctxt,
static int cpuMapLoadInclude(const char *filename, - cpuMapLoadCallback cb, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { xmlDocPtr xml = NULL; xmlXPathContextPtr ctxt = NULL; int ret = -1; - int element; char *mapfile;
if (!(mapfile = virFileFindResource(filename, @@ -93,13 +114,14 @@ cpuMapLoadInclude(const char *filename,
ctxt->node = xmlDocGetRootElement(xml);
- for (element = 0; element < CPU_MAP_ELEMENT_LAST; element++) { - if (load(ctxt, element, cb, data) < 0) { - virReportError(VIR_ERR_INTERNAL_ERROR, - _("cannot parse CPU map '%s'"), mapfile); - goto cleanup; - } - } + if (loadData(mapfile, ctxt, "vendor", vendorCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "feature", featureCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "model", modelCB, data) < 0) + goto cleanup;
ret = 0;
@@ -113,7 +135,9 @@ cpuMapLoadInclude(const char *filename,
static int loadIncludes(xmlXPathContextPtr ctxt, - cpuMapLoadCallback callback, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { int ret = -1; @@ -131,7 +155,7 @@ static int loadIncludes(xmlXPathContextPtr ctxt, for (i = 0; i < n; i++) { char *filename = virXMLPropString(nodes[i], "filename"); VIR_DEBUG("Finding CPU map include '%s'", filename); - if (cpuMapLoadInclude(filename, callback, data) < 0) { + if (cpuMapLoadInclude(filename, vendorCB, featureCB, modelCB, data) < 0) { VIR_FREE(filename); goto cleanup; } @@ -149,7 +173,9 @@ static int loadIncludes(xmlXPathContextPtr ctxt,
int cpuMapLoad(const char *arch, - cpuMapLoadCallback cb, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { xmlDocPtr xml = NULL; @@ -157,7 +183,6 @@ int cpuMapLoad(const char *arch, virBuffer buf = VIR_BUFFER_INITIALIZER; char *xpath = NULL; int ret = -1; - int element; char *mapfile;
if (!(mapfile = virFileFindResource("cpu_map.xml", @@ -173,9 +198,15 @@ int cpuMapLoad(const char *arch, goto cleanup; }
- if (cb == NULL) { + if (vendorCB == NULL) { + virReportError(VIR_ERR_INTERNAL_ERROR, + "%s", _("no vendor callback provided")); + goto cleanup; + } + + if (modelCB == NULL) { virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("no callback provided")); + "%s", _("no model callback provided")); goto cleanup; }
I'd remove both checks as suggested by John. ... Jirka

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- src/cpu/cpu_map.xml | 41 +++++-------------------- src/cpu/cpu_map_ppc64_POWER6.xml | 6 ++++ src/cpu/cpu_map_ppc64_POWER7.xml | 7 +++++ src/cpu/cpu_map_ppc64_POWER8.xml | 8 +++++ src/cpu/cpu_map_ppc64_POWER9.xml | 6 ++++ src/cpu/cpu_map_ppc64_POWERPC_e5500.xml | 6 ++++ src/cpu/cpu_map_ppc64_POWERPC_e6500.xml | 6 ++++ src/cpu/cpu_map_ppc64_vendors.xml | 4 +++ 8 files changed, 50 insertions(+), 34 deletions(-) create mode 100644 src/cpu/cpu_map_ppc64_POWER6.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER7.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER8.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER9.xml create mode 100644 src/cpu/cpu_map_ppc64_POWERPC_e5500.xml create mode 100644 src/cpu/cpu_map_ppc64_POWERPC_e6500.xml create mode 100644 src/cpu/cpu_map_ppc64_vendors.xml diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 9af190a579..e236c41733 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -2340,43 +2340,16 @@ </arch> <arch name='ppc64'> - <!-- vendor definitions --> - <vendor name='IBM'/> - <vendor name='Freescale'/> + <include filename="cpu_map_ppc64_vendors.xml"/> <!-- IBM-based CPU models --> - <model name='POWER6'> - <vendor name='IBM'/> - <pvr value='0x003e0000' mask='0xffff0000'/> - </model> - - <model name='POWER7'> - <vendor name='IBM'/> - <pvr value='0x003f0000' mask='0xffff0000'/> - <pvr value='0x004a0000' mask='0xffff0000'/> - </model> - - <model name='POWER8'> - <vendor name='IBM'/> - <pvr value='0x004b0000' mask='0xffff0000'/> - <pvr value='0x004c0000' mask='0xffff0000'/> - <pvr value='0x004d0000' mask='0xffff0000'/> - </model> - - <model name='POWER9'> - <vendor name='IBM'/> - <pvr value='0x004e0000' mask='0xffff0000'/> - </model> + <include filename="cpu_map_ppc64_POWER6.xml"/> + <include filename="cpu_map_ppc64_POWER7.xml"/> + <include filename="cpu_map_ppc64_POWER8.xml"/> + <include filename="cpu_map_ppc64_POWER9.xml"/> <!-- Freescale-based CPU models --> - <model name='POWERPC_e5500'> - <vendor name='Freescale'/> - <pvr value='0x80240000' mask='0xffff0000'/> - </model> - - <model name='POWERPC_e6500'> - <vendor name='Freescale'/> - <pvr value='0x80400000' mask='0xffff0000'/> - </model> + <include filename="cpu_map_ppc64_POWERPC_e5500.xml"/> + <include filename="cpu_map_ppc64_POWERPC_e6500.xml"/> </arch> </cpus> diff --git a/src/cpu/cpu_map_ppc64_POWER6.xml b/src/cpu/cpu_map_ppc64_POWER6.xml new file mode 100644 index 0000000000..00e27495f4 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWER6.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='POWER6'> + <vendor name='IBM'/> + <pvr value='0x003e0000' mask='0xffff0000'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_ppc64_POWER7.xml b/src/cpu/cpu_map_ppc64_POWER7.xml new file mode 100644 index 0000000000..a071481805 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWER7.xml @@ -0,0 +1,7 @@ +<cpus> + <model name='POWER7'> + <vendor name='IBM'/> + <pvr value='0x003f0000' mask='0xffff0000'/> + <pvr value='0x004a0000' mask='0xffff0000'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_ppc64_POWER8.xml b/src/cpu/cpu_map_ppc64_POWER8.xml new file mode 100644 index 0000000000..64d96fc4c4 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWER8.xml @@ -0,0 +1,8 @@ +<cpus> + <model name='POWER8'> + <vendor name='IBM'/> + <pvr value='0x004b0000' mask='0xffff0000'/> + <pvr value='0x004c0000' mask='0xffff0000'/> + <pvr value='0x004d0000' mask='0xffff0000'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_ppc64_POWER9.xml b/src/cpu/cpu_map_ppc64_POWER9.xml new file mode 100644 index 0000000000..149fcde924 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWER9.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='POWER9'> + <vendor name='IBM'/> + <pvr value='0x004e0000' mask='0xffff0000'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_ppc64_POWERPC_e5500.xml b/src/cpu/cpu_map_ppc64_POWERPC_e5500.xml new file mode 100644 index 0000000000..3d64c8926c --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWERPC_e5500.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='POWERPC_e5500'> + <vendor name='Freescale'/> + <pvr value='0x80240000' mask='0xffff0000'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_ppc64_POWERPC_e6500.xml b/src/cpu/cpu_map_ppc64_POWERPC_e6500.xml new file mode 100644 index 0000000000..b0d1006076 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWERPC_e6500.xml @@ -0,0 +1,6 @@ +<cpus> + <model name='POWERPC_e6500'> + <vendor name='Freescale'/> + <pvr value='0x80400000' mask='0xffff0000'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_ppc64_vendors.xml b/src/cpu/cpu_map_ppc64_vendors.xml new file mode 100644 index 0000000000..52ad45c0bd --- /dev/null +++ b/src/cpu/cpu_map_ppc64_vendors.xml @@ -0,0 +1,4 @@ +<cpus> + <vendor name='IBM'/> + <vendor name='Freescale'/> +</cpus> -- 2.17.1

On 08/01/2018 01:02 PM, Daniel P. Berrangé wrote:
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- src/cpu/cpu_map.xml | 41 +++++-------------------- src/cpu/cpu_map_ppc64_POWER6.xml | 6 ++++ src/cpu/cpu_map_ppc64_POWER7.xml | 7 +++++ src/cpu/cpu_map_ppc64_POWER8.xml | 8 +++++ src/cpu/cpu_map_ppc64_POWER9.xml | 6 ++++ src/cpu/cpu_map_ppc64_POWERPC_e5500.xml | 6 ++++ src/cpu/cpu_map_ppc64_POWERPC_e6500.xml | 6 ++++ src/cpu/cpu_map_ppc64_vendors.xml | 4 +++ 8 files changed, 50 insertions(+), 34 deletions(-) create mode 100644 src/cpu/cpu_map_ppc64_POWER6.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER7.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER8.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER9.xml create mode 100644 src/cpu/cpu_map_ppc64_POWERPC_e5500.xml create mode 100644 src/cpu/cpu_map_ppc64_POWERPC_e6500.xml create mode 100644 src/cpu/cpu_map_ppc64_vendors.xml
Reviewed-by: John Ferlan <jferlan@redhat.com> John

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- src/cpu/cpu_map.xml | 2374 +----------------- src/cpu/cpu_map_x86_486.xml | 7 + src/cpu/cpu_map_x86_Broadwell-IBRS.xml | 61 + src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml | 59 + src/cpu/cpu_map_x86_Broadwell-noTSX.xml | 58 + src/cpu/cpu_map_x86_Broadwell.xml | 60 + src/cpu/cpu_map_x86_Conroe.xml | 33 + src/cpu/cpu_map_x86_EPYC-IBRS.xml | 73 + src/cpu/cpu_map_x86_EPYC.xml | 72 + src/cpu/cpu_map_x86_Haswell-IBRS.xml | 57 + src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml | 55 + src/cpu/cpu_map_x86_Haswell-noTSX.xml | 54 + src/cpu/cpu_map_x86_Haswell.xml | 56 + src/cpu/cpu_map_x86_IvyBridge-IBRS.xml | 51 + src/cpu/cpu_map_x86_IvyBridge.xml | 50 + src/cpu/cpu_map_x86_Nehalem-IBRS.xml | 38 + src/cpu/cpu_map_x86_Nehalem.xml | 37 + src/cpu/cpu_map_x86_Opteron_G1.xml | 31 + src/cpu/cpu_map_x86_Opteron_G2.xml | 35 + src/cpu/cpu_map_x86_Opteron_G3.xml | 40 + src/cpu/cpu_map_x86_Opteron_G4.xml | 50 + src/cpu/cpu_map_x86_Opteron_G5.xml | 53 + src/cpu/cpu_map_x86_Penryn.xml | 35 + src/cpu/cpu_map_x86_SandyBridge-IBRS.xml | 45 + src/cpu/cpu_map_x86_SandyBridge.xml | 44 + src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml | 70 + src/cpu/cpu_map_x86_Skylake-Client.xml | 69 + src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml | 77 + src/cpu/cpu_map_x86_Skylake-Server.xml | 76 + src/cpu/cpu_map_x86_Westmere-IBRS.xml | 39 + src/cpu/cpu_map_x86_Westmere.xml | 38 + src/cpu/cpu_map_x86_athlon.xml | 28 + src/cpu/cpu_map_x86_core2duo.xml | 33 + src/cpu/cpu_map_x86_coreduo.xml | 29 + src/cpu/cpu_map_x86_cpu64-rhel5.xml | 29 + src/cpu/cpu_map_x86_cpu64-rhel6.xml | 31 + src/cpu/cpu_map_x86_features.xml | 440 ++++ src/cpu/cpu_map_x86_kvm32.xml | 26 + src/cpu/cpu_map_x86_kvm64.xml | 30 + src/cpu/cpu_map_x86_n270.xml | 30 + src/cpu/cpu_map_x86_pentium.xml | 13 + src/cpu/cpu_map_x86_pentium2.xml | 22 + src/cpu/cpu_map_x86_pentium3.xml | 23 + src/cpu/cpu_map_x86_pentiumpro.xml | 21 + src/cpu/cpu_map_x86_phenom.xml | 36 + src/cpu/cpu_map_x86_qemu32.xml | 22 + src/cpu/cpu_map_x86_qemu64.xml | 40 + src/cpu/cpu_map_x86_vendors.xml | 4 + 48 files changed, 2427 insertions(+), 2327 deletions(-) create mode 100644 src/cpu/cpu_map_x86_486.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell.xml create mode 100644 src/cpu/cpu_map_x86_Conroe.xml create mode 100644 src/cpu/cpu_map_x86_EPYC-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_EPYC.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX.xml create mode 100644 src/cpu/cpu_map_x86_Haswell.xml create mode 100644 src/cpu/cpu_map_x86_IvyBridge-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_IvyBridge.xml create mode 100644 src/cpu/cpu_map_x86_Nehalem-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Nehalem.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G1.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G2.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G3.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G4.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G5.xml create mode 100644 src/cpu/cpu_map_x86_Penryn.xml create mode 100644 src/cpu/cpu_map_x86_SandyBridge-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_SandyBridge.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Client.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Server.xml create mode 100644 src/cpu/cpu_map_x86_Westmere-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Westmere.xml create mode 100644 src/cpu/cpu_map_x86_athlon.xml create mode 100644 src/cpu/cpu_map_x86_core2duo.xml create mode 100644 src/cpu/cpu_map_x86_coreduo.xml create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel5.xml create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel6.xml create mode 100644 src/cpu/cpu_map_x86_features.xml create mode 100644 src/cpu/cpu_map_x86_kvm32.xml create mode 100644 src/cpu/cpu_map_x86_kvm64.xml create mode 100644 src/cpu/cpu_map_x86_n270.xml create mode 100644 src/cpu/cpu_map_x86_pentium.xml create mode 100644 src/cpu/cpu_map_x86_pentium2.xml create mode 100644 src/cpu/cpu_map_x86_pentium3.xml create mode 100644 src/cpu/cpu_map_x86_pentiumpro.xml create mode 100644 src/cpu/cpu_map_x86_phenom.xml create mode 100644 src/cpu/cpu_map_x86_qemu32.xml create mode 100644 src/cpu/cpu_map_x86_qemu64.xml create mode 100644 src/cpu/cpu_map_x86_vendors.xml diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index e236c41733..80674a678b 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1,2342 +1,62 @@ <cpus> <arch name='x86'> - <!-- vendor definitions --> - <vendor name='Intel' string='GenuineIntel'/> - <vendor name='AMD' string='AuthenticAMD'/> - - <!-- standard features, EDX --> - <feature name='fpu'> - <cpuid eax_in='0x01' edx='0x00000001'/> - </feature> - <feature name='vme'> - <cpuid eax_in='0x01' edx='0x00000002'/> - </feature> - <feature name='de'> - <cpuid eax_in='0x01' edx='0x00000004'/> - </feature> - <feature name='pse'> - <cpuid eax_in='0x01' edx='0x00000008'/> - </feature> - <feature name='tsc'> - <cpuid eax_in='0x01' edx='0x00000010'/> - </feature> - <feature name='msr'> - <cpuid eax_in='0x01' edx='0x00000020'/> - </feature> - <feature name='pae'> - <cpuid eax_in='0x01' edx='0x00000040'/> - </feature> - <feature name='mce'> - <cpuid eax_in='0x01' edx='0x00000080'/> - </feature> - <feature name='cx8'> - <cpuid eax_in='0x01' edx='0x00000100'/> - </feature> - <feature name='apic'> - <cpuid eax_in='0x01' edx='0x00000200'/> - </feature> - <feature name='sep'> - <cpuid eax_in='0x01' edx='0x00000800'/> - </feature> - <feature name='mtrr'> - <cpuid eax_in='0x01' edx='0x00001000'/> - </feature> - <feature name='pge'> - <cpuid eax_in='0x01' edx='0x00002000'/> - </feature> - <feature name='mca'> - <cpuid eax_in='0x01' edx='0x00004000'/> - </feature> - <feature name='cmov'> - <cpuid eax_in='0x01' edx='0x00008000'/> - </feature> - <feature name='pat'> - <cpuid eax_in='0x01' edx='0x00010000'/> - </feature> - <feature name='pse36'> - <cpuid eax_in='0x01' edx='0x00020000'/> - </feature> - <feature name='pn'> - <cpuid eax_in='0x01' edx='0x00040000'/> - </feature> - <feature name='clflush'> - <cpuid eax_in='0x01' edx='0x00080000'/> - </feature> - <feature name='ds'> - <cpuid eax_in='0x01' edx='0x00200000'/> - </feature> - <feature name='acpi'> - <cpuid eax_in='0x01' edx='0x00400000'/> - </feature> - <feature name='mmx'> - <cpuid eax_in='0x01' edx='0x00800000'/> - </feature> - <feature name='fxsr'> - <cpuid eax_in='0x01' edx='0x01000000'/> - </feature> - <feature name='sse'> - <cpuid eax_in='0x01' edx='0x02000000'/> - </feature> - <feature name='sse2'> - <cpuid eax_in='0x01' edx='0x04000000'/> - </feature> - <feature name='ss'> - <cpuid eax_in='0x01' edx='0x08000000'/> - </feature> - <feature name='ht'> - <cpuid eax_in='0x01' edx='0x10000000'/> - </feature> - <feature name='tm'> - <cpuid eax_in='0x01' edx='0x20000000'/> - </feature> - <feature name='ia64'> - <cpuid eax_in='0x01' edx='0x40000000'/> - </feature> - <feature name='pbe'> - <cpuid eax_in='0x01' edx='0x80000000'/> - </feature> - - <!-- standard features, ECX --> - <feature name='pni'> <!-- sse3 --> - <cpuid eax_in='0x01' ecx='0x00000001'/> - </feature> - <feature name='pclmuldq'> <!-- pclmulqdq --> - <cpuid eax_in='0x01' ecx='0x00000002'/> - </feature> - <feature name='dtes64'> - <cpuid eax_in='0x01' ecx='0x00000004'/> - </feature> - <feature name='monitor'> - <cpuid eax_in='0x01' ecx='0x00000008'/> - </feature> - <feature name='ds_cpl'> <!-- ds-cpl --> - <cpuid eax_in='0x01' ecx='0x00000010'/> - </feature> - <feature name='vmx'> - <cpuid eax_in='0x01' ecx='0x00000020'/> - </feature> - <feature name='smx'> - <cpuid eax_in='0x01' ecx='0x00000040'/> - </feature> - <feature name='est'> - <cpuid eax_in='0x01' ecx='0x00000080'/> - </feature> - <feature name='tm2'> - <cpuid eax_in='0x01' ecx='0x00000100'/> - </feature> - <feature name='ssse3'> - <cpuid eax_in='0x01' ecx='0x00000200'/> - </feature> - <feature name='cid'> - <cpuid eax_in='0x01' ecx='0x00000400'/> - </feature> - <feature name='fma'> - <cpuid eax_in='0x01' ecx='0x00001000'/> - </feature> - <feature name='cx16'> - <cpuid eax_in='0x01' ecx='0x00002000'/> - </feature> - <feature name='xtpr'> - <cpuid eax_in='0x01' ecx='0x00004000'/> - </feature> - <feature name='pdcm'> - <cpuid eax_in='0x01' ecx='0x00008000'/> - </feature> - <feature name='pcid'> - <cpuid eax_in='0x01' ecx='0x00020000'/> - </feature> - <feature name='dca'> - <cpuid eax_in='0x01' ecx='0x00040000'/> - </feature> - <feature name='sse4.1'> <!-- sse4-1, sse4_1 --> - <cpuid eax_in='0x01' ecx='0x00080000'/> - </feature> - <feature name='sse4.2'> <!-- sse4-2, sse4_2 --> - <cpuid eax_in='0x01' ecx='0x00100000'/> - </feature> - <feature name='x2apic'> - <cpuid eax_in='0x01' ecx='0x00200000'/> - </feature> - <feature name='movbe'> - <cpuid eax_in='0x01' ecx='0x00400000'/> - </feature> - <feature name='popcnt'> - <cpuid eax_in='0x01' ecx='0x00800000'/> - </feature> - <feature name='tsc-deadline'> - <cpuid eax_in='0x01' ecx='0x01000000'/> - </feature> - <feature name='aes'> - <cpuid eax_in='0x01' ecx='0x02000000'/> - </feature> - <feature name='xsave'> - <cpuid eax_in='0x01' ecx='0x04000000'/> - </feature> - <feature name='osxsave'> - <cpuid eax_in='0x01' ecx='0x08000000'/> - </feature> - <feature name='avx'> - <cpuid eax_in='0x01' ecx='0x10000000'/> - </feature> - <feature name='f16c'> - <cpuid eax_in='0x01' ecx='0x20000000'/> - </feature> - <feature name='rdrand'> - <cpuid eax_in='0x01' ecx='0x40000000'/> - </feature> - <feature name='hypervisor'> - <cpuid eax_in='0x01' ecx='0x80000000'/> - </feature> - - <!-- Termal Power and Management --> - <feature name='arat'> - <cpuid eax_in='0x06' eax='0x00000004'/> - </feature> - - <!-- cpuid function 0x7 ecx 0x0 features --> - <feature name='fsgsbase'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000001'/> - </feature> - <feature name='tsc_adjust'> <!-- tsc-adjust --> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000002'/> - </feature> - <feature name='bmi1'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000008'/> - </feature> - <feature name='hle'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000010'/> - </feature> - <feature name='avx2'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000020'/> - </feature> - <feature name='smep'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000080'/> - </feature> - <feature name='bmi2'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000100'/> - </feature> - <feature name='erms'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000200'/> - </feature> - <feature name='invpcid'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000400'/> - </feature> - <feature name='rtm'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000800'/> - </feature> - <feature name='cmt'> <!-- cqm --> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00001000'/> - </feature> - <feature name='mpx'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00004000'/> - </feature> - <feature name='avx512f'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00010000'/> - </feature> - <feature name='avx512dq'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00020000'/> - </feature> - <feature name='rdseed'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00040000'/> - </feature> - <feature name='adx'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00080000'/> - </feature> - <feature name='smap'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00100000'/> - </feature> - <feature name='avx512ifma'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00200000'/> - </feature> - <feature name='pcommit'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00400000'/> - </feature> - <feature name='clflushopt'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00800000'/> - </feature> - <feature name='clwb'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x01000000'/> - </feature> - <feature name='avx512pf'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x04000000'/> - </feature> - <feature name='avx512er'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x08000000'/> - </feature> - <feature name='avx512cd'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x10000000'/> - </feature> - <feature name='sha-ni'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x20000000'/> - </feature> - <feature name='avx512bw'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x40000000'/> - </feature> - <feature name='avx512vl'> - <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x80000000'/> - </feature> - - <feature name='avx512vbmi'> - <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00000002'/> - </feature> - <feature name='pku'> - <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00000008'/> - </feature> - <feature name='ospke'> - <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00000010'/> - </feature> - <feature name='la57'> - <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00010000'/> - </feature> - - <feature name='avx512-4vnniw'> - <cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000004'/> - </feature> - <feature name='avx512-4fmaps'> - <cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000008'/> - </feature> - <feature name='spec-ctrl'> - <cpuid eax_in='0x07' ecx_in='0x00' edx='0x04000000'/> - </feature> - <feature name='ssbd'> - <cpuid eax_in='0x07' ecx_in='0x00' edx='0x80000000'/> - </feature> - - <!-- Processor Extended State Enumeration sub leaf 1 --> - <feature name='xsaveopt'> - <cpuid eax_in='0x0d' ecx_in='0x01' eax='0x00000001'/> - </feature> - <feature name='xsavec'> - <cpuid eax_in='0x0d' ecx_in='0x01' eax='0x00000002'/> - </feature> - <feature name='xgetbv1'> - <cpuid eax_in='0x0d' ecx_in='0x01' eax='0x00000004'/> - </feature> - <feature name='xsaves' migratable='no'> - <cpuid eax_in='0x0d' ecx_in='0x01' eax='0x00000008'/> - </feature> - - <!-- cpuid level 0x0000000f:1 (edx) --> - <feature name='mbm_total'> - <cpuid eax_in='0x0f' ecx_in='0x01' edx='0x00000002'/> - </feature> - <feature name='mbm_local'> - <cpuid eax_in='0x0f' ecx_in='0x01' edx='0x00000004'/> - </feature> - - <!-- extended features, EDX --> - <feature name='syscall'> - <cpuid eax_in='0x80000001' edx='0x00000800'/> - </feature> - <feature name='nx'> <!-- xd --> - <cpuid eax_in='0x80000001' edx='0x00100000'/> - </feature> - <feature name='mmxext'> - <cpuid eax_in='0x80000001' edx='0x00400000'/> - </feature> - <feature name='fxsr_opt'> <!-- ffxsr, fxsr-opt --> - <cpuid eax_in='0x80000001' edx='0x02000000'/> - </feature> - <feature name='pdpe1gb'> - <cpuid eax_in='0x80000001' edx='0x04000000'/> - </feature> - <feature name='rdtscp'> - <cpuid eax_in='0x80000001' edx='0x08000000'/> - </feature> - <feature name='lm'> <!-- i64 --> - <cpuid eax_in='0x80000001' edx='0x20000000'/> - </feature> - <feature name='3dnowext'> - <cpuid eax_in='0x80000001' edx='0x40000000'/> - </feature> - <feature name='3dnow'> - <cpuid eax_in='0x80000001' edx='0x80000000'/> - </feature> - - <!-- extended features, ECX --> - <feature name='lahf_lm'> <!-- lahf-lm --> - <cpuid eax_in='0x80000001' ecx='0x00000001'/> - </feature> - <feature name='cmp_legacy'> <!-- cmp-legacy --> - <cpuid eax_in='0x80000001' ecx='0x00000002'/> - </feature> - <feature name='svm'> - <cpuid eax_in='0x80000001' ecx='0x00000004'/> - </feature> - <feature name='extapic'> - <cpuid eax_in='0x80000001' ecx='0x00000008'/> - </feature> - <feature name='cr8legacy'> - <cpuid eax_in='0x80000001' ecx='0x00000010'/> - </feature> - <feature name='abm'> - <cpuid eax_in='0x80000001' ecx='0x00000020'/> - </feature> - <feature name='sse4a'> - <cpuid eax_in='0x80000001' ecx='0x00000040'/> - </feature> - <feature name='misalignsse'> - <cpuid eax_in='0x80000001' ecx='0x00000080'/> - </feature> - <feature name='3dnowprefetch'> - <cpuid eax_in='0x80000001' ecx='0x00000100'/> - </feature> - <feature name='osvw'> - <cpuid eax_in='0x80000001' ecx='0x00000200'/> - </feature> - <feature name='ibs'> - <cpuid eax_in='0x80000001' ecx='0x00000400'/> - </feature> - <feature name='xop'> - <cpuid eax_in='0x80000001' ecx='0x00000800'/> - </feature> - <feature name='skinit'> - <cpuid eax_in='0x80000001' ecx='0x00001000'/> - </feature> - <feature name='wdt'> - <cpuid eax_in='0x80000001' ecx='0x00002000'/> - </feature> - <feature name='lwp'> - <cpuid eax_in='0x80000001' ecx='0x00008000'/> - </feature> - <feature name='fma4'> - <cpuid eax_in='0x80000001' ecx='0x00010000'/> - </feature> - <feature name='tce'> - <cpuid eax_in='0x80000001' ecx='0x00020000'/> - </feature> - <feature name='cvt16'> - <cpuid eax_in='0x80000001' ecx='0x00040000'/> - </feature> - <feature name='nodeid_msr'> <!-- nodeid-msr --> - <cpuid eax_in='0x80000001' ecx='0x00080000'/> - </feature> - <feature name='tbm'> - <cpuid eax_in='0x80000001' ecx='0x00200000'/> - </feature> - <feature name='topoext'> - <cpuid eax_in='0x80000001' ecx='0x00400000'/> - </feature> - <feature name='perfctr_core'> <!-- perfctr-core --> - <cpuid eax_in='0x80000001' ecx='0x00800000'/> - </feature> - <feature name='perfctr_nb'> <!-- perfctr-nb --> - <cpuid eax_in='0x80000001' ecx='0x01000000'/> - </feature> - - <!-- Advanced Power Management edx features --> - <feature name='invtsc' migratable='no'> - <cpuid eax_in='0x80000007' edx='0x00000100'/> - </feature> - - <!-- More AMD-specific features --> - <feature name='ibpb'> - <cpuid eax_in='0x80000008' ebx='0x00001000'/> - </feature> - <feature name='amd-ssbd'> - <cpuid eax_in='0x80000008' ebx='0x01000000'/> - </feature> - <feature name='virt-ssbd'> - <cpuid eax_in='0x80000008' ebx='0x02000000'/> - </feature> - <feature name='amd-no-ssb'> - <cpuid eax_in='0x80000008' ebx='0x04000000'/> - </feature> + <include filename="cpu_map_x86_vendors.xml"/> + <include filename="cpu_map_x86_features.xml"/> <!-- models --> - <model name='486'> - <feature name='fpu'/> - <feature name='pse'/> - <feature name='vme'/> - </model> + <include filename="cpu_map_x86_486.xml"/> <!-- Intel-based QEMU generic CPU models --> - <model name='pentium'> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='pse'/> - <feature name='tsc'/> - <feature name='vme'/> - </model> - - <model name='pentium2'> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='tsc'/> - <feature name='vme'/> - </model> - - <model name='pentium3'> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='tsc'/> - <feature name='vme'/> - </model> - - <model name='pentiumpro'> - <feature name='apic'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pse'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='tsc'/> - </model> - - <model name='coreduo'> - <vendor name='Intel'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='monitor'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='tsc'/> - <feature name='vme'/> - </model> - - <model name='n270'> - <vendor name='Intel'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='monitor'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='ssse3'/> - <feature name='tsc'/> - <feature name='vme'/> - </model> - - <model name='core2duo'> - <vendor name='Intel'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='monitor'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='vme'/> - </model> + <include filename="cpu_map_x86_pentium.xml"/> + <include filename="cpu_map_x86_pentium2.xml"/> + <include filename="cpu_map_x86_pentium3.xml"/> + <include filename="cpu_map_x86_pentiumpro.xml"/> + <include filename="cpu_map_x86_coreduo.xml"/> + <include filename="cpu_map_x86_n270.xml"/> + <include filename="cpu_map_x86_core2duo.xml"/> <!-- Generic QEMU CPU models --> - <model name='qemu32'> - <feature name='apic'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='tsc'/> - </model> - - <model name='kvm32'> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='tsc'/> - </model> - - <model name='cpu64-rhel5'> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='cpu64-rhel6'> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='kvm64'> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='qemu64'> - <!-- These are supported only by TCG. KVM supports them only if the - host does. So we leave them out: - - <feature name='abm'/> - <feature name='lahf_lm'/> - <feature name='popcnt'/> - <feature name='sse4a'/> - --> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='svm'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> + <include filename="cpu_map_x86_qemu32.xml"/> + <include filename="cpu_map_x86_kvm32.xml"/> + <include filename="cpu_map_x86_cpu64-rhel5.xml"/> + <include filename="cpu_map_x86_cpu64-rhel6.xml"/> + <include filename="cpu_map_x86_qemu64.xml"/> + <include filename="cpu_map_x86_kvm64.xml"/> <!-- Intel CPU models --> - <model name='Conroe'> - <signature family='6' model='15'/> - <vendor name='Intel'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='Penryn'> - <signature family='6' model='23'/> - <vendor name='Intel'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='Nehalem'> - <signature family='6' model='26'/> - <vendor name='Intel'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='Nehalem-IBRS'> - <signature family='6' model='26'/> - <vendor name='Intel'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='Westmere'> - <signature family='6' model='44'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='Westmere-IBRS'> - <signature family='6' model='44'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='SandyBridge'> - <signature family='6' model='42'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='SandyBridge-IBRS'> - <signature family='6' model='42'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='IvyBridge'> - <signature family='6' model='58'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='f16c'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdrand'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='smep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='vme'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='IvyBridge-IBRS'> - <signature family='6' model='58'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='f16c'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdrand'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='smep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='vme'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='Haswell-noTSX'> - <signature family='6' model='60'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='smep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='Haswell-noTSX-IBRS'> - <signature family='6' model='60'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='smep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='Haswell'> - <signature family='6' model='60'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='hle'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='rtm'/> - <feature name='sep'/> - <feature name='smep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='Haswell-IBRS'> - <signature family='6' model='60'/> - <vendor name='Intel'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='hle'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='rtm'/> - <feature name='sep'/> - <feature name='smep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='Broadwell-noTSX'> - <signature family='6' model='61'/> - <vendor name='Intel'/> - <feature name='3dnowprefetch'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='Broadwell-noTSX-IBRS'> - <signature family='6' model='61'/> - <vendor name='Intel'/> - <feature name='3dnowprefetch'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='Broadwell'> - <signature family='6' model='61'/> - <vendor name='Intel'/> - <feature name='3dnowprefetch'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='hle'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='rtm'/> - <feature name='sep'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='Broadwell-IBRS'> - <signature family='6' model='61'/> - <vendor name='Intel'/> - <feature name='3dnowprefetch'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='hle'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='rtm'/> - <feature name='sep'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='x2apic'/> - <feature name='xsave'/> - </model> - - <model name='Skylake-Client'> - <signature family='6' model='94'/> - <vendor name='Intel'/> - <feature name='3dnowprefetch'/> - <feature name='abm'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='arat'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='f16c'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='hle'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='mpx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdrand'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='rtm'/> - <feature name='sep'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='vme'/> - <feature name='x2apic'/> - <feature name='xgetbv1'/> - <feature name='xsave'/> - <feature name='xsavec'/> - <feature name='xsaveopt'/> - </model> - - <model name='Skylake-Client-IBRS'> - <signature family='6' model='94'/> - <vendor name='Intel'/> - <feature name='3dnowprefetch'/> - <feature name='abm'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='arat'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='f16c'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='hle'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='mpx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdrand'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='rtm'/> - <feature name='sep'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='vme'/> - <feature name='x2apic'/> - <feature name='xgetbv1'/> - <feature name='xsave'/> - <feature name='xsavec'/> - <feature name='xsaveopt'/> - </model> - - <model name='Skylake-Server'> - <signature family='6' model='85'/> - <vendor name='Intel'/> - <feature name='3dnowprefetch'/> - <feature name='abm'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='arat'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='avx512bw'/> - <feature name='avx512cd'/> - <feature name='avx512dq'/> - <feature name='avx512f'/> - <feature name='avx512vl'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='clwb'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='f16c'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='hle'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='mpx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pdpe1gb'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdrand'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='rtm'/> - <feature name='sep'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='vme'/> - <feature name='x2apic'/> - <feature name='xgetbv1'/> - <feature name='xsave'/> - <feature name='xsavec'/> - <feature name='xsaveopt'/> - </model> - - <model name='Skylake-Server-IBRS'> - <signature family='6' model='85'/> - <vendor name='Intel'/> - <feature name='3dnowprefetch'/> - <feature name='abm'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='arat'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='avx512bw'/> - <feature name='avx512cd'/> - <feature name='avx512dq'/> - <feature name='avx512f'/> - <feature name='avx512vl'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='clwb'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='erms'/> - <feature name='f16c'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='hle'/> - <feature name='invpcid'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='movbe'/> - <feature name='mpx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pcid'/> - <feature name='pclmuldq'/> - <feature name='pdpe1gb'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdrand'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='rtm'/> - <feature name='sep'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='spec-ctrl'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='ssse3'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='tsc-deadline'/> - <feature name='vme'/> - <feature name='x2apic'/> - <feature name='xgetbv1'/> - <feature name='xsave'/> - <feature name='xsavec'/> - <feature name='xsaveopt'/> - </model> + <include filename="cpu_map_x86_Conroe.xml"/> + <include filename="cpu_map_x86_Penryn.xml"/> + <include filename="cpu_map_x86_Nehalem.xml"/> + <include filename="cpu_map_x86_Nehalem-IBRS.xml"/> + <include filename="cpu_map_x86_Westmere.xml"/> + <include filename="cpu_map_x86_Westmere-IBRS.xml"/> + <include filename="cpu_map_x86_SandyBridge.xml"/> + <include filename="cpu_map_x86_SandyBridge-IBRS.xml"/> + <include filename="cpu_map_x86_IvyBridge.xml"/> + <include filename="cpu_map_x86_IvyBridge-IBRS.xml"/> + <include filename="cpu_map_x86_Haswell-noTSX.xml"/> + <include filename="cpu_map_x86_Haswell-noTSX-IBRS.xml"/> + <include filename="cpu_map_x86_Haswell.xml"/> + <include filename="cpu_map_x86_Haswell-IBRS.xml"/> + <include filename="cpu_map_x86_Broadwell-noTSX.xml"/> + <include filename="cpu_map_x86_Broadwell-noTSX-IBRS.xml"/> + <include filename="cpu_map_x86_Broadwell.xml"/> + <include filename="cpu_map_x86_Broadwell-IBRS.xml"/> + <include filename="cpu_map_x86_Skylake-Client.xml"/> + <include filename="cpu_map_x86_Skylake-Client-IBRS.xml"/> + <include filename="cpu_map_x86_Skylake-Server.xml"/> + <include filename="cpu_map_x86_Skylake-Server-IBRS.xml"/> <!-- AMD CPUs --> - <model name='athlon'> - <vendor name='AMD'/> - <feature name='3dnow'/> - <feature name='3dnowext'/> - <feature name='apic'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='mmxext'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='tsc'/> - <feature name='vme'/> - </model> - - <model name='phenom'> - <vendor name='AMD'/> - <feature name='3dnow'/> - <feature name='3dnowext'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='fxsr_opt'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='mmxext'/> - <feature name='monitor'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='svm'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='Opteron_G1'> - <signature family='15' model='6'/> - <vendor name='AMD'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='Opteron_G2'> - <signature family='15' model='6'/> - <vendor name='AMD'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='svm'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='Opteron_G3'> - <signature family='15' model='6'/> - <vendor name='AMD'/> - <feature name='abm'/> - <feature name='apic'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='misalignsse'/> - <feature name='mmx'/> - <feature name='monitor'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4a'/> - <feature name='svm'/> - <feature name='syscall'/> - <feature name='tsc'/> - </model> - - <model name='Opteron_G4'> - <signature family='21' model='1'/> - <vendor name='AMD'/> - <feature name='3dnowprefetch'/> - <feature name='abm'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='fma4'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='misalignsse'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pclmuldq'/> - <feature name='pdpe1gb'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='sse4a'/> - <feature name='ssse3'/> - <feature name='svm'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='xop'/> - <feature name='xsave'/> - </model> - - <model name='Opteron_G5'> - <signature family='21' model='2'/> - <vendor name='AMD'/> - <feature name='3dnowprefetch'/> - <feature name='abm'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='avx'/> - <feature name='clflush'/> - <feature name='cmov'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='f16c'/> - <feature name='fma'/> - <feature name='fma4'/> - <feature name='fpu'/> - <feature name='fxsr'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='misalignsse'/> - <feature name='mmx'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pclmuldq'/> - <feature name='pdpe1gb'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='sse4a'/> - <feature name='ssse3'/> - <feature name='svm'/> - <feature name='syscall'/> - <feature name='tbm'/> - <feature name='tsc'/> - <feature name='xop'/> - <feature name='xsave'/> - </model> - - <model name='EPYC'> - <signature family='23' model='1'/> - <vendor name='AMD'/> - <feature name='3dnowprefetch'/> - <feature name='abm'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='arat'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='clflushopt'/> - <feature name='cmov'/> - <feature name='cr8legacy'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='f16c'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='fxsr_opt'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='misalignsse'/> - <feature name='mmx'/> - <feature name='mmxext'/> - <feature name='monitor'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='osvw'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pclmuldq'/> - <feature name='pdpe1gb'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdrand'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='sha-ni'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='sse4a'/> - <feature name='ssse3'/> - <feature name='svm'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='vme'/> - <feature name='xgetbv1'/> - <feature name='xsave'/> - <feature name='xsavec'/> - <feature name='xsaveopt'/> - </model> - - <model name='EPYC-IBPB'> - <signature family='23' model='1'/> - <vendor name='AMD'/> - <feature name='3dnowprefetch'/> - <feature name='abm'/> - <feature name='adx'/> - <feature name='aes'/> - <feature name='apic'/> - <feature name='arat'/> - <feature name='avx'/> - <feature name='avx2'/> - <feature name='bmi1'/> - <feature name='bmi2'/> - <feature name='clflush'/> - <feature name='clflushopt'/> - <feature name='cmov'/> - <feature name='cr8legacy'/> - <feature name='cx16'/> - <feature name='cx8'/> - <feature name='de'/> - <feature name='f16c'/> - <feature name='fma'/> - <feature name='fpu'/> - <feature name='fsgsbase'/> - <feature name='fxsr'/> - <feature name='fxsr_opt'/> - <feature name='ibpb'/> - <feature name='lahf_lm'/> - <feature name='lm'/> - <feature name='mca'/> - <feature name='mce'/> - <feature name='misalignsse'/> - <feature name='mmx'/> - <feature name='mmxext'/> - <feature name='monitor'/> - <feature name='movbe'/> - <feature name='msr'/> - <feature name='mtrr'/> - <feature name='nx'/> - <feature name='osvw'/> - <feature name='pae'/> - <feature name='pat'/> - <feature name='pclmuldq'/> - <feature name='pdpe1gb'/> - <feature name='pge'/> - <feature name='pni'/> - <feature name='popcnt'/> - <feature name='pse'/> - <feature name='pse36'/> - <feature name='rdrand'/> - <feature name='rdseed'/> - <feature name='rdtscp'/> - <feature name='sep'/> - <feature name='sha-ni'/> - <feature name='smap'/> - <feature name='smep'/> - <feature name='sse'/> - <feature name='sse2'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='sse4a'/> - <feature name='ssse3'/> - <feature name='svm'/> - <feature name='syscall'/> - <feature name='tsc'/> - <feature name='vme'/> - <feature name='xgetbv1'/> - <feature name='xsave'/> - <feature name='xsavec'/> - <feature name='xsaveopt'/> - </model> + <include filename="cpu_map_x86_athlon.xml"/> + <include filename="cpu_map_x86_phenom.xml"/> + <include filename="cpu_map_x86_Opteron_G1.xml"/> + <include filename="cpu_map_x86_Opteron_G2.xml"/> + <include filename="cpu_map_x86_Opteron_G3.xml"/> + <include filename="cpu_map_x86_Opteron_G4.xml"/> + <include filename="cpu_map_x86_Opteron_G5.xml"/> + <include filename="cpu_map_x86_EPYC.xml"/> + <include filename="cpu_map_x86_EPYC-IBRS.xml"/> </arch> <arch name='ppc64'> diff --git a/src/cpu/cpu_map_x86_486.xml b/src/cpu/cpu_map_x86_486.xml new file mode 100644 index 0000000000..61fa3797e8 --- /dev/null +++ b/src/cpu/cpu_map_x86_486.xml @@ -0,0 +1,7 @@ +<cpus> + <model name='486'> + <feature name='fpu'/> + <feature name='pse'/> + <feature name='vme'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Broadwell-IBRS.xml b/src/cpu/cpu_map_x86_Broadwell-IBRS.xml new file mode 100644 index 0000000000..fc7a3371a5 --- /dev/null +++ b/src/cpu/cpu_map_x86_Broadwell-IBRS.xml @@ -0,0 +1,61 @@ +<cpus> + <model name='Broadwell-IBRS'> + <signature family='6' model='61'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml b/src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml new file mode 100644 index 0000000000..19949cb6ca --- /dev/null +++ b/src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml @@ -0,0 +1,59 @@ +<cpus> + <model name='Broadwell-noTSX-IBRS'> + <signature family='6' model='61'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Broadwell-noTSX.xml b/src/cpu/cpu_map_x86_Broadwell-noTSX.xml new file mode 100644 index 0000000000..6219bd4102 --- /dev/null +++ b/src/cpu/cpu_map_x86_Broadwell-noTSX.xml @@ -0,0 +1,58 @@ +<cpus> + <model name='Broadwell-noTSX'> + <signature family='6' model='61'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Broadwell.xml b/src/cpu/cpu_map_x86_Broadwell.xml new file mode 100644 index 0000000000..1511394f0b --- /dev/null +++ b/src/cpu/cpu_map_x86_Broadwell.xml @@ -0,0 +1,60 @@ +<cpus> + <model name='Broadwell'> + <signature family='6' model='61'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Conroe.xml b/src/cpu/cpu_map_x86_Conroe.xml new file mode 100644 index 0000000000..ebcab7be31 --- /dev/null +++ b/src/cpu/cpu_map_x86_Conroe.xml @@ -0,0 +1,33 @@ +<cpus> + <model name='Conroe'> + <signature family='6' model='15'/> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_EPYC-IBRS.xml b/src/cpu/cpu_map_x86_EPYC-IBRS.xml new file mode 100644 index 0000000000..219ead70df --- /dev/null +++ b/src/cpu/cpu_map_x86_EPYC-IBRS.xml @@ -0,0 +1,73 @@ +<cpus> + <model name='EPYC-IBPB'> + <signature family='23' model='1'/> + <vendor name='AMD'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='clflushopt'/> + <feature name='cmov'/> + <feature name='cr8legacy'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='fxsr_opt'/> + <feature name='ibpb'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='misalignsse'/> + <feature name='mmx'/> + <feature name='mmxext'/> + <feature name='monitor'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='osvw'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sha-ni'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='sse4a'/> + <feature name='ssse3'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='vme'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_EPYC.xml b/src/cpu/cpu_map_x86_EPYC.xml new file mode 100644 index 0000000000..6458dc820c --- /dev/null +++ b/src/cpu/cpu_map_x86_EPYC.xml @@ -0,0 +1,72 @@ +<cpus> + <model name='EPYC'> + <signature family='23' model='1'/> + <vendor name='AMD'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='clflushopt'/> + <feature name='cmov'/> + <feature name='cr8legacy'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='fxsr_opt'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='misalignsse'/> + <feature name='mmx'/> + <feature name='mmxext'/> + <feature name='monitor'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='osvw'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sha-ni'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='sse4a'/> + <feature name='ssse3'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='vme'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Haswell-IBRS.xml b/src/cpu/cpu_map_x86_Haswell-IBRS.xml new file mode 100644 index 0000000000..01bab7b803 --- /dev/null +++ b/src/cpu/cpu_map_x86_Haswell-IBRS.xml @@ -0,0 +1,57 @@ +<cpus> + <model name='Haswell-IBRS'> + <signature family='6' model='60'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml b/src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml new file mode 100644 index 0000000000..7b53b7be29 --- /dev/null +++ b/src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml @@ -0,0 +1,55 @@ +<cpus> + <model name='Haswell-noTSX-IBRS'> + <signature family='6' model='60'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Haswell-noTSX.xml b/src/cpu/cpu_map_x86_Haswell-noTSX.xml new file mode 100644 index 0000000000..10b460818a --- /dev/null +++ b/src/cpu/cpu_map_x86_Haswell-noTSX.xml @@ -0,0 +1,54 @@ +<cpus> + <model name='Haswell-noTSX'> + <signature family='6' model='60'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Haswell.xml b/src/cpu/cpu_map_x86_Haswell.xml new file mode 100644 index 0000000000..84275b1bdf --- /dev/null +++ b/src/cpu/cpu_map_x86_Haswell.xml @@ -0,0 +1,56 @@ +<cpus> + <model name='Haswell'> + <signature family='6' model='60'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_IvyBridge-IBRS.xml b/src/cpu/cpu_map_x86_IvyBridge-IBRS.xml new file mode 100644 index 0000000000..27eb120a8a --- /dev/null +++ b/src/cpu/cpu_map_x86_IvyBridge-IBRS.xml @@ -0,0 +1,51 @@ +<cpus> + <model name='IvyBridge-IBRS'> + <signature family='6' model='58'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_IvyBridge.xml b/src/cpu/cpu_map_x86_IvyBridge.xml new file mode 100644 index 0000000000..54f5f55a51 --- /dev/null +++ b/src/cpu/cpu_map_x86_IvyBridge.xml @@ -0,0 +1,50 @@ +<cpus> + <model name='IvyBridge'> + <signature family='6' model='58'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Nehalem-IBRS.xml b/src/cpu/cpu_map_x86_Nehalem-IBRS.xml new file mode 100644 index 0000000000..f2230ffa89 --- /dev/null +++ b/src/cpu/cpu_map_x86_Nehalem-IBRS.xml @@ -0,0 +1,38 @@ +<cpus> + <model name='Nehalem-IBRS'> + <signature family='6' model='26'/> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Nehalem.xml b/src/cpu/cpu_map_x86_Nehalem.xml new file mode 100644 index 0000000000..8e0fd5dc49 --- /dev/null +++ b/src/cpu/cpu_map_x86_Nehalem.xml @@ -0,0 +1,37 @@ +<cpus> + <model name='Nehalem'> + <signature family='6' model='26'/> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Opteron_G1.xml b/src/cpu/cpu_map_x86_Opteron_G1.xml new file mode 100644 index 0000000000..8d043fe889 --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G1.xml @@ -0,0 +1,31 @@ +<cpus> + <model name='Opteron_G1'> + <signature family='15' model='6'/> + <vendor name='AMD'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Opteron_G2.xml b/src/cpu/cpu_map_x86_Opteron_G2.xml new file mode 100644 index 0000000000..774e86462f --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G2.xml @@ -0,0 +1,35 @@ +<cpus> + <model name='Opteron_G2'> + <signature family='15' model='6'/> + <vendor name='AMD'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Opteron_G3.xml b/src/cpu/cpu_map_x86_Opteron_G3.xml new file mode 100644 index 0000000000..5d27e635dc --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G3.xml @@ -0,0 +1,40 @@ +<cpus> + <model name='Opteron_G3'> + <signature family='15' model='6'/> + <vendor name='AMD'/> + <feature name='abm'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='misalignsse'/> + <feature name='mmx'/> + <feature name='monitor'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4a'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Opteron_G4.xml b/src/cpu/cpu_map_x86_Opteron_G4.xml new file mode 100644 index 0000000000..d77cc286ff --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G4.xml @@ -0,0 +1,50 @@ +<cpus> + <model name='Opteron_G4'> + <signature family='21' model='1'/> + <vendor name='AMD'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fma4'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='misalignsse'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='sse4a'/> + <feature name='ssse3'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='xop'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Opteron_G5.xml b/src/cpu/cpu_map_x86_Opteron_G5.xml new file mode 100644 index 0000000000..9a5ecbd4da --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G5.xml @@ -0,0 +1,53 @@ +<cpus> + <model name='Opteron_G5'> + <signature family='21' model='2'/> + <vendor name='AMD'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fma4'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='misalignsse'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='sse4a'/> + <feature name='ssse3'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tbm'/> + <feature name='tsc'/> + <feature name='xop'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Penryn.xml b/src/cpu/cpu_map_x86_Penryn.xml new file mode 100644 index 0000000000..9b0c0cfd0e --- /dev/null +++ b/src/cpu/cpu_map_x86_Penryn.xml @@ -0,0 +1,35 @@ +<cpus> + <model name='Penryn'> + <signature family='6' model='23'/> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_SandyBridge-IBRS.xml b/src/cpu/cpu_map_x86_SandyBridge-IBRS.xml new file mode 100644 index 0000000000..1f56b4bc81 --- /dev/null +++ b/src/cpu/cpu_map_x86_SandyBridge-IBRS.xml @@ -0,0 +1,45 @@ +<cpus> + <model name='SandyBridge-IBRS'> + <signature family='6' model='42'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_SandyBridge.xml b/src/cpu/cpu_map_x86_SandyBridge.xml new file mode 100644 index 0000000000..eea85fc3f3 --- /dev/null +++ b/src/cpu/cpu_map_x86_SandyBridge.xml @@ -0,0 +1,44 @@ +<cpus> + <model name='SandyBridge'> + <signature family='6' model='42'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml b/src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml new file mode 100644 index 0000000000..1603bb8c13 --- /dev/null +++ b/src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml @@ -0,0 +1,70 @@ +<cpus> + <model name='Skylake-Client-IBRS'> + <signature family='6' model='94'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='mpx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Skylake-Client.xml b/src/cpu/cpu_map_x86_Skylake-Client.xml new file mode 100644 index 0000000000..c0286b9fa5 --- /dev/null +++ b/src/cpu/cpu_map_x86_Skylake-Client.xml @@ -0,0 +1,69 @@ +<cpus> + <model name='Skylake-Client'> + <signature family='6' model='94'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='mpx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml b/src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml new file mode 100644 index 0000000000..45350792a0 --- /dev/null +++ b/src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml @@ -0,0 +1,77 @@ +<cpus> + <model name='Skylake-Server-IBRS'> + <signature family='6' model='85'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='avx512bw'/> + <feature name='avx512cd'/> + <feature name='avx512dq'/> + <feature name='avx512f'/> + <feature name='avx512vl'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='clwb'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='mpx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Skylake-Server.xml b/src/cpu/cpu_map_x86_Skylake-Server.xml new file mode 100644 index 0000000000..0119428357 --- /dev/null +++ b/src/cpu/cpu_map_x86_Skylake-Server.xml @@ -0,0 +1,76 @@ +<cpus> + <model name='Skylake-Server'> + <signature family='6' model='85'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='avx512bw'/> + <feature name='avx512cd'/> + <feature name='avx512dq'/> + <feature name='avx512f'/> + <feature name='avx512vl'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='clwb'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='mpx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Westmere-IBRS.xml b/src/cpu/cpu_map_x86_Westmere-IBRS.xml new file mode 100644 index 0000000000..dea7a73dcd --- /dev/null +++ b/src/cpu/cpu_map_x86_Westmere-IBRS.xml @@ -0,0 +1,39 @@ +<cpus> + <model name='Westmere-IBRS'> + <signature family='6' model='44'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='spec-ctrl'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_Westmere.xml b/src/cpu/cpu_map_x86_Westmere.xml new file mode 100644 index 0000000000..f5c31449e0 --- /dev/null +++ b/src/cpu/cpu_map_x86_Westmere.xml @@ -0,0 +1,38 @@ +<cpus> + <model name='Westmere'> + <signature family='6' model='44'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_athlon.xml b/src/cpu/cpu_map_x86_athlon.xml new file mode 100644 index 0000000000..0d44508e20 --- /dev/null +++ b/src/cpu/cpu_map_x86_athlon.xml @@ -0,0 +1,28 @@ +<cpus> + <model name='athlon'> + <vendor name='AMD'/> + <feature name='3dnow'/> + <feature name='3dnowext'/> + <feature name='apic'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='mmxext'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='tsc'/> + <feature name='vme'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_core2duo.xml b/src/cpu/cpu_map_x86_core2duo.xml new file mode 100644 index 0000000000..3c9a148f3c --- /dev/null +++ b/src/cpu/cpu_map_x86_core2duo.xml @@ -0,0 +1,33 @@ +<cpus> + <model name='core2duo'> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='monitor'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='vme'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_coreduo.xml b/src/cpu/cpu_map_x86_coreduo.xml new file mode 100644 index 0000000000..676e846920 --- /dev/null +++ b/src/cpu/cpu_map_x86_coreduo.xml @@ -0,0 +1,29 @@ +<cpus> + <model name='coreduo'> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='monitor'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='tsc'/> + <feature name='vme'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_cpu64-rhel5.xml b/src/cpu/cpu_map_x86_cpu64-rhel5.xml new file mode 100644 index 0000000000..670a92f274 --- /dev/null +++ b/src/cpu/cpu_map_x86_cpu64-rhel5.xml @@ -0,0 +1,29 @@ +<cpus> + <model name='cpu64-rhel5'> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_cpu64-rhel6.xml b/src/cpu/cpu_map_x86_cpu64-rhel6.xml new file mode 100644 index 0000000000..3cae0f00c2 --- /dev/null +++ b/src/cpu/cpu_map_x86_cpu64-rhel6.xml @@ -0,0 +1,31 @@ +<cpus> + <model name='cpu64-rhel6'> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_features.xml b/src/cpu/cpu_map_x86_features.xml new file mode 100644 index 0000000000..109c653dbc --- /dev/null +++ b/src/cpu/cpu_map_x86_features.xml @@ -0,0 +1,440 @@ +<cpus> + <!-- standard features, EDX --> + <feature name='fpu'> + <cpuid eax_in='0x01' edx='0x00000001'/> + </feature> + <feature name='vme'> + <cpuid eax_in='0x01' edx='0x00000002'/> + </feature> + <feature name='de'> + <cpuid eax_in='0x01' edx='0x00000004'/> + </feature> + <feature name='pse'> + <cpuid eax_in='0x01' edx='0x00000008'/> + </feature> + <feature name='tsc'> + <cpuid eax_in='0x01' edx='0x00000010'/> + </feature> + <feature name='msr'> + <cpuid eax_in='0x01' edx='0x00000020'/> + </feature> + <feature name='pae'> + <cpuid eax_in='0x01' edx='0x00000040'/> + </feature> + <feature name='mce'> + <cpuid eax_in='0x01' edx='0x00000080'/> + </feature> + <feature name='cx8'> + <cpuid eax_in='0x01' edx='0x00000100'/> + </feature> + <feature name='apic'> + <cpuid eax_in='0x01' edx='0x00000200'/> + </feature> + <feature name='sep'> + <cpuid eax_in='0x01' edx='0x00000800'/> + </feature> + <feature name='mtrr'> + <cpuid eax_in='0x01' edx='0x00001000'/> + </feature> + <feature name='pge'> + <cpuid eax_in='0x01' edx='0x00002000'/> + </feature> + <feature name='mca'> + <cpuid eax_in='0x01' edx='0x00004000'/> + </feature> + <feature name='cmov'> + <cpuid eax_in='0x01' edx='0x00008000'/> + </feature> + <feature name='pat'> + <cpuid eax_in='0x01' edx='0x00010000'/> + </feature> + <feature name='pse36'> + <cpuid eax_in='0x01' edx='0x00020000'/> + </feature> + <feature name='pn'> + <cpuid eax_in='0x01' edx='0x00040000'/> + </feature> + <feature name='clflush'> + <cpuid eax_in='0x01' edx='0x00080000'/> + </feature> + <feature name='ds'> + <cpuid eax_in='0x01' edx='0x00200000'/> + </feature> + <feature name='acpi'> + <cpuid eax_in='0x01' edx='0x00400000'/> + </feature> + <feature name='mmx'> + <cpuid eax_in='0x01' edx='0x00800000'/> + </feature> + <feature name='fxsr'> + <cpuid eax_in='0x01' edx='0x01000000'/> + </feature> + <feature name='sse'> + <cpuid eax_in='0x01' edx='0x02000000'/> + </feature> + <feature name='sse2'> + <cpuid eax_in='0x01' edx='0x04000000'/> + </feature> + <feature name='ss'> + <cpuid eax_in='0x01' edx='0x08000000'/> + </feature> + <feature name='ht'> + <cpuid eax_in='0x01' edx='0x10000000'/> + </feature> + <feature name='tm'> + <cpuid eax_in='0x01' edx='0x20000000'/> + </feature> + <feature name='ia64'> + <cpuid eax_in='0x01' edx='0x40000000'/> + </feature> + <feature name='pbe'> + <cpuid eax_in='0x01' edx='0x80000000'/> + </feature> + + <!-- standard features, ECX --> + <feature name='pni'> <!-- sse3 --> + <cpuid eax_in='0x01' ecx='0x00000001'/> + </feature> + <feature name='pclmuldq'> <!-- pclmulqdq --> + <cpuid eax_in='0x01' ecx='0x00000002'/> + </feature> + <feature name='dtes64'> + <cpuid eax_in='0x01' ecx='0x00000004'/> + </feature> + <feature name='monitor'> + <cpuid eax_in='0x01' ecx='0x00000008'/> + </feature> + <feature name='ds_cpl'> <!-- ds-cpl --> + <cpuid eax_in='0x01' ecx='0x00000010'/> + </feature> + <feature name='vmx'> + <cpuid eax_in='0x01' ecx='0x00000020'/> + </feature> + <feature name='smx'> + <cpuid eax_in='0x01' ecx='0x00000040'/> + </feature> + <feature name='est'> + <cpuid eax_in='0x01' ecx='0x00000080'/> + </feature> + <feature name='tm2'> + <cpuid eax_in='0x01' ecx='0x00000100'/> + </feature> + <feature name='ssse3'> + <cpuid eax_in='0x01' ecx='0x00000200'/> + </feature> + <feature name='cid'> + <cpuid eax_in='0x01' ecx='0x00000400'/> + </feature> + <feature name='fma'> + <cpuid eax_in='0x01' ecx='0x00001000'/> + </feature> + <feature name='cx16'> + <cpuid eax_in='0x01' ecx='0x00002000'/> + </feature> + <feature name='xtpr'> + <cpuid eax_in='0x01' ecx='0x00004000'/> + </feature> + <feature name='pdcm'> + <cpuid eax_in='0x01' ecx='0x00008000'/> + </feature> + <feature name='pcid'> + <cpuid eax_in='0x01' ecx='0x00020000'/> + </feature> + <feature name='dca'> + <cpuid eax_in='0x01' ecx='0x00040000'/> + </feature> + <feature name='sse4.1'> <!-- sse4-1, sse4_1 --> + <cpuid eax_in='0x01' ecx='0x00080000'/> + </feature> + <feature name='sse4.2'> <!-- sse4-2, sse4_2 --> + <cpuid eax_in='0x01' ecx='0x00100000'/> + </feature> + <feature name='x2apic'> + <cpuid eax_in='0x01' ecx='0x00200000'/> + </feature> + <feature name='movbe'> + <cpuid eax_in='0x01' ecx='0x00400000'/> + </feature> + <feature name='popcnt'> + <cpuid eax_in='0x01' ecx='0x00800000'/> + </feature> + <feature name='tsc-deadline'> + <cpuid eax_in='0x01' ecx='0x01000000'/> + </feature> + <feature name='aes'> + <cpuid eax_in='0x01' ecx='0x02000000'/> + </feature> + <feature name='xsave'> + <cpuid eax_in='0x01' ecx='0x04000000'/> + </feature> + <feature name='osxsave'> + <cpuid eax_in='0x01' ecx='0x08000000'/> + </feature> + <feature name='avx'> + <cpuid eax_in='0x01' ecx='0x10000000'/> + </feature> + <feature name='f16c'> + <cpuid eax_in='0x01' ecx='0x20000000'/> + </feature> + <feature name='rdrand'> + <cpuid eax_in='0x01' ecx='0x40000000'/> + </feature> + <feature name='hypervisor'> + <cpuid eax_in='0x01' ecx='0x80000000'/> + </feature> + + <!-- Termal Power and Management --> + <feature name='arat'> + <cpuid eax_in='0x06' eax='0x00000004'/> + </feature> + + <!-- cpuid function 0x7 ecx 0x0 features --> + <feature name='fsgsbase'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000001'/> + </feature> + <feature name='tsc_adjust'> <!-- tsc-adjust --> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000002'/> + </feature> + <feature name='bmi1'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000008'/> + </feature> + <feature name='hle'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000010'/> + </feature> + <feature name='avx2'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000020'/> + </feature> + <feature name='smep'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000080'/> + </feature> + <feature name='bmi2'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000100'/> + </feature> + <feature name='erms'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000200'/> + </feature> + <feature name='invpcid'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000400'/> + </feature> + <feature name='rtm'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00000800'/> + </feature> + <feature name='cmt'> <!-- cqm --> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00001000'/> + </feature> + <feature name='mpx'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00004000'/> + </feature> + <feature name='avx512f'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00010000'/> + </feature> + <feature name='avx512dq'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00020000'/> + </feature> + <feature name='rdseed'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00040000'/> + </feature> + <feature name='adx'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00080000'/> + </feature> + <feature name='smap'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00100000'/> + </feature> + <feature name='avx512ifma'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00200000'/> + </feature> + <feature name='pcommit'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00400000'/> + </feature> + <feature name='clflushopt'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00800000'/> + </feature> + <feature name='clwb'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x01000000'/> + </feature> + <feature name='avx512pf'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x04000000'/> + </feature> + <feature name='avx512er'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x08000000'/> + </feature> + <feature name='avx512cd'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x10000000'/> + </feature> + <feature name='sha-ni'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x20000000'/> + </feature> + <feature name='avx512bw'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x40000000'/> + </feature> + <feature name='avx512vl'> + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x80000000'/> + </feature> + + <feature name='avx512vbmi'> + <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00000002'/> + </feature> + <feature name='pku'> + <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00000008'/> + </feature> + <feature name='ospke'> + <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00000010'/> + </feature> + <feature name='la57'> + <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00010000'/> + </feature> + + <feature name='avx512-4vnniw'> + <cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000004'/> + </feature> + <feature name='avx512-4fmaps'> + <cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000008'/> + </feature> + <feature name='spec-ctrl'> + <cpuid eax_in='0x07' ecx_in='0x00' edx='0x04000000'/> + </feature> + <feature name='ssbd'> + <cpuid eax_in='0x07' ecx_in='0x00' edx='0x80000000'/> + </feature> + + <!-- Processor Extended State Enumeration sub leaf 1 --> + <feature name='xsaveopt'> + <cpuid eax_in='0x0d' ecx_in='0x01' eax='0x00000001'/> + </feature> + <feature name='xsavec'> + <cpuid eax_in='0x0d' ecx_in='0x01' eax='0x00000002'/> + </feature> + <feature name='xgetbv1'> + <cpuid eax_in='0x0d' ecx_in='0x01' eax='0x00000004'/> + </feature> + <feature name='xsaves' migratable='no'> + <cpuid eax_in='0x0d' ecx_in='0x01' eax='0x00000008'/> + </feature> + + <!-- cpuid level 0x0000000f:1 (edx) --> + <feature name='mbm_total'> + <cpuid eax_in='0x0f' ecx_in='0x01' edx='0x00000002'/> + </feature> + <feature name='mbm_local'> + <cpuid eax_in='0x0f' ecx_in='0x01' edx='0x00000004'/> + </feature> + + <!-- extended features, EDX --> + <feature name='syscall'> + <cpuid eax_in='0x80000001' edx='0x00000800'/> + </feature> + <feature name='nx'> <!-- xd --> + <cpuid eax_in='0x80000001' edx='0x00100000'/> + </feature> + <feature name='mmxext'> + <cpuid eax_in='0x80000001' edx='0x00400000'/> + </feature> + <feature name='fxsr_opt'> <!-- ffxsr, fxsr-opt --> + <cpuid eax_in='0x80000001' edx='0x02000000'/> + </feature> + <feature name='pdpe1gb'> + <cpuid eax_in='0x80000001' edx='0x04000000'/> + </feature> + <feature name='rdtscp'> + <cpuid eax_in='0x80000001' edx='0x08000000'/> + </feature> + <feature name='lm'> <!-- i64 --> + <cpuid eax_in='0x80000001' edx='0x20000000'/> + </feature> + <feature name='3dnowext'> + <cpuid eax_in='0x80000001' edx='0x40000000'/> + </feature> + <feature name='3dnow'> + <cpuid eax_in='0x80000001' edx='0x80000000'/> + </feature> + + <!-- extended features, ECX --> + <feature name='lahf_lm'> <!-- lahf-lm --> + <cpuid eax_in='0x80000001' ecx='0x00000001'/> + </feature> + <feature name='cmp_legacy'> <!-- cmp-legacy --> + <cpuid eax_in='0x80000001' ecx='0x00000002'/> + </feature> + <feature name='svm'> + <cpuid eax_in='0x80000001' ecx='0x00000004'/> + </feature> + <feature name='extapic'> + <cpuid eax_in='0x80000001' ecx='0x00000008'/> + </feature> + <feature name='cr8legacy'> + <cpuid eax_in='0x80000001' ecx='0x00000010'/> + </feature> + <feature name='abm'> + <cpuid eax_in='0x80000001' ecx='0x00000020'/> + </feature> + <feature name='sse4a'> + <cpuid eax_in='0x80000001' ecx='0x00000040'/> + </feature> + <feature name='misalignsse'> + <cpuid eax_in='0x80000001' ecx='0x00000080'/> + </feature> + <feature name='3dnowprefetch'> + <cpuid eax_in='0x80000001' ecx='0x00000100'/> + </feature> + <feature name='osvw'> + <cpuid eax_in='0x80000001' ecx='0x00000200'/> + </feature> + <feature name='ibs'> + <cpuid eax_in='0x80000001' ecx='0x00000400'/> + </feature> + <feature name='xop'> + <cpuid eax_in='0x80000001' ecx='0x00000800'/> + </feature> + <feature name='skinit'> + <cpuid eax_in='0x80000001' ecx='0x00001000'/> + </feature> + <feature name='wdt'> + <cpuid eax_in='0x80000001' ecx='0x00002000'/> + </feature> + <feature name='lwp'> + <cpuid eax_in='0x80000001' ecx='0x00008000'/> + </feature> + <feature name='fma4'> + <cpuid eax_in='0x80000001' ecx='0x00010000'/> + </feature> + <feature name='tce'> + <cpuid eax_in='0x80000001' ecx='0x00020000'/> + </feature> + <feature name='cvt16'> + <cpuid eax_in='0x80000001' ecx='0x00040000'/> + </feature> + <feature name='nodeid_msr'> <!-- nodeid-msr --> + <cpuid eax_in='0x80000001' ecx='0x00080000'/> + </feature> + <feature name='tbm'> + <cpuid eax_in='0x80000001' ecx='0x00200000'/> + </feature> + <feature name='topoext'> + <cpuid eax_in='0x80000001' ecx='0x00400000'/> + </feature> + <feature name='perfctr_core'> <!-- perfctr-core --> + <cpuid eax_in='0x80000001' ecx='0x00800000'/> + </feature> + <feature name='perfctr_nb'> <!-- perfctr-nb --> + <cpuid eax_in='0x80000001' ecx='0x01000000'/> + </feature> + + <!-- Advanced Power Management edx features --> + <feature name='invtsc' migratable='no'> + <cpuid eax_in='0x80000007' edx='0x00000100'/> + </feature> + + <!-- More AMD-specific features --> + <feature name='ibpb'> + <cpuid eax_in='0x80000008' ebx='0x00001000'/> + </feature> + <feature name='amd-ssbd'> + <cpuid eax_in='0x80000008' ebx='0x01000000'/> + </feature> + <feature name='virt-ssbd'> + <cpuid eax_in='0x80000008' ebx='0x02000000'/> + </feature> + <feature name='amd-no-ssb'> + <cpuid eax_in='0x80000008' ebx='0x04000000'/> + </feature> +</cpus> diff --git a/src/cpu/cpu_map_x86_kvm32.xml b/src/cpu/cpu_map_x86_kvm32.xml new file mode 100644 index 0000000000..5f08a5e7fc --- /dev/null +++ b/src/cpu/cpu_map_x86_kvm32.xml @@ -0,0 +1,26 @@ +<cpus> + <model name='kvm32'> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_kvm64.xml b/src/cpu/cpu_map_x86_kvm64.xml new file mode 100644 index 0000000000..80b24e2a49 --- /dev/null +++ b/src/cpu/cpu_map_x86_kvm64.xml @@ -0,0 +1,30 @@ +<cpus> + <model name='kvm64'> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_n270.xml b/src/cpu/cpu_map_x86_n270.xml new file mode 100644 index 0000000000..cb359d968e --- /dev/null +++ b/src/cpu/cpu_map_x86_n270.xml @@ -0,0 +1,30 @@ +<cpus> + <model name='n270'> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='monitor'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='ssse3'/> + <feature name='tsc'/> + <feature name='vme'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_pentium.xml b/src/cpu/cpu_map_x86_pentium.xml new file mode 100644 index 0000000000..d44c1399b0 --- /dev/null +++ b/src/cpu/cpu_map_x86_pentium.xml @@ -0,0 +1,13 @@ +<cpus> + <model name='pentium'> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='pse'/> + <feature name='tsc'/> + <feature name='vme'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_pentium2.xml b/src/cpu/cpu_map_x86_pentium2.xml new file mode 100644 index 0000000000..0d772bad2f --- /dev/null +++ b/src/cpu/cpu_map_x86_pentium2.xml @@ -0,0 +1,22 @@ +<cpus> + <model name='pentium2'> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='tsc'/> + <feature name='vme'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_pentium3.xml b/src/cpu/cpu_map_x86_pentium3.xml new file mode 100644 index 0000000000..24eb227c28 --- /dev/null +++ b/src/cpu/cpu_map_x86_pentium3.xml @@ -0,0 +1,23 @@ +<cpus> + <model name='pentium3'> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='tsc'/> + <feature name='vme'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_pentiumpro.xml b/src/cpu/cpu_map_x86_pentiumpro.xml new file mode 100644 index 0000000000..9f7a610a87 --- /dev/null +++ b/src/cpu/cpu_map_x86_pentiumpro.xml @@ -0,0 +1,21 @@ +<cpus> + <model name='pentiumpro'> + <feature name='apic'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pse'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_phenom.xml b/src/cpu/cpu_map_x86_phenom.xml new file mode 100644 index 0000000000..71f004057b --- /dev/null +++ b/src/cpu/cpu_map_x86_phenom.xml @@ -0,0 +1,36 @@ +<cpus> + <model name='phenom'> + <vendor name='AMD'/> + <feature name='3dnow'/> + <feature name='3dnowext'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='fxsr_opt'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='mmxext'/> + <feature name='monitor'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_qemu32.xml b/src/cpu/cpu_map_x86_qemu32.xml new file mode 100644 index 0000000000..3c9cdec981 --- /dev/null +++ b/src/cpu/cpu_map_x86_qemu32.xml @@ -0,0 +1,22 @@ +<cpus> + <model name='qemu32'> + <feature name='apic'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='tsc'/> + </model> +</cpus> diff --git a/src/cpu/cpu_map_x86_qemu64.xml b/src/cpu/cpu_map_x86_qemu64.xml new file mode 100644 index 0000000000..ed3b8d54e2 --- /dev/null +++ b/src/cpu/cpu_map_x86_qemu64.xml @@ -0,0 +1,40 @@ +<cpus> + <model name='qemu64'> + <!-- These are supported only by TCG. KVM supports them only if the + host does. So we leave them out: + +<feature name='abm'/> +<feature name='lahf_lm'/> +<feature name='popcnt'/> +<feature name='sse4a'/> + --> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> + </model> + +</cpus> diff --git a/src/cpu/cpu_map_x86_vendors.xml b/src/cpu/cpu_map_x86_vendors.xml new file mode 100644 index 0000000000..418712af21 --- /dev/null +++ b/src/cpu/cpu_map_x86_vendors.xml @@ -0,0 +1,4 @@ +<cpus> + <vendor name='Intel' string='GenuineIntel'/> + <vendor name='AMD' string='AuthenticAMD'/> +</cpus> -- 2.17.1

On 08/01/2018 01:02 PM, Daniel P. Berrangé wrote:
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> --- src/cpu/cpu_map.xml | 2374 +----------------- src/cpu/cpu_map_x86_486.xml | 7 + src/cpu/cpu_map_x86_Broadwell-IBRS.xml | 61 + src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml | 59 + src/cpu/cpu_map_x86_Broadwell-noTSX.xml | 58 + src/cpu/cpu_map_x86_Broadwell.xml | 60 + src/cpu/cpu_map_x86_Conroe.xml | 33 + src/cpu/cpu_map_x86_EPYC-IBRS.xml | 73 + src/cpu/cpu_map_x86_EPYC.xml | 72 + src/cpu/cpu_map_x86_Haswell-IBRS.xml | 57 + src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml | 55 + src/cpu/cpu_map_x86_Haswell-noTSX.xml | 54 + src/cpu/cpu_map_x86_Haswell.xml | 56 + src/cpu/cpu_map_x86_IvyBridge-IBRS.xml | 51 + src/cpu/cpu_map_x86_IvyBridge.xml | 50 + src/cpu/cpu_map_x86_Nehalem-IBRS.xml | 38 + src/cpu/cpu_map_x86_Nehalem.xml | 37 + src/cpu/cpu_map_x86_Opteron_G1.xml | 31 + src/cpu/cpu_map_x86_Opteron_G2.xml | 35 + src/cpu/cpu_map_x86_Opteron_G3.xml | 40 + src/cpu/cpu_map_x86_Opteron_G4.xml | 50 + src/cpu/cpu_map_x86_Opteron_G5.xml | 53 + src/cpu/cpu_map_x86_Penryn.xml | 35 + src/cpu/cpu_map_x86_SandyBridge-IBRS.xml | 45 + src/cpu/cpu_map_x86_SandyBridge.xml | 44 + src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml | 70 + src/cpu/cpu_map_x86_Skylake-Client.xml | 69 + src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml | 77 + src/cpu/cpu_map_x86_Skylake-Server.xml | 76 + src/cpu/cpu_map_x86_Westmere-IBRS.xml | 39 + src/cpu/cpu_map_x86_Westmere.xml | 38 + src/cpu/cpu_map_x86_athlon.xml | 28 + src/cpu/cpu_map_x86_core2duo.xml | 33 + src/cpu/cpu_map_x86_coreduo.xml | 29 + src/cpu/cpu_map_x86_cpu64-rhel5.xml | 29 + src/cpu/cpu_map_x86_cpu64-rhel6.xml | 31 + src/cpu/cpu_map_x86_features.xml | 440 ++++ src/cpu/cpu_map_x86_kvm32.xml | 26 + src/cpu/cpu_map_x86_kvm64.xml | 30 + src/cpu/cpu_map_x86_n270.xml | 30 + src/cpu/cpu_map_x86_pentium.xml | 13 + src/cpu/cpu_map_x86_pentium2.xml | 22 + src/cpu/cpu_map_x86_pentium3.xml | 23 + src/cpu/cpu_map_x86_pentiumpro.xml | 21 + src/cpu/cpu_map_x86_phenom.xml | 36 + src/cpu/cpu_map_x86_qemu32.xml | 22 + src/cpu/cpu_map_x86_qemu64.xml | 40 + src/cpu/cpu_map_x86_vendors.xml | 4 + 48 files changed, 2427 insertions(+), 2327 deletions(-) create mode 100644 src/cpu/cpu_map_x86_486.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell.xml create mode 100644 src/cpu/cpu_map_x86_Conroe.xml create mode 100644 src/cpu/cpu_map_x86_EPYC-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_EPYC.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX.xml create mode 100644 src/cpu/cpu_map_x86_Haswell.xml create mode 100644 src/cpu/cpu_map_x86_IvyBridge-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_IvyBridge.xml create mode 100644 src/cpu/cpu_map_x86_Nehalem-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Nehalem.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G1.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G2.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G3.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G4.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G5.xml create mode 100644 src/cpu/cpu_map_x86_Penryn.xml create mode 100644 src/cpu/cpu_map_x86_SandyBridge-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_SandyBridge.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Client.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Server.xml create mode 100644 src/cpu/cpu_map_x86_Westmere-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Westmere.xml create mode 100644 src/cpu/cpu_map_x86_athlon.xml create mode 100644 src/cpu/cpu_map_x86_core2duo.xml create mode 100644 src/cpu/cpu_map_x86_coreduo.xml create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel5.xml create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel6.xml create mode 100644 src/cpu/cpu_map_x86_features.xml create mode 100644 src/cpu/cpu_map_x86_kvm32.xml create mode 100644 src/cpu/cpu_map_x86_kvm64.xml create mode 100644 src/cpu/cpu_map_x86_n270.xml create mode 100644 src/cpu/cpu_map_x86_pentium.xml create mode 100644 src/cpu/cpu_map_x86_pentium2.xml create mode 100644 src/cpu/cpu_map_x86_pentium3.xml create mode 100644 src/cpu/cpu_map_x86_pentiumpro.xml create mode 100644 src/cpu/cpu_map_x86_phenom.xml create mode 100644 src/cpu/cpu_map_x86_qemu32.xml create mode 100644 src/cpu/cpu_map_x86_qemu64.xml create mode 100644 src/cpu/cpu_map_x86_vendors.xml
Reviewed-by: John Ferlan <jferlan@redhat.com> John

On Wed, Aug 01, 2018 at 18:02:28 +0100, Daniel P. Berrangé wrote:
Currently we have a cpu_map.xml file that contains all the features and CPU models for all architectures in one place. I frequently find myself wondering about the differences between CPU models, but it is hard to compare them as the list of features is huge.
With this patch series we end up with a large set of small files, one per named CPU model, along with one for the feature and vendor definitions
cpu_map_ppc64_POWER6.xml cpu_map_ppc64_POWER7.xml cpu_map_ppc64_POWER8.xml cpu_map_ppc64_POWER9.xml cpu_map_ppc64_POWERPC_e5500.xml cpu_map_ppc64_POWERPC_e6500.xml cpu_map_ppc64_vendors.xml cpu_map_x86_486.xml cpu_map_x86_athlon.xml
Could we make a cpu_map subdirectory and create the CPU definitions there instead? For example src/cpu_map/ppc64_POWER6.xml src/cpu_map/x86_Broadwell-IBRS.xml I think it would make navigation through both the sources and the CPU models a lot easier. Jirka

On 08/14/2018 05:00 AM, Jiri Denemark wrote:
On Wed, Aug 01, 2018 at 18:02:28 +0100, Daniel P. Berrangé wrote:
Currently we have a cpu_map.xml file that contains all the features and CPU models for all architectures in one place. I frequently find myself wondering about the differences between CPU models, but it is hard to compare them as the list of features is huge.
With this patch series we end up with a large set of small files, one per named CPU model, along with one for the feature and vendor definitions
cpu_map_ppc64_POWER6.xml cpu_map_ppc64_POWER7.xml cpu_map_ppc64_POWER8.xml cpu_map_ppc64_POWER9.xml cpu_map_ppc64_POWERPC_e5500.xml cpu_map_ppc64_POWERPC_e6500.xml cpu_map_ppc64_vendors.xml cpu_map_x86_486.xml cpu_map_x86_athlon.xml
Could we make a cpu_map subdirectory and create the CPU definitions there instead? For example
src/cpu_map/ppc64_POWER6.xml src/cpu_map/x86_Broadwell-IBRS.xml
Hmm... The cpu_map or even some sort of 'arch' based subdirectory naming scheme could be useful... If it was src/cpu/cpu_map/ppc64/ and src/cpu/cpu_map/x86/, then for each .xml file in the @arch subdirectory type logic is possible, but that could possibly "miss" something that was 'previously available' from the parent cpu_map.xml file too since the include could have a directory or arch attribute rather than filename attribute. Is deleting a CPU a problem? Surely it'd make adding a new CPU easier since it would simply be adding a new file and no need to also add the include filename= to the main map. John
I think it would make navigation through both the sources and the CPU models a lot easier.
Jirka
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On Tue, Aug 14, 2018 at 08:21:40 -0400, John Ferlan wrote:
On 08/14/2018 05:00 AM, Jiri Denemark wrote:
On Wed, Aug 01, 2018 at 18:02:28 +0100, Daniel P. Berrangé wrote:
Currently we have a cpu_map.xml file that contains all the features and CPU models for all architectures in one place. I frequently find myself wondering about the differences between CPU models, but it is hard to compare them as the list of features is huge.
With this patch series we end up with a large set of small files, one per named CPU model, along with one for the feature and vendor definitions
cpu_map_ppc64_POWER6.xml cpu_map_ppc64_POWER7.xml cpu_map_ppc64_POWER8.xml cpu_map_ppc64_POWER9.xml cpu_map_ppc64_POWERPC_e5500.xml cpu_map_ppc64_POWERPC_e6500.xml cpu_map_ppc64_vendors.xml cpu_map_x86_486.xml cpu_map_x86_athlon.xml
Could we make a cpu_map subdirectory and create the CPU definitions there instead? For example
src/cpu_map/ppc64_POWER6.xml src/cpu_map/x86_Broadwell-IBRS.xml
Hmm... The cpu_map or even some sort of 'arch' based subdirectory naming scheme could be useful... If it was src/cpu/cpu_map/ppc64/ and src/cpu/cpu_map/x86/, then for each .xml file in the @arch subdirectory type logic is possible, but that could possibly "miss" something that was 'previously available' from the parent cpu_map.xml file too since the include could have a directory or arch attribute rather than filename attribute. Is deleting a CPU a problem? Surely it'd make adding a new CPU easier since it would simply be adding a new file and no need to also add the include filename= to the main map.
I think we can still keep the <include filename="..."/> elements even after moving the files into separate directory(ies). Adding a new file is not that frequent to be worth optimizing by loading all files automatically. And explicit includes makes possible issues with missing files, wrong permissions, etc. easier to spot. Jirka
participants (3)
-
Daniel P. Berrangé
-
Jiri Denemark
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John Ferlan