[libvirt] [PATCH 0/4] qemu: Use PCI by default on RISC-V
Now that the patches necessary to enable pcie-root-port usage on RISC-V have been merged into QEMU, we can go ahead and start using PCI by default on such guests when appropriate. The full series, with patch 3/4 in its unabridged form, can be obtained from https://github.com/andreabolognani/libvirt/tree/riscv-pci-by-default Andrea Bolognani (4): qemu: Require PCIe Root Port for PCI by default on ARM virt qemu: Unify address assignment for virt guests tests: Refresh capabilities for QEMU 4.0.0 on RISC-V news: Document PCI by default on RISC-V docs/news.xml | 12 + src/qemu/qemu_domain_address.c | 45 +- .../caps_4.0.0.riscv32.replies | 3864 ++++++++-------- .../caps_4.0.0.riscv32.xml | 19 +- .../caps_4.0.0.riscv64.replies | 3876 +++++++++-------- .../caps_4.0.0.riscv64.xml | 19 +- .../riscv64-virt-headless.riscv64-latest.args | 20 +- 7 files changed, 4206 insertions(+), 3649 deletions(-) -- 2.20.1
Our PCIe topology depends on the availability of PCIe Root Ports, so if none of the suitable devices (pcie-root-port, ioh3420) is compiled into QEMU we should fall back to virtio-mmio rather than trying to use PCI addresses only to fail immediately afterwards when we realize we can't use the necessary controllers. Note that this additional check is basically moot for ARM virt guests, because PCIe Root Ports were enabled in QEMU builds for the architecture well before guest OS support had been widely available; however, the opposite is true for RISC-V, and tweaking the code this way will allow us to share it between architectures. Signed-off-by: Andrea Bolognani <abologna@redhat.com> --- src/qemu/qemu_domain_address.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/qemu/qemu_domain_address.c b/src/qemu/qemu_domain_address.c index 28e79af7b1..9592dbfa60 100644 --- a/src/qemu/qemu_domain_address.c +++ b/src/qemu/qemu_domain_address.c @@ -473,9 +473,12 @@ qemuDomainAssignARMVirtioMMIOAddresses(virDomainDefPtr def, return; /* We use virtio-mmio by default on mach-virt guests only if they already - * have at least one virtio-mmio device: in all other cases, we prefer - * virtio-pci */ + * have at least one virtio-mmio device: in all other cases, assuming + * the QEMU binary supports all necessary capabilities (PCIe Root plus + * some kind of PCIe Root Port), we prefer virtio-pci */ if (qemuDomainHasPCIeRoot(def) && + (virQEMUCapsGet(qemuCaps, QEMU_CAPS_DEVICE_PCIE_ROOT_PORT) || + virQEMUCapsGet(qemuCaps, QEMU_CAPS_DEVICE_IOH3420)) && !qemuDomainHasVirtioMMIODevices(def)) { qemuDomainPrimeVirtioDeviceAddresses(def, VIR_DOMAIN_DEVICE_ADDRESS_TYPE_PCI); -- 2.20.1
The rules are the same for all virt guests, regardless of the architecture. Signed-off-by: Andrea Bolognani <abologna@redhat.com> --- src/qemu/qemu_domain_address.c | 38 ++++++++-------------------------- 1 file changed, 9 insertions(+), 29 deletions(-) diff --git a/src/qemu/qemu_domain_address.c b/src/qemu/qemu_domain_address.c index 9592dbfa60..2ec21e65ac 100644 --- a/src/qemu/qemu_domain_address.c +++ b/src/qemu/qemu_domain_address.c @@ -460,19 +460,23 @@ qemuDomainHasVirtioMMIODevices(virDomainDefPtr def) static void -qemuDomainAssignARMVirtioMMIOAddresses(virDomainDefPtr def, - virQEMUCapsPtr qemuCaps) +qemuDomainAssignVirtioMMIOAddresses(virDomainDefPtr def, + virQEMUCapsPtr qemuCaps) { if (def->os.arch != VIR_ARCH_ARMV6L && def->os.arch != VIR_ARCH_ARMV7L && - def->os.arch != VIR_ARCH_AARCH64) + def->os.arch != VIR_ARCH_AARCH64 && + !ARCH_IS_RISCV(def->os.arch)) { return; + } if (!(STRPREFIX(def->os.machine, "vexpress-") || - qemuDomainIsARMVirt(def))) + qemuDomainIsARMVirt(def) || + qemuDomainIsRISCVVirt(def))) { return; + } - /* We use virtio-mmio by default on mach-virt guests only if they already + /* We use virtio-mmio by default on virt guests only if they already * have at least one virtio-mmio device: in all other cases, assuming * the QEMU binary supports all necessary capabilities (PCIe Root plus * some kind of PCIe Root Port), we prefer virtio-pci */ @@ -489,30 +493,6 @@ qemuDomainAssignARMVirtioMMIOAddresses(virDomainDefPtr def, } -static void -qemuDomainAssignRISCVVirtioMMIOAddresses(virDomainDefPtr def, - virQEMUCapsPtr qemuCaps) -{ - if (!qemuDomainIsRISCVVirt(def)) - return; - - if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_DEVICE_VIRTIO_MMIO)) { - qemuDomainPrimeVirtioDeviceAddresses(def, - VIR_DOMAIN_DEVICE_ADDRESS_TYPE_VIRTIO_MMIO); - } -} - - -static void -qemuDomainAssignVirtioMMIOAddresses(virDomainDefPtr def, - virQEMUCapsPtr qemuCaps) -{ - qemuDomainAssignARMVirtioMMIOAddresses(def, qemuCaps); - - qemuDomainAssignRISCVVirtioMMIOAddresses(def, qemuCaps); -} - - static bool qemuDomainDeviceSupportZPCI(virDomainDeviceDefPtr device) { -- 2.20.1
There are a few differences, but the one we're interested in is that PCIe Root Ports are finally available: as a result of this, our riscv64-virt-headless guest will switch from virtio-mmio to virtio-pci. Signed-off-by: Andrea Bolognani <abologna@redhat.com> --- This version of the patch is heavily snipped to comply with the libvir-list message size limitations. .../caps_4.0.0.riscv32.replies | 3864 ++++++++-------- .../caps_4.0.0.riscv32.xml | 19 +- .../caps_4.0.0.riscv64.replies | 3876 +++++++++-------- .../caps_4.0.0.riscv64.xml | 19 +- .../riscv64-virt-headless.riscv64-latest.args | 20 +- 5 files changed, 4180 insertions(+), 3618 deletions(-) diff --git a/tests/qemucapabilitiesdata/caps_4.0.0.riscv32.replies b/tests/qemucapabilitiesdata/caps_4.0.0.riscv32.replies index cb51093656..c7dac44289 100644 --- a/tests/qemucapabilitiesdata/caps_4.0.0.riscv32.replies +++ b/tests/qemucapabilitiesdata/caps_4.0.0.riscv32.replies @@ -17,11 +17,11 @@ { "return": { "qemu": { - "micro": 50, + "micro": 91, "minor": 1, "major": 3 }, - "package": "v3.1.0-1281-g006dce5f8f" + "package": "v4.0.0-rc1-33-ga04d91c701" }, "id": "libvirt-2" } [...] diff --git a/tests/qemucapabilitiesdata/caps_4.0.0.riscv32.xml b/tests/qemucapabilitiesdata/caps_4.0.0.riscv32.xml index 396e3019a0..6f81ff72c4 100644 --- a/tests/qemucapabilitiesdata/caps_4.0.0.riscv32.xml +++ b/tests/qemucapabilitiesdata/caps_4.0.0.riscv32.xml [...] @@ -160,15 +166,16 @@ <flag name='egl-headless.rendernode'/> <flag name='memory-backend-file.align'/> <flag name='memory-backend-file.pmem'/> + <flag name='scsi-disk.device_id'/> <flag name='virtio-pci-non-transitional'/> - <version>3001050</version> + <version>3001091</version> <kvmVersion>0</kvmVersion> <microcodeVersion>0</microcodeVersion> - <package>v3.1.0-1281-g006dce5f8f</package> + <package>v4.0.0-rc1-33-ga04d91c701</package> <arch>riscv32</arch> <machine name='spike_v1.10' maxCpus='1' default='yes'/> <machine name='virt' maxCpus='8'/> - <machine name='sifive_u' maxCpus='1'/> + <machine name='sifive_u' maxCpus='4'/> <machine name='sifive_e' maxCpus='1'/> <machine name='spike_v1.9.1' maxCpus='1'/> </qemuCaps> diff --git a/tests/qemucapabilitiesdata/caps_4.0.0.riscv64.replies b/tests/qemucapabilitiesdata/caps_4.0.0.riscv64.replies index beadeb2c02..6fda8ad2d2 100644 --- a/tests/qemucapabilitiesdata/caps_4.0.0.riscv64.replies +++ b/tests/qemucapabilitiesdata/caps_4.0.0.riscv64.replies @@ -17,11 +17,11 @@ { "return": { "qemu": { - "micro": 50, + "micro": 91, "minor": 1, "major": 3 }, - "package": "v3.1.0-1281-g006dce5f8f" + "package": "v4.0.0-rc1-33-ga04d91c701" }, "id": "libvirt-2" } [...] diff --git a/tests/qemucapabilitiesdata/caps_4.0.0.riscv64.xml b/tests/qemucapabilitiesdata/caps_4.0.0.riscv64.xml index addc6ae4d3..242a851653 100644 --- a/tests/qemucapabilitiesdata/caps_4.0.0.riscv64.xml +++ b/tests/qemucapabilitiesdata/caps_4.0.0.riscv64.xml [...] @@ -160,15 +166,16 @@ <flag name='egl-headless.rendernode'/> <flag name='memory-backend-file.align'/> <flag name='memory-backend-file.pmem'/> + <flag name='scsi-disk.device_id'/> <flag name='virtio-pci-non-transitional'/> - <version>3001050</version> + <version>3001091</version> <kvmVersion>0</kvmVersion> <microcodeVersion>0</microcodeVersion> - <package>v3.1.0-1281-g006dce5f8f</package> + <package>v4.0.0-rc1-33-ga04d91c701</package> <arch>riscv64</arch> <machine name='spike_v1.10' maxCpus='1' default='yes'/> <machine name='virt' maxCpus='8'/> - <machine name='sifive_u' maxCpus='1'/> + <machine name='sifive_u' maxCpus='4'/> <machine name='sifive_e' maxCpus='1'/> <machine name='spike_v1.9.1' maxCpus='1'/> </qemuCaps> diff --git a/tests/qemuxml2argvdata/riscv64-virt-headless.riscv64-latest.args b/tests/qemuxml2argvdata/riscv64-virt-headless.riscv64-latest.args index 7b03aef933..53e6e3bf11 100644 --- a/tests/qemuxml2argvdata/riscv64-virt-headless.riscv64-latest.args +++ b/tests/qemuxml2argvdata/riscv64-virt-headless.riscv64-latest.args @@ -25,21 +25,29 @@ file=/tmp/lib/domain--1-guest/master-key.aes \ -rtc base=utc \ -no-shutdown \ -boot strict=on \ --device virtio-serial-device,id=virtio-serial0 \ +-device pcie-root-port,port=0x8,chassis=1,id=pci.1,bus=pcie.0,multifunction=on,\ +addr=0x1 \ +-device pcie-root-port,port=0x9,chassis=2,id=pci.2,bus=pcie.0,addr=0x1.0x1 \ +-device pcie-root-port,port=0xa,chassis=3,id=pci.3,bus=pcie.0,addr=0x1.0x2 \ +-device pcie-root-port,port=0xb,chassis=4,id=pci.4,bus=pcie.0,addr=0x1.0x3 \ +-device pcie-root-port,port=0xc,chassis=5,id=pci.5,bus=pcie.0,addr=0x1.0x4 \ +-device pcie-root-port,port=0xd,chassis=6,id=pci.6,bus=pcie.0,addr=0x1.0x5 \ +-device virtio-serial-pci,id=virtio-serial0,bus=pci.2,addr=0x0 \ -drive file=/var/lib/libvirt/images/guest.qcow2,format=qcow2,if=none,\ id=drive-virtio-disk0 \ --device virtio-blk-device,scsi=off,drive=drive-virtio-disk0,id=virtio-disk0,\ -bootindex=1 \ +-device virtio-blk-pci,scsi=off,bus=pci.3,addr=0x0,drive=drive-virtio-disk0,\ +id=virtio-disk0,bootindex=1 \ -netdev user,id=hostnet0 \ --device virtio-net-device,netdev=hostnet0,id=net0,mac=52:54:00:09:a4:37 \ +-device virtio-net-pci,netdev=hostnet0,id=net0,mac=52:54:00:09:a4:37,bus=pci.1,\ +addr=0x0 \ -chardev pty,id=charserial0 \ -serial chardev:charserial0 \ -chardev socket,id=charchannel0,fd=1729,server,nowait \ -device virtserialport,bus=virtio-serial0.0,nr=1,chardev=charchannel0,\ id=channel0,name=org.qemu.guest_agent.0 \ --device virtio-balloon-device,id=balloon0 \ +-device virtio-balloon-pci,id=balloon0,bus=pci.4,addr=0x0 \ -object rng-random,id=objrng0,filename=/dev/random \ --device virtio-rng-device,rng=objrng0,id=rng0 \ +-device virtio-rng-pci,rng=objrng0,id=rng0,bus=pci.5,addr=0x0 \ -sandbox on,obsolete=deny,elevateprivileges=deny,spawn=deny,\ resourcecontrol=deny \ -msg timestamp=on -- 2.20.1
Signed-off-by: Andrea Bolognani <abologna@redhat.com> --- docs/news.xml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/docs/news.xml b/docs/news.xml index 2067830848..5715d0a510 100644 --- a/docs/news.xml +++ b/docs/news.xml @@ -148,6 +148,18 @@ tables are not required. </description> </change> + <change> + <summary> + qemu: Use PCI by default for RISC-V guests + </summary> + <description> + PCI support for RISC-V guests was already available in libvirt + 5.1.0, but it required the user to opt-in by manually assigning + PCI addresses: with this release, RISC-V guests will use PCI + automatically when running against a recent enough (4.0.0+) QEMU + release. + </description> + </change> </section> <section title="Bug fixes"> </section> -- 2.20.1
On 3/29/19 6:19 AM, Andrea Bolognani wrote:
Now that the patches necessary to enable pcie-root-port usage on RISC-V have been merged into QEMU, we can go ahead and start using PCI by default on such guests when appropriate.
The full series, with patch 3/4 in its unabridged form, can be obtained from
https://github.com/andreabolognani/libvirt/tree/riscv-pci-by-default
Andrea Bolognani (4): qemu: Require PCIe Root Port for PCI by default on ARM virt qemu: Unify address assignment for virt guests tests: Refresh capabilities for QEMU 4.0.0 on RISC-V news: Document PCI by default on RISC-V
docs/news.xml | 12 + src/qemu/qemu_domain_address.c | 45 +- .../caps_4.0.0.riscv32.replies | 3864 ++++++++-------- .../caps_4.0.0.riscv32.xml | 19 +- .../caps_4.0.0.riscv64.replies | 3876 +++++++++-------- .../caps_4.0.0.riscv64.xml | 19 +- .../riscv64-virt-headless.riscv64-latest.args | 20 +- 7 files changed, 4206 insertions(+), 3649 deletions(-)
The news changes need rebasing, but otherwise: Reviewed-by: Cole Robinson <crobinso@redhat.com> - Cole
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