The compiler is already able to eliminate the kvm_arch_get_supported_cpuid() calls in kvm_cpu_fill_host() and filter_features_for_kvm(), so we can eliminate the CONFIG_KVM #ifdefs there. Also, kvm_cpu_fill_host() and host_cpuid() don't need to check CONFIG_KVM, as they don't have any KVM-specific function calls. Tested to build successfully with CONFIG_KVM disabled, using the following CFLAGS combinations: "-DNDEBUG", "-DNDEBUG -O', "-DNDEBUG -O0", "-DNDEBUG -O1", "-DNDEBUG -O2". Signed-off-by: Eduardo Habkost <ehabkost(a)redhat.com&gt; --- Changes v2: * Check for __i386__ on host_cpuid() so the code compiles properly on non-x86 hosts. Suggested-by: Paolo Bonzini <pbonzini(a)redhat.com&gt; Change v3: * Don't add assert(kvm_enabled()) line, which is not necessary to help the compiler (and wouldn't help it if using -DNDEBUG, anyway). Reported-by: Richard Henderson <rth(a)twiddle.net&gt; * Commit message update --- target-i386/cpu.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 1f30efd..8425212 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -374,7 +374,6 @@ void disable_kvm_pv_eoi(void) void host_cpuid(uint32_t function, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { -#if defined(CONFIG_KVM) uint32_t vec[4]; #ifdef __x86_64__ @@ -382,7 +381,7 @@ void host_cpuid(uint32_t function, uint32_t count, : "=a"(vec[0]), "=b"(vec[1]), "=c"(vec[2]), "=d"(vec[3]) : "0"(function), "c"(count) : "cc"); -#else +#elif defined(__i386__) asm volatile("pusha \n\t" "cpuid \n\t" "mov %%eax, 0(%2) \n\t" @@ -392,6 +391,8 @@ void host_cpuid(uint32_t function, uint32_t count, "popa" : : "a"(function), "c"(count), "S"(vec) : "memory", "cc"); +#else + abort(); #endif if (eax) @@ -402,7 +403,6 @@ void host_cpuid(uint32_t function, uint32_t count, *ecx = vec[2]; if (edx) *edx = vec[3]; -#endif } #define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c))) @@ -1119,7 +1119,6 @@ void x86_cpu_compat_set_features(const char *cpu_model, FeatureWord w, } } -#ifdef CONFIG_KVM static int cpu_x86_fill_model_id(char *str) { uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; @@ -1134,7 +1133,6 @@ static int cpu_x86_fill_model_id(char *str) } return 0; } -#endif /* Fill a x86_def_t struct with information about the host CPU, and * the CPU features supported by the host hardware + host kernel @@ -1143,7 +1141,6 @@ static int cpu_x86_fill_model_id(char *str) */ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def) { -#ifdef CONFIG_KVM KVMState *s = kvm_state; uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; @@ -1173,8 +1170,6 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def) kvm_arch_get_supported_cpuid(s, wi->cpuid_eax, wi->cpuid_ecx, wi->cpuid_reg); } - -#endif /* CONFIG_KVM */ } static int unavailable_host_feature(FeatureWordInfo *f, uint32_t mask) @@ -1817,7 +1812,6 @@ CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) return cpu_list; } -#ifdef CONFIG_KVM static void filter_features_for_kvm(X86CPU *cpu) { CPUX86State *env = &cpu->env; @@ -1834,7 +1828,6 @@ static void filter_features_for_kvm(X86CPU *cpu) cpu->filtered_features[w] = requested_features & ~env->features[w]; } } -#endif static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp) { @@ -2545,9 +2538,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) "Host's CPU doesn't support requested features"); goto out; } -#ifdef CONFIG_KVM filter_features_for_kvm(cpu); -#endif } #ifndef CONFIG_USER_ONLY -- 1.8.4.2

As eventually the x86_def_t data is going to be provided by the CPU class, it's better to not touch it, and handle the special cases on the X86CPU object itself. Current behavior of the code should stay exactly the same. Signed-off-by: Eduardo Habkost <ehabkost(a)redhat.com&gt; --- target-i386/cpu.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 8425212..be54f84 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1841,11 +1841,6 @@ static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp) return; } - if (kvm_enabled()) { - def->features[FEAT_KVM] |= kvm_default_features; - } - def->features[FEAT_1_ECX] |= CPUID_EXT_HYPERVISOR; - object_property_set_str(OBJECT(cpu), def->vendor, "vendor", errp); object_property_set_int(OBJECT(cpu), def->level, "level", errp); object_property_set_int(OBJECT(cpu), def->family, "family", errp); @@ -1864,6 +1859,12 @@ static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp) cpu->cache_info_passthrough = def->cache_info_passthrough; object_property_set_str(OBJECT(cpu), def->model_id, "model-id", errp); + + /* Special cases not set in the x86_def_t structs: */ + if (kvm_enabled()) { + env->features[FEAT_KVM] |= kvm_default_features; + } + env->features[FEAT_1_ECX] |= CPUID_EXT_HYPERVISOR; } X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, -- 1.8.4.2

As we will not have a cpu_x86_find_by_name() function anymore, move the KVM default-vendor hack to instance_init. Unfortunately we can't move that code to class_init because it depends on KVM being initialized. Signed-off-by: Eduardo Habkost <ehabkost(a)redhat.com&gt; --- target-i386/cpu.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index be54f84..0e8812a 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1601,18 +1601,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def, def = &builtin_x86_defs[i]; if (strcmp(name, def->name) == 0) { memcpy(x86_cpu_def, def, sizeof(*def)); - /* sysenter isn't supported in compatibility mode on AMD, - * syscall isn't supported in compatibility mode on Intel. - * Normally we advertise the actual CPU vendor, but you can - * override this using the 'vendor' property if you want to use - * KVM's sysenter/syscall emulation in compatibility mode and - * when doing cross vendor migration - */ - if (kvm_enabled()) { - uint32_t ebx = 0, ecx = 0, edx = 0; - host_cpuid(0, 0, NULL, &ebx, &ecx, &edx); - x86_cpu_vendor_words2str(x86_cpu_def->vendor, ebx, edx, ecx); - } return 0; } } @@ -1841,7 +1829,6 @@ static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp) return; } - object_property_set_str(OBJECT(cpu), def->vendor, "vendor", errp); object_property_set_int(OBJECT(cpu), def->level, "level", errp); object_property_set_int(OBJECT(cpu), def->family, "family", errp); object_property_set_int(OBJECT(cpu), def->model, "model", errp); @@ -1865,6 +1852,25 @@ static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp) env->features[FEAT_KVM] |= kvm_default_features; } env->features[FEAT_1_ECX] |= CPUID_EXT_HYPERVISOR; + + /* sysenter isn't supported in compatibility mode on AMD, + * syscall isn't supported in compatibility mode on Intel. + * Normally we advertise the actual CPU vendor, but you can + * override this using the 'vendor' property if you want to use + * KVM's sysenter/syscall emulation in compatibility mode and + * when doing cross vendor migration + */ + const char *vendor = def->vendor; + char host_vendor[CPUID_VENDOR_SZ + 1]; + if (kvm_enabled()) { + uint32_t ebx = 0, ecx = 0, edx = 0; + host_cpuid(0, 0, NULL, &ebx, &ecx, &edx); + x86_cpu_vendor_words2str(host_vendor, ebx, edx, ecx); + vendor = host_vendor; + } + + object_property_set_str(OBJECT(cpu), vendor, "vendor", errp); + } X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, -- 1.8.4.2

There isn't any kind of "registration" involved in cpu_x86_register() anymore: it is simply looking up a CPU model name and loading the model definition data into the X86CPU object. Rename it to x86_cpu_load_def() to reflect what it does. Signed-off-by: Eduardo Habkost <ehabkost(a)redhat.com&gt; --- target-i386/cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 0e8812a..58b4c71 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1817,7 +1817,9 @@ static void filter_features_for_kvm(X86CPU *cpu) } } -static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp) +/* Load CPU definition for a given CPU model name + */ +static void x86_cpu_load_def(X86CPU *cpu, const char *name, Error **errp) { CPUX86State *env = &cpu->env; x86_def_t def1, *def = &def1; @@ -1900,7 +1902,7 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, object_unref(OBJECT(cpu)); #endif - cpu_x86_register(cpu, name, &error); + x86_cpu_load_def(cpu, name, &error); if (error) { goto out; } -- 1.8.4.2

Il 30/01/2014 20:48, Eduardo Habkost ha scritto: Reviewed-by: Paolo Bonzini <pbonzini(a)redhat.com&gt;

Register separate QOM classes for each x86 CPU model. This will allow management code to more easily probe what each CPU model provides, by simply creating objects using the appropriate class name, without having to restart QEMU. This also allows us to eliminate the qdev_prop_set_globals_for_type() hack to set CPU-model-specific global properties. Instead of creating separate class_init functions for each class, I just used class_dat to store a pointer to the X86CPUDefinition struct for each CPU model. This should make the patch shorter and easier to review. Later we can gradually convert each X86CPUDefinition field to lists of per-class property defaults. Signed-off-by: Eduardo Habkost <ehabkost(a)redhat.com&gt; --- This version is closer to the version sent by Andrea and then later resubmitted by Igor as "[RFC v5] target-i386: Slim conversion to X86CPU subclasses + KVM subclasses", as it doesn't create one new class_init function for each subclass. One main difference is that this version does not use KVM-specific subclasses, to keep things simpler. --- target-i386/cpu-qom.h | 13 ++ target-i386/cpu.c | 334 +++++++++++++++++++++++++++++++------------------- target-i386/cpu.h | 2 - 3 files changed, 222 insertions(+), 127 deletions(-) diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index 722f11a..60c5c32 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -37,6 +37,9 @@ #define X86_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(X86CPUClass, (obj), TYPE_X86_CPU) + +typedef struct X86CPUDefinition X86CPUDefinition; + /** * X86CPUClass: * @parent_realize: The parent class' realize handler. @@ -49,6 +52,16 @@ typedef struct X86CPUClass { CPUClass parent_class; /*< public >*/ + /* CPU model definition + * Should be eventually replaced by subclass-specific property defaults + */ + X86CPUDefinition *cpu_def; + /* CPU model requires KVM to be enabled */ + bool kvm_required; + /* Optional description of CPU model. + * If unavailable, cpu_def->model_id is used */ + const char *model_description; + DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } X86CPUClass; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 6659527..4d88dfd 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -484,7 +484,10 @@ static void add_flagname_to_bitmaps(const char *flagname, } } -typedef struct X86CPUDefinition { +/* CPU model definition data that was not converted to QOM per-subclass + * property defaults yet. + */ +struct X86CPUDefinition { const char *name; uint32_t level; uint32_t xlevel; @@ -497,7 +500,7 @@ typedef struct X86CPUDefinition { FeatureWordArray features; char model_id[48]; bool cache_info_passthrough; -} X86CPUDefinition; +}; #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE) #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \ @@ -547,8 +550,41 @@ typedef struct X86CPUDefinition { CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM, CPUID_7_0_EBX_RDSEED */ -/* built-in CPU model definitions +/* CPU class name definitions: */ + +#define X86_CPU_CLASS_SUFFIX "-" TYPE_X86_CPU +#define CPU_CLASS_NAME(name) (name X86_CPU_CLASS_SUFFIX) + + +static char *x86_cpu_class_get_model_name(X86CPUClass *cc) +{ + const char *class_name = object_class_get_name(OBJECT_CLASS(cc)); + if (g_str_has_suffix(class_name, X86_CPU_CLASS_SUFFIX)) { + return g_strndup(class_name, + strlen(class_name) - strlen(X86_CPU_CLASS_SUFFIX)); + } else { + return g_strdup(class_name); + } +} + +/* Return class name for a given CPU model name + * Caller is responsible for freeing the returned string. */ +static char *x86_cpu_class_name(const char *model_name) +{ + return g_strdup_printf(CPU_CLASS_NAME("%s"), model_name); +} + +/* Return X86CPUClass for a CPU model name */ +static X86CPUClass *x86_cpu_class_by_name(const char *name) +{ + X86CPUClass *cc; + char *class_name = x86_cpu_class_name(name); + cc = X86_CPU_CLASS(object_class_by_name(class_name)); + g_free(class_name); + return cc; +} + static X86CPUDefinition builtin_x86_defs[] = { { .name = "qemu64", @@ -1093,6 +1129,33 @@ static X86CPUDefinition builtin_x86_defs[] = { }, }; +static void x86_cpu_class_init_cpudef(ObjectClass *oc, void *data) +{ + X86CPUDefinition *cpudef = data; + X86CPUClass *xcc = X86_CPU_CLASS(oc); + xcc->cpu_def = cpudef; +} + +static void x86_register_cpudef_classes(void) +{ + int i; + for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { + X86CPUDefinition *def = &builtin_x86_defs[i]; + char *class_name = x86_cpu_class_name(def->name); + TypeInfo ti = { + .name = class_name, + .parent = TYPE_X86_CPU, + .instance_size = sizeof(X86CPU), + .abstract = false, + .class_size = sizeof(X86CPUClass), + .class_init = x86_cpu_class_init_cpudef, + .class_data = def, + }; + type_register(&ti); + g_free(class_name); + } +} + /** * x86_cpu_compat_set_features: * @cpu_model: CPU model name to be changed. If NULL, all CPU models are changed @@ -1134,44 +1197,74 @@ static int cpu_x86_fill_model_id(char *str) return 0; } -/* Fill a X86CPUDefinition struct with information about the host CPU, and - * the CPU features supported by the host hardware + host kernel +static X86CPUDefinition host_cpudef; + +/* class_init for the "host" CPU model * - * This function may be called only if KVM is enabled. + * This function may be called before KVM is initialized. */ -static void kvm_cpu_fill_host(X86CPUDefinition *x86_cpu_def) +static void x86_cpu_class_init_host(ObjectClass *oc, void *data) { - KVMState *s = kvm_state; + X86CPUClass *xcc = X86_CPU_CLASS(oc); uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; - assert(kvm_enabled()); + xcc->kvm_required = true; - x86_cpu_def->name = "host"; - x86_cpu_def->cache_info_passthrough = true; host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx); - x86_cpu_vendor_words2str(x86_cpu_def->vendor, ebx, edx, ecx); + x86_cpu_vendor_words2str(host_cpudef.vendor, ebx, edx, ecx); host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx); - x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); - x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); - x86_cpu_def->stepping = eax & 0x0F; + host_cpudef.family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); + host_cpudef.model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); + host_cpudef.stepping = eax & 0x0F; - x86_cpu_def->level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); - x86_cpu_def->xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); - x86_cpu_def->xlevel2 = - kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); + cpu_x86_fill_model_id(host_cpudef.model_id); - cpu_x86_fill_model_id(x86_cpu_def->model_id); + xcc->cpu_def = &host_cpudef; + xcc->model_description = + "KVM processor with all supported host features " + "(only available in KVM mode)"; + + host_cpudef.cache_info_passthrough = true; + + /* level, xlevel, xlevel2, and the feature words are initialized on + * instance_init, because they require KVM to be initialized. + */ +} + +static void x86_cpu_instance_init_host(Object *obj) +{ + X86CPU *cpu = X86_CPU(obj); + CPUX86State *env = &cpu->env; + KVMState *s = kvm_state; + + assert(kvm_enabled()); + + env->cpuid_level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); + env->cpuid_xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); + env->cpuid_xlevel2 = kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); FeatureWord w; for (w = 0; w < FEATURE_WORDS; w++) { FeatureWordInfo *wi = &feature_word_info[w]; - x86_cpu_def->features[w] = + env->features[w] = kvm_arch_get_supported_cpuid(s, wi->cpuid_eax, wi->cpuid_ecx, wi->cpuid_reg); } + object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort); } + +static const TypeInfo x86_cpu_host_type_info = { + .name = CPU_CLASS_NAME("host"), + .parent = TYPE_X86_CPU, + .instance_size = sizeof(X86CPU), + .instance_init = x86_cpu_instance_init_host, + .abstract = false, + .class_size = sizeof(X86CPUClass), + .class_init = x86_cpu_class_init_host, +}; + static int unavailable_host_feature(FeatureWordInfo *f, uint32_t mask) { int i; @@ -1582,32 +1675,6 @@ static PropertyInfo qdev_prop_spinlocks = { .set = x86_set_hv_spinlocks, }; -static int cpu_x86_find_by_name(X86CPU *cpu, X86CPUDefinition *x86_cpu_def, - const char *name) -{ - X86CPUDefinition *def; - int i; - - if (name == NULL) { - return -1; - } - if (kvm_enabled() && strcmp(name, "host") == 0) { - kvm_cpu_fill_host(x86_cpu_def); - object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort); - return 0; - } - - for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { - def = &builtin_x86_defs[i]; - if (strcmp(name, def->name) == 0) { - memcpy(x86_cpu_def, def, sizeof(*def)); - return 0; - } - } - - return -1; -} - /* Convert all '_' in a feature string option name to '-', to make feature * name conform to QOM property naming rule, which uses '-' instead of '_'. */ @@ -1750,23 +1817,63 @@ static void listflags(char *buf, int bufsize, uint32_t fbits, } } -/* generate CPU information. */ +/* Sort alphabetically by type name, listing kvm_required models last. */ +static gint x86_cpu_list_compare(gconstpointer a, gconstpointer b) +{ + ObjectClass *class_a = (ObjectClass *)a; + ObjectClass *class_b = (ObjectClass *)b; + X86CPUClass *cc_a = X86_CPU_CLASS(class_a); + X86CPUClass *cc_b = X86_CPU_CLASS(class_b); + const char *name_a, *name_b; + + if (cc_a->kvm_required != cc_b->kvm_required) { + /* kvm_required items go last */ + return cc_a->kvm_required ? 1 : -1; + } else { + name_a = object_class_get_name(class_a); + name_b = object_class_get_name(class_b); + return strcmp(name_a, name_b); + } +} + +static GSList *get_sorted_cpu_model_list(void) +{ + GSList *list = object_class_get_list(TYPE_X86_CPU, false); + list = g_slist_sort(list, x86_cpu_list_compare); + return list; +} + +static void x86_cpu_list_entry(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + X86CPUClass *cc = X86_CPU_CLASS(oc); + CPUListState *s = user_data; + char *name = x86_cpu_class_get_model_name(cc); + const char *desc = cc->model_description; + if (!desc) { + desc = cc->cpu_def->model_id; + } + + (*s->cpu_fprintf)(s->file, "x86 %16s %-48s\n", + name, desc); + g_free(name); +} + +/* list available CPU models and flags */ void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf) { - X86CPUDefinition *def; - char buf[256]; int i; + CPUListState s = { + .file = f, + .cpu_fprintf = cpu_fprintf, + }; + GSList *list; + char buf[256]; - for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { - def = &builtin_x86_defs[i]; - snprintf(buf, sizeof(buf), "%s", def->name); - (*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id); - } -#ifdef CONFIG_KVM - (*cpu_fprintf)(f, "x86 %16s %-48s\n", "host", - "KVM processor with all supported host features " - "(only available in KVM mode)"); -#endif + (*cpu_fprintf)(f, "Available CPUs:\n"); + list = get_sorted_cpu_model_list(); + g_slist_foreach(list, x86_cpu_list_entry, &s); + g_slist_free(list); (*cpu_fprintf)(f, "\nRecognized CPUID flags:\n"); for (i = 0; i < ARRAY_SIZE(feature_word_info); i++) { @@ -1777,26 +1884,29 @@ void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf) } } -CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) +static void x86_cpu_definition_entry(gpointer data, gpointer user_data) { - CpuDefinitionInfoList *cpu_list = NULL; - X86CPUDefinition *def; - int i; - - for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { - CpuDefinitionInfoList *entry; - CpuDefinitionInfo *info; + ObjectClass *oc = data; + X86CPUClass *cc = X86_CPU_CLASS(oc); + CpuDefinitionInfoList **cpu_list = user_data; + CpuDefinitionInfoList *entry; + CpuDefinitionInfo *info; - def = &builtin_x86_defs[i]; - info = g_malloc0(sizeof(*info)); - info->name = g_strdup(def->name); + info = g_malloc0(sizeof(*info)); + info->name = x86_cpu_class_get_model_name(cc); - entry = g_malloc0(sizeof(*entry)); - entry->value = info; - entry->next = cpu_list; - cpu_list = entry; - } + entry = g_malloc0(sizeof(*entry)); + entry->value = info; + entry->next = *cpu_list; + *cpu_list = entry; +} +CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list = get_sorted_cpu_model_list(); + g_slist_foreach(list, x86_cpu_definition_entry, &cpu_list); + g_slist_free(list); return cpu_list; } @@ -1817,19 +1927,11 @@ static void filter_features_for_kvm(X86CPU *cpu) } } -/* Load CPU definition for a given CPU model name +/* Load data from X86CPUDefinition */ -static void x86_cpu_load_def(X86CPU *cpu, const char *name, Error **errp) +static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp) { CPUX86State *env = &cpu->env; - X86CPUDefinition def1, *def = &def1; - - memset(def, 0, sizeof(*def)); - - if (cpu_x86_find_by_name(cpu, def, name) < 0) { - error_setg(errp, "Unable to find CPU definition: %s", name); - return; - } object_property_set_int(OBJECT(cpu), def->level, "level", errp); object_property_set_int(OBJECT(cpu), def->family, "family", errp); @@ -1881,7 +1983,6 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, X86CPU *cpu = NULL; gchar **model_pieces; char *name, *features; - char *typename; Error *error = NULL; model_pieces = g_strsplit(cpu_model, ",", 2); @@ -1892,12 +1993,19 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, name = model_pieces[0]; features = model_pieces[1]; - cpu = X86_CPU(object_new(TYPE_X86_CPU)); - x86_cpu_load_def(cpu, name, &error); - if (error) { + X86CPUClass *cc = x86_cpu_class_by_name(name); + if (!cc) { + error_setg(&error, "Unable to find CPU definition: %s", name); + goto out; + } + + if (cc->kvm_required && !kvm_enabled()) { + error_setg(&error, "CPU model '%s' requires KVM", name); goto out; } + cpu = X86_CPU(object_new(object_class_get_name(OBJECT_CLASS(cc)))); + #ifndef CONFIG_USER_ONLY if (icc_bridge == NULL) { error_setg(&error, "Invalid icc-bridge value"); @@ -1907,14 +2015,6 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, object_unref(OBJECT(cpu)); #endif - /* Emulate per-model subclasses for global properties */ - typename = g_strdup_printf("%s-" TYPE_X86_CPU, name); - qdev_prop_set_globals_for_type(DEVICE(cpu), typename, &error); - g_free(typename); - if (error) { - goto out; - } - cpu_x86_parse_featurestr(cpu, features, &error); if (error) { goto out; @@ -1923,8 +2023,10 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, out: if (error != NULL) { error_propagate(errp, error); - object_unref(OBJECT(cpu)); - cpu = NULL; + if (cpu) { + object_unref(OBJECT(cpu)); + cpu = NULL; + } } g_strfreev(model_pieces); return cpu; @@ -1963,30 +2065,6 @@ void cpu_clear_apic_feature(CPUX86State *env) #endif /* !CONFIG_USER_ONLY */ -/* Initialize list of CPU models, filling some non-static fields if necessary - */ -void x86_cpudef_setup(void) -{ - int i, j; - static const char *model_with_versions[] = { "qemu32", "qemu64", "athlon" }; - - for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) { - X86CPUDefinition *def = &builtin_x86_defs[i]; - - /* Look for specific "cpudef" models that */ - /* have the QEMU version in .model_id */ - for (j = 0; j < ARRAY_SIZE(model_with_versions); j++) { - if (strcmp(model_with_versions[j], def->name) == 0) { - pstrcpy(def->model_id, sizeof(def->model_id), - "QEMU Virtual CPU version "); - pstrcat(def->model_id, sizeof(def->model_id), - qemu_get_version()); - break; - } - } - } -} - static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { @@ -2615,6 +2693,7 @@ static void x86_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); X86CPU *cpu = X86_CPU(obj); + X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); CPUX86State *env = &cpu->env; static int inited; @@ -2666,6 +2745,9 @@ static void x86_cpu_initfn(Object *obj) cpu_set_debug_excp_handler(breakpoint_handler); #endif } + + X86CPUDefinition *def = xcc->cpu_def; + x86_cpu_load_def(cpu, def, &error_abort); } static int64_t x86_cpu_get_arch_id(CPUState *cs) @@ -2748,7 +2830,7 @@ static const TypeInfo x86_cpu_type_info = { .parent = TYPE_CPU, .instance_size = sizeof(X86CPU), .instance_init = x86_cpu_initfn, - .abstract = false, + .abstract = true, .class_size = sizeof(X86CPUClass), .class_init = x86_cpu_common_class_init, }; @@ -2756,6 +2838,8 @@ static const TypeInfo x86_cpu_type_info = { static void x86_cpu_register_types(void) { type_register_static(&x86_cpu_type_info); + x86_register_cpudef_classes(); + type_register_static(&x86_cpu_host_type_info); } type_init(x86_cpu_register_types) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 1b94f0f..d683941 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -944,7 +944,6 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, Error **errp); int cpu_x86_exec(CPUX86State *s); void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf); -void x86_cpudef_setup(void); int cpu_x86_support_mca_broadcast(CPUX86State *env); int cpu_get_pic_interrupt(CPUX86State *s); @@ -1137,7 +1136,6 @@ static inline CPUX86State *cpu_init(const char *cpu_model) #define cpu_gen_code cpu_x86_gen_code #define cpu_signal_handler cpu_x86_signal_handler #define cpu_list x86_cpu_list -#define cpudef_setup x86_cpudef_setup /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel -- 1.8.4.2

Register separate QOM classes for each x86 CPU model. This will allow management code to more easily probe what each CPU model provides, by simply creating objects using the appropriate class name, without having to restart QEMU. This also allows us to eliminate the qdev_prop_set_globals_for_type() hack to set CPU-model-specific global properties. Instead of creating separate class_init functions for each class, I just used class_data to store a pointer to the X86CPUDefinition struct for each CPU model. This should make the patch shorter and easier to review. Later we can gradually convert each X86CPUDefinition field to lists of per-class property defaults. Written based on the ideas from the patch "[RFC v5] target-i386: Slim conversion to X86CPU subclasses + KVM subclasses" written by Andreas Färber <afaerber(a)suse.de&gt;, Igor Mammedov <imammedo(a)redhat.com&gt;. The "host" CPU model is special, as the feature flags depend on KVM being initialized. So it has its own class_init and instance_init function, and feature flags are set on instance_init instead of class_init. Signed-off-by: Andreas Färber <afaerber(a)suse.de&gt; Signed-off-by: Igor Mammedov <imammedo(a)redhat.com&gt; Signed-off-by: Eduardo Habkost <ehabkost(a)redhat.com&gt; --- This patch is similar to the one sent by Andrea and then later resubmitted by Igor as "[RFC v5] target-i386: Slim conversion to X86CPU subclasses + KVM subclasses", as it doesn't create one new class_init function for each subclass. Main differences v5 -> v6 are: * Code was written from scratch (instead of using the previous patches as base) * I didn't mean to rewrite it entirely, but when doing additional simplification of the CPU init logic on other patches, I ended up rewriting it. * I chose to keep the Signed-off-by lines because I built upon Andreas's and Igor's ideas. Is that OK? * No KVM-specific subclasses, to keep things simpler. * No embedding of X86CPUDefinition (x86_def_t) inside the class struct, instead keeping a pointer to the existing X86CPUDefinition struct. * The "host" class is registered on cpu.c, but the CPUID data is filled on instance_init instead of class_init (because KVM has to be initialized already). * kvm_required field introduced to make sure the "host" class can't be used without KVM. Changes v6 -> v7: * Rebase Changes v7 -> v8: * Removed CPU listing code (will be sent as a separate patch) * Kept x86_cpudef_setup() (will be addressed in a separate patch) --- target-i386/cpu-qom.h | 13 ++++ target-i386/cpu.c | 197 ++++++++++++++++++++++++++++++++------------------ 2 files changed, 138 insertions(+), 72 deletions(-) diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index 722f11a..60c5c32 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -37,6 +37,9 @@ #define X86_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(X86CPUClass, (obj), TYPE_X86_CPU) + +typedef struct X86CPUDefinition X86CPUDefinition; + /** * X86CPUClass: * @parent_realize: The parent class' realize handler. @@ -49,6 +52,16 @@ typedef struct X86CPUClass { CPUClass parent_class; /*< public >*/ + /* CPU model definition + * Should be eventually replaced by subclass-specific property defaults + */ + X86CPUDefinition *cpu_def; + /* CPU model requires KVM to be enabled */ + bool kvm_required; + /* Optional description of CPU model. + * If unavailable, cpu_def->model_id is used */ + const char *model_description; + DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } X86CPUClass; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 6659527..bb72e5b 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -484,7 +484,10 @@ static void add_flagname_to_bitmaps(const char *flagname, } } -typedef struct X86CPUDefinition { +/* CPU model definition data that was not converted to QOM per-subclass + * property defaults yet. + */ +struct X86CPUDefinition { const char *name; uint32_t level; uint32_t xlevel; @@ -497,7 +500,7 @@ typedef struct X86CPUDefinition { FeatureWordArray features; char model_id[48]; bool cache_info_passthrough; -} X86CPUDefinition; +}; #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE) #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \ @@ -547,8 +550,29 @@ typedef struct X86CPUDefinition { CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM, CPUID_7_0_EBX_RDSEED */ -/* built-in CPU model definitions +/* CPU class name definitions: */ + +#define X86_CPU_CLASS_SUFFIX "-" TYPE_X86_CPU +#define CPU_CLASS_NAME(name) (name X86_CPU_CLASS_SUFFIX) + +/* Return class name for a given CPU model name + * Caller is responsible for freeing the returned string. */ +static char *x86_cpu_class_name(const char *model_name) +{ + return g_strdup_printf(CPU_CLASS_NAME("%s"), model_name); +} + +/* Return X86CPUClass for a CPU model name */ +static X86CPUClass *x86_cpu_class_by_name(const char *name) +{ + X86CPUClass *cc; + char *class_name = x86_cpu_class_name(name); + cc = X86_CPU_CLASS(object_class_by_name(class_name)); + g_free(class_name); + return cc; +} + static X86CPUDefinition builtin_x86_defs[] = { { .name = "qemu64", @@ -1093,6 +1117,33 @@ static X86CPUDefinition builtin_x86_defs[] = { }, }; +static void x86_cpu_class_init_cpudef(ObjectClass *oc, void *data) +{ + X86CPUDefinition *cpudef = data; + X86CPUClass *xcc = X86_CPU_CLASS(oc); + xcc->cpu_def = cpudef; +} + +static void x86_register_cpudef_classes(void) +{ + int i; + for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { + X86CPUDefinition *def = &builtin_x86_defs[i]; + char *class_name = x86_cpu_class_name(def->name); + TypeInfo ti = { + .name = class_name, + .parent = TYPE_X86_CPU, + .instance_size = sizeof(X86CPU), + .abstract = false, + .class_size = sizeof(X86CPUClass), + .class_init = x86_cpu_class_init_cpudef, + .class_data = def, + }; + type_register(&ti); + g_free(class_name); + } +} + /** * x86_cpu_compat_set_features: * @cpu_model: CPU model name to be changed. If NULL, all CPU models are changed @@ -1134,44 +1185,74 @@ static int cpu_x86_fill_model_id(char *str) return 0; } -/* Fill a X86CPUDefinition struct with information about the host CPU, and - * the CPU features supported by the host hardware + host kernel +static X86CPUDefinition host_cpudef; + +/* class_init for the "host" CPU model * - * This function may be called only if KVM is enabled. + * This function may be called before KVM is initialized. */ -static void kvm_cpu_fill_host(X86CPUDefinition *x86_cpu_def) +static void x86_cpu_class_init_host(ObjectClass *oc, void *data) { - KVMState *s = kvm_state; + X86CPUClass *xcc = X86_CPU_CLASS(oc); uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; - assert(kvm_enabled()); + xcc->kvm_required = true; - x86_cpu_def->name = "host"; - x86_cpu_def->cache_info_passthrough = true; host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx); - x86_cpu_vendor_words2str(x86_cpu_def->vendor, ebx, edx, ecx); + x86_cpu_vendor_words2str(host_cpudef.vendor, ebx, edx, ecx); host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx); - x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); - x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); - x86_cpu_def->stepping = eax & 0x0F; + host_cpudef.family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); + host_cpudef.model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); + host_cpudef.stepping = eax & 0x0F; + + cpu_x86_fill_model_id(host_cpudef.model_id); + + xcc->cpu_def = &host_cpudef; + xcc->model_description = + "KVM processor with all supported host features " + "(only available in KVM mode)"; + + host_cpudef.cache_info_passthrough = true; - x86_cpu_def->level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); - x86_cpu_def->xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); - x86_cpu_def->xlevel2 = - kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); + /* level, xlevel, xlevel2, and the feature words are initialized on + * instance_init, because they require KVM to be initialized. + */ +} + +static void x86_cpu_instance_init_host(Object *obj) +{ + X86CPU *cpu = X86_CPU(obj); + CPUX86State *env = &cpu->env; + KVMState *s = kvm_state; + + assert(kvm_enabled()); - cpu_x86_fill_model_id(x86_cpu_def->model_id); + env->cpuid_level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); + env->cpuid_xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); + env->cpuid_xlevel2 = kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); FeatureWord w; for (w = 0; w < FEATURE_WORDS; w++) { FeatureWordInfo *wi = &feature_word_info[w]; - x86_cpu_def->features[w] = + env->features[w] = kvm_arch_get_supported_cpuid(s, wi->cpuid_eax, wi->cpuid_ecx, wi->cpuid_reg); } + object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort); } + +static const TypeInfo x86_cpu_host_type_info = { + .name = CPU_CLASS_NAME("host"), + .parent = TYPE_X86_CPU, + .instance_size = sizeof(X86CPU), + .instance_init = x86_cpu_instance_init_host, + .abstract = false, + .class_size = sizeof(X86CPUClass), + .class_init = x86_cpu_class_init_host, +}; + static int unavailable_host_feature(FeatureWordInfo *f, uint32_t mask) { int i; @@ -1582,32 +1663,6 @@ static PropertyInfo qdev_prop_spinlocks = { .set = x86_set_hv_spinlocks, }; -static int cpu_x86_find_by_name(X86CPU *cpu, X86CPUDefinition *x86_cpu_def, - const char *name) -{ - X86CPUDefinition *def; - int i; - - if (name == NULL) { - return -1; - } - if (kvm_enabled() && strcmp(name, "host") == 0) { - kvm_cpu_fill_host(x86_cpu_def); - object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort); - return 0; - } - - for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { - def = &builtin_x86_defs[i]; - if (strcmp(name, def->name) == 0) { - memcpy(x86_cpu_def, def, sizeof(*def)); - return 0; - } - } - - return -1; -} - /* Convert all '_' in a feature string option name to '-', to make feature * name conform to QOM property naming rule, which uses '-' instead of '_'. */ @@ -1817,19 +1872,11 @@ static void filter_features_for_kvm(X86CPU *cpu) } } -/* Load CPU definition for a given CPU model name +/* Load data from X86CPUDefinition */ -static void x86_cpu_load_def(X86CPU *cpu, const char *name, Error **errp) +static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp) { CPUX86State *env = &cpu->env; - X86CPUDefinition def1, *def = &def1; - - memset(def, 0, sizeof(*def)); - - if (cpu_x86_find_by_name(cpu, def, name) < 0) { - error_setg(errp, "Unable to find CPU definition: %s", name); - return; - } object_property_set_int(OBJECT(cpu), def->level, "level", errp); object_property_set_int(OBJECT(cpu), def->family, "family", errp); @@ -1881,7 +1928,6 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, X86CPU *cpu = NULL; gchar **model_pieces; char *name, *features; - char *typename; Error *error = NULL; model_pieces = g_strsplit(cpu_model, ",", 2); @@ -1892,12 +1938,19 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, name = model_pieces[0]; features = model_pieces[1]; - cpu = X86_CPU(object_new(TYPE_X86_CPU)); - x86_cpu_load_def(cpu, name, &error); - if (error) { + X86CPUClass *cc = x86_cpu_class_by_name(name); + if (!cc) { + error_setg(&error, "Unable to find CPU definition: %s", name); + goto out; + } + + if (cc->kvm_required && !kvm_enabled()) { + error_setg(&error, "CPU model '%s' requires KVM", name); goto out; } + cpu = X86_CPU(object_new(object_class_get_name(OBJECT_CLASS(cc)))); + #ifndef CONFIG_USER_ONLY if (icc_bridge == NULL) { error_setg(&error, "Invalid icc-bridge value"); @@ -1907,14 +1960,6 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, object_unref(OBJECT(cpu)); #endif - /* Emulate per-model subclasses for global properties */ - typename = g_strdup_printf("%s-" TYPE_X86_CPU, name); - qdev_prop_set_globals_for_type(DEVICE(cpu), typename, &error); - g_free(typename); - if (error) { - goto out; - } - cpu_x86_parse_featurestr(cpu, features, &error); if (error) { goto out; @@ -1923,8 +1968,10 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, out: if (error != NULL) { error_propagate(errp, error); - object_unref(OBJECT(cpu)); - cpu = NULL; + if (cpu) { + object_unref(OBJECT(cpu)); + cpu = NULL; + } } g_strfreev(model_pieces); return cpu; @@ -2615,6 +2662,7 @@ static void x86_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); X86CPU *cpu = X86_CPU(obj); + X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); CPUX86State *env = &cpu->env; static int inited; @@ -2666,6 +2714,9 @@ static void x86_cpu_initfn(Object *obj) cpu_set_debug_excp_handler(breakpoint_handler); #endif } + + X86CPUDefinition *def = xcc->cpu_def; + x86_cpu_load_def(cpu, def, &error_abort); } static int64_t x86_cpu_get_arch_id(CPUState *cs) @@ -2748,7 +2799,7 @@ static const TypeInfo x86_cpu_type_info = { .parent = TYPE_CPU, .instance_size = sizeof(X86CPU), .instance_init = x86_cpu_initfn, - .abstract = false, + .abstract = true, .class_size = sizeof(X86CPUClass), .class_init = x86_cpu_common_class_init, }; @@ -2756,6 +2807,8 @@ static const TypeInfo x86_cpu_type_info = { static void x86_cpu_register_types(void) { type_register_static(&x86_cpu_type_info); + x86_register_cpudef_classes(); + type_register_static(&x86_cpu_host_type_info); } type_init(x86_cpu_register_types) -- 1.8.4.2 -- Eduardo

On Mon, Feb 10, 2014 at 01:23:37AM +0100, Andreas Färber wrote: [...] I was not aware of DeviceClass::desc. We can use it instead. Do you prefer a respin, or an additional patch? -- Eduardo

Register separate QOM classes for each x86 CPU model. This will allow management code to more easily probe what each CPU model provides, by simply creating objects using the appropriate class name, without having to restart QEMU. This also allows us to eliminate the qdev_prop_set_globals_for_type() hack to set CPU-model-specific global properties. Instead of creating separate class_init functions for each class, I just used class_data to store a pointer to the X86CPUDefinition struct for each CPU model. This should make the patch shorter and easier to review. Later we can gradually convert each X86CPUDefinition field to lists of per-class property defaults. Written based on the ideas from the patch "[RFC v5] target-i386: Slim conversion to X86CPU subclasses + KVM subclasses" written by Andreas Färber <afaerber(a)suse.de&gt;, Igor Mammedov <imammedo(a)redhat.com&gt;. The "host" CPU model is special, as the feature flags depend on KVM being initialized. So it has its own class_init and instance_init function, and feature flags are set on instance_init instead of class_init. Signed-off-by: Andreas Färber <afaerber(a)suse.de&gt; Signed-off-by: Igor Mammedov <imammedo(a)redhat.com&gt; Signed-off-by: Eduardo Habkost <ehabkost(a)redhat.com&gt; --- This patch is similar to the one sent by Andrea and then later resubmitted by Igor as "[RFC v5] target-i386: Slim conversion to X86CPU subclasses + KVM subclasses", as it doesn't create one new class_init function for each subclass. Main differences v5 -> v6 are: * Code was written from scratch (instead of using the previous patches as base) * I didn't mean to rewrite it entirely, but when doing additional simplification of the CPU init logic on other patches, I ended up rewriting it. * I chose to keep the Signed-off-by lines because I built upon Andreas's and Igor's ideas. Is that OK? * No KVM-specific subclasses, to keep things simpler. * No embedding of X86CPUDefinition (x86_def_t) inside the class struct, instead keeping a pointer to the existing X86CPUDefinition struct. * The "host" class is registered on cpu.c, but the CPUID data is filled on instance_init instead of class_init (because KVM has to be initialized already). * kvm_required field introduced to make sure the "host" class can't be used without KVM. Changes v6 -> v7: * Rebase Changes v7 -> v8: * Removed CPU listing code (will be sent as a separate patch) * Kept x86_cpudef_setup() (will be addressed in a separate patch) Changes v8 -> v9: * Remove model_desc field from X86CPUClass (it is not necessary yet) --- target-i386/cpu-qom.h | 10 +++ target-i386/cpu.c | 193 +++++++++++++++++++++++++++++++------------------- 2 files changed, 131 insertions(+), 72 deletions(-) diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index 722f11a..00ad5a4 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -37,6 +37,9 @@ #define X86_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(X86CPUClass, (obj), TYPE_X86_CPU) + +typedef struct X86CPUDefinition X86CPUDefinition; + /** * X86CPUClass: * @parent_realize: The parent class' realize handler. @@ -49,6 +52,13 @@ typedef struct X86CPUClass { CPUClass parent_class; /*< public >*/ + /* CPU model definition + * Should be eventually replaced by subclass-specific property defaults + */ + X86CPUDefinition *cpu_def; + /* CPU model requires KVM to be enabled */ + bool kvm_required; + DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } X86CPUClass; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 5a530b5..0b6be20 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -484,7 +484,10 @@ static void add_flagname_to_bitmaps(const char *flagname, } } -typedef struct X86CPUDefinition { +/* CPU model definition data that was not converted to QOM per-subclass + * property defaults yet. + */ +struct X86CPUDefinition { const char *name; uint32_t level; uint32_t xlevel; @@ -497,7 +500,7 @@ typedef struct X86CPUDefinition { FeatureWordArray features; char model_id[48]; bool cache_info_passthrough; -} X86CPUDefinition; +}; #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE) #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \ @@ -547,8 +550,29 @@ typedef struct X86CPUDefinition { CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM, CPUID_7_0_EBX_RDSEED */ -/* built-in CPU model definitions +/* CPU class name definitions: */ + +#define X86_CPU_CLASS_SUFFIX "-" TYPE_X86_CPU +#define CPU_CLASS_NAME(name) (name X86_CPU_CLASS_SUFFIX) + +/* Return class name for a given CPU model name + * Caller is responsible for freeing the returned string. */ +static char *x86_cpu_class_name(const char *model_name) +{ + return g_strdup_printf(CPU_CLASS_NAME("%s"), model_name); +} + +/* Return X86CPUClass for a CPU model name */ +static X86CPUClass *x86_cpu_class_by_name(const char *name) +{ + X86CPUClass *cc; + char *class_name = x86_cpu_class_name(name); + cc = X86_CPU_CLASS(object_class_by_name(class_name)); + g_free(class_name); + return cc; +} + static X86CPUDefinition builtin_x86_defs[] = { { .name = "qemu64", @@ -1093,6 +1117,33 @@ static X86CPUDefinition builtin_x86_defs[] = { }, }; +static void x86_cpu_class_init_cpudef(ObjectClass *oc, void *data) +{ + X86CPUDefinition *cpudef = data; + X86CPUClass *xcc = X86_CPU_CLASS(oc); + xcc->cpu_def = cpudef; +} + +static void x86_register_cpudef_classes(void) +{ + int i; + for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { + X86CPUDefinition *def = &builtin_x86_defs[i]; + char *class_name = x86_cpu_class_name(def->name); + TypeInfo ti = { + .name = class_name, + .parent = TYPE_X86_CPU, + .instance_size = sizeof(X86CPU), + .abstract = false, + .class_size = sizeof(X86CPUClass), + .class_init = x86_cpu_class_init_cpudef, + .class_data = def, + }; + type_register(&ti); + g_free(class_name); + } +} + /** * x86_cpu_compat_set_features: * @cpu_model: CPU model name to be changed. If NULL, all CPU models are changed @@ -1134,44 +1185,70 @@ static int cpu_x86_fill_model_id(char *str) return 0; } -/* Fill a X86CPUDefinition struct with information about the host CPU, and - * the CPU features supported by the host hardware + host kernel +static X86CPUDefinition host_cpudef; + +/* class_init for the "host" CPU model * - * This function may be called only if KVM is enabled. + * This function may be called before KVM is initialized. */ -static void kvm_cpu_fill_host(X86CPUDefinition *x86_cpu_def) +static void x86_cpu_class_init_host(ObjectClass *oc, void *data) { - KVMState *s = kvm_state; + X86CPUClass *xcc = X86_CPU_CLASS(oc); uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; - assert(kvm_enabled()); + xcc->kvm_required = true; - x86_cpu_def->name = "host"; - x86_cpu_def->cache_info_passthrough = true; host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx); - x86_cpu_vendor_words2str(x86_cpu_def->vendor, ebx, edx, ecx); + x86_cpu_vendor_words2str(host_cpudef.vendor, ebx, edx, ecx); host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx); - x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); - x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); - x86_cpu_def->stepping = eax & 0x0F; + host_cpudef.family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); + host_cpudef.model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); + host_cpudef.stepping = eax & 0x0F; + + cpu_x86_fill_model_id(host_cpudef.model_id); - x86_cpu_def->level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); - x86_cpu_def->xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); - x86_cpu_def->xlevel2 = - kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); + xcc->cpu_def = &host_cpudef; + host_cpudef.cache_info_passthrough = true; - cpu_x86_fill_model_id(x86_cpu_def->model_id); + /* level, xlevel, xlevel2, and the feature words are initialized on + * instance_init, because they require KVM to be initialized. + */ +} + +static void x86_cpu_instance_init_host(Object *obj) +{ + X86CPU *cpu = X86_CPU(obj); + CPUX86State *env = &cpu->env; + KVMState *s = kvm_state; + + assert(kvm_enabled()); + + env->cpuid_level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); + env->cpuid_xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); + env->cpuid_xlevel2 = kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); FeatureWord w; for (w = 0; w < FEATURE_WORDS; w++) { FeatureWordInfo *wi = &feature_word_info[w]; - x86_cpu_def->features[w] = + env->features[w] = kvm_arch_get_supported_cpuid(s, wi->cpuid_eax, wi->cpuid_ecx, wi->cpuid_reg); } + object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort); } + +static const TypeInfo x86_cpu_host_type_info = { + .name = CPU_CLASS_NAME("host"), + .parent = TYPE_X86_CPU, + .instance_size = sizeof(X86CPU), + .instance_init = x86_cpu_instance_init_host, + .abstract = false, + .class_size = sizeof(X86CPUClass), + .class_init = x86_cpu_class_init_host, +}; + static int unavailable_host_feature(FeatureWordInfo *f, uint32_t mask) { int i; @@ -1582,32 +1659,6 @@ static PropertyInfo qdev_prop_spinlocks = { .set = x86_set_hv_spinlocks, }; -static int cpu_x86_find_by_name(X86CPU *cpu, X86CPUDefinition *x86_cpu_def, - const char *name) -{ - X86CPUDefinition *def; - int i; - - if (name == NULL) { - return -1; - } - if (kvm_enabled() && strcmp(name, "host") == 0) { - kvm_cpu_fill_host(x86_cpu_def); - object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort); - return 0; - } - - for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { - def = &builtin_x86_defs[i]; - if (strcmp(name, def->name) == 0) { - memcpy(x86_cpu_def, def, sizeof(*def)); - return 0; - } - } - - return -1; -} - /* Convert all '_' in a feature string option name to '-', to make feature * name conform to QOM property naming rule, which uses '-' instead of '_'. */ @@ -1817,19 +1868,11 @@ static void filter_features_for_kvm(X86CPU *cpu) } } -/* Load CPU definition for a given CPU model name +/* Load data from X86CPUDefinition */ -static void x86_cpu_load_def(X86CPU *cpu, const char *name, Error **errp) +static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp) { CPUX86State *env = &cpu->env; - X86CPUDefinition def1, *def = &def1; - - memset(def, 0, sizeof(*def)); - - if (cpu_x86_find_by_name(cpu, def, name) < 0) { - error_setg(errp, "Unable to find CPU definition: %s", name); - return; - } object_property_set_int(OBJECT(cpu), def->level, "level", errp); object_property_set_int(OBJECT(cpu), def->family, "family", errp); @@ -1881,7 +1924,6 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, X86CPU *cpu = NULL; gchar **model_pieces; char *name, *features; - char *typename; Error *error = NULL; model_pieces = g_strsplit(cpu_model, ",", 2); @@ -1892,12 +1934,19 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, name = model_pieces[0]; features = model_pieces[1]; - cpu = X86_CPU(object_new(TYPE_X86_CPU)); - x86_cpu_load_def(cpu, name, &error); - if (error) { + X86CPUClass *cc = x86_cpu_class_by_name(name); + if (!cc) { + error_setg(&error, "Unable to find CPU definition: %s", name); + goto out; + } + + if (cc->kvm_required && !kvm_enabled()) { + error_setg(&error, "CPU model '%s' requires KVM", name); goto out; } + cpu = X86_CPU(object_new(object_class_get_name(OBJECT_CLASS(cc)))); + #ifndef CONFIG_USER_ONLY if (icc_bridge == NULL) { error_setg(&error, "Invalid icc-bridge value"); @@ -1907,14 +1956,6 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, object_unref(OBJECT(cpu)); #endif - /* Emulate per-model subclasses for global properties */ - typename = g_strdup_printf("%s-" TYPE_X86_CPU, name); - qdev_prop_set_globals_for_type(DEVICE(cpu), typename, &error); - g_free(typename); - if (error) { - goto out; - } - cpu_x86_parse_featurestr(cpu, features, &error); if (error) { goto out; @@ -1923,8 +1964,10 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, out: if (error != NULL) { error_propagate(errp, error); - object_unref(OBJECT(cpu)); - cpu = NULL; + if (cpu) { + object_unref(OBJECT(cpu)); + cpu = NULL; + } } g_strfreev(model_pieces); return cpu; @@ -2615,6 +2658,7 @@ static void x86_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); X86CPU *cpu = X86_CPU(obj); + X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); CPUX86State *env = &cpu->env; static int inited; @@ -2666,6 +2710,9 @@ static void x86_cpu_initfn(Object *obj) cpu_set_debug_excp_handler(breakpoint_handler); #endif } + + X86CPUDefinition *def = xcc->cpu_def; + x86_cpu_load_def(cpu, def, &error_abort); } static int64_t x86_cpu_get_arch_id(CPUState *cs) @@ -2763,7 +2810,7 @@ static const TypeInfo x86_cpu_type_info = { .parent = TYPE_CPU, .instance_size = sizeof(X86CPU), .instance_init = x86_cpu_initfn, - .abstract = false, + .abstract = true, .class_size = sizeof(X86CPUClass), .class_init = x86_cpu_common_class_init, }; @@ -2771,6 +2818,8 @@ static const TypeInfo x86_cpu_type_info = { static void x86_cpu_register_types(void) { type_register_static(&x86_cpu_type_info); + x86_register_cpudef_classes(); + type_register_static(&x86_cpu_host_type_info); } type_init(x86_cpu_register_types) -- 1.8.5.3