1:30 a.m.
IBM Power processors encode PVR as CPU family in high order 16 bits and a CPU
version in lower 16 bits. Since there is no significant change in behavior
between versions, there is no point adding every single CPU version in
cpu_map.xml. Qemu for ppc64 already have the necessary changes.
V2:
- Incorporate Martin comments from V1
- Rewrite the cpu_map.xml for IBM Power processors
Pradipta Kr. Banerjee (2):
Handle only high order 16 bits for PVR
Update cputest test cases for the updated IBM Power processor models
src/cpu/cpu_map.xml | 22 ++++++++--------------
src/cpu/cpu_powerpc.c | 7 ++++++-
tests/cputest.c | 4 ++--
tests/cputestdata/ppc64-baseline-1-result.xml | 2 +-
.../ppc64-baseline-incompatible-vendors.xml | 4 ++--
.../ppc64-baseline-no-vendor-result.xml | 2 +-
tests/cputestdata/ppc64-baseline-no-vendor.xml | 2 +-
tests/cputestdata/ppc64-exact.xml | 2 +-
tests/cputestdata/ppc64-guest-nofallback.xml | 2 +-
tests/cputestdata/ppc64-guest.xml | 2 +-
.../ppc64-host+guest,ppc_models-result.xml | 2 +-
...st-nofallback,ppc_models,POWER7_v2.1-result.xml | 5 -----
tests/cputestdata/ppc64-host.xml | 2 +-
tests/cputestdata/ppc64-strict.xml | 2 +-
.../qemuxml2argv-pseries-cpu-exact.args | 4 ++--
.../qemuxml2argv-pseries-cpu-exact.xml | 2 +-
16 files changed, 30 insertions(+), 36 deletions(-)
delete mode 100644
tests/cputestdata/ppc64-host+guest-nofallback,ppc_models,POWER7_v2.1-result.xml
--
1.9.3
1:30 a.m.
New subject: [libvirt] [PATCH V2 1/2] cpu: Handle only high order 16 bits of PVR for IBM Power processors
cpu: Handle only high order 16 bits of PVR for IBM Power processors
IBM Power processors encode PVR as CPU family in higher
16 bits and a CPU version in lower 16 bits. Since there is no significant
change in behavior between versions, there is no point to add every single
CPU version in cpu_map.xml
Signed-off-by: Pradipta Kr. Banerjee <bpradip(a)in.ibm.com>
---
src/cpu/cpu_map.xml | 22 ++++++++--------------
src/cpu/cpu_powerpc.c | 7 ++++++-
2 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 18c7b0d..f2f13fb 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -602,30 +602,24 @@
<vendor name='IBM'/>
<!-- IBM-based CPU models -->
- <model name='POWER7'>
+ <model name='power6'>
<vendor name='IBM'/>
- <pvr value='0x003f0200'/>
+ <pvr value='0x003e0000'/>
</model>
- <model name='POWER7_v2.1'>
+ <model name='power7'>
<vendor name='IBM'/>
- <pvr value='0x003f0201'/>
+ <pvr value='0x003f0000'/>
</model>
- <model name='POWER7_v2.3'>
+ <model name='power7+'>
<vendor name='IBM'/>
- <pvr value='0x003f0203'/>
+ <pvr value='0x004a0000'/>
</model>
- <model name='POWER7+_v2.1'>
+ <model name='power8'>
<vendor name='IBM'/>
- <pvr value='0x004a0201'/>
+ <pvr value='0x004b0000'/>
</model>
-
- <model name='POWER8_v1.0'>
- <vendor name='IBM'/>
- <pvr value='0x004b0100'/>
- </model>
-
</arch>
</cpus>
diff --git a/src/cpu/cpu_powerpc.c b/src/cpu/cpu_powerpc.c
index 67cb9ff..e705bcb 100644
--- a/src/cpu/cpu_powerpc.c
+++ b/src/cpu/cpu_powerpc.c
@@ -93,7 +93,12 @@ ppcModelFindPVR(const struct ppc_map *map,
model = map->models;
while (model != NULL) {
- if (model->data.pvr == pvr)
+ /*IBM PowerPC processors encode PVR as CPU family in higher 16 bits and
+ *a CPU version in lower 16 bits. Since there is no significant change
+ *in behavior between versions, there is no point to add every single CPU
+ *version in cpu_map.xml
+ */
+ if ((model->data.pvr & 0xFFFF0000) == (pvr & 0xFFFF0000))
return model;
model = model->next;
--
1.9.3
4:26 a.m.
New subject: [libvirt] [PATCH V2 1/2] cpu: Handle only high order 16 bits of PVR for IBM Power processors
On Sat, Sep 13, 2014 at 12:00:53PM +0530, Pradipta Kr. Banerjee wrote:
cpu: Handle only high order 16 bits of PVR for IBM Power processors
IBM Power processors encode PVR as CPU family in higher
16 bits and a CPU version in lower 16 bits. Since there is no significant
change in behavior between versions, there is no point to add every single
CPU version in cpu_map.xml
Signed-off-by: Pradipta Kr. Banerjee <bpradip(a)in.ibm.com>
---
src/cpu/cpu_map.xml | 22 ++++++++--------------
src/cpu/cpu_powerpc.c | 7 ++++++-
2 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 18c7b0d..f2f13fb 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -602,30 +602,24 @@
<vendor name='IBM'/>
<!-- IBM-based CPU models -->
- <model name='POWER7'>
+ <model name='power6'>
<vendor name='IBM'/>
- <pvr value='0x003f0200'/>
+ <pvr value='0x003e0000'/>
</model>
- <model name='POWER7_v2.1'>
+ <model name='power7'>
<vendor name='IBM'/>
- <pvr value='0x003f0201'/>
+ <pvr value='0x003f0000'/>
</model>
- <model name='POWER7_v2.3'>
+ <model name='power7+'>
<vendor name='IBM'/>
- <pvr value='0x003f0203'/>
+ <pvr value='0x004a0000'/>
</model>
- <model name='POWER7+_v2.1'>
+ <model name='power8'>
<vendor name='IBM'/>
- <pvr value='0x004a0201'/>
+ <pvr value='0x004b0000'/>
</model>
-
- <model name='POWER8_v1.0'>
- <vendor name='IBM'/>
- <pvr value='0x004b0100'/>
- </model>
Changing names of all the CPU models in this way is going to break every
existing XML config on PPC. So NACK to that.
Regards,
Daniel
--
|: http://berrange.com -o- http://www.flickr.com/photos/dberrange/ :|
|: http://libvirt.org -o- http://virt-manager.org :|
|: http://autobuild.org -o- http://search.cpan.org/~danberr/ :|
|: http://entangle-photo.org -o- http://live.gnome.org/gtk-vnc :|
7:30 a.m.
New subject: [libvirt] ***UNCHECKED*** Re: [PATCH V2 1/2] cpu: Handle only high order 16 bits of PVR for IBM Power processors
On 09/15/2014 02:56 PM, Daniel P. Berrange wrote:
On Sat, Sep 13, 2014 at 12:00:53PM +0530, Pradipta Kr. Banerjee
wrote:
> cpu: Handle only high order 16 bits of PVR for IBM Power processors
>
> IBM Power processors encode PVR as CPU family in higher
> 16 bits and a CPU version in lower 16 bits. Since there is no significant
> change in behavior between versions, there is no point to add every single
> CPU version in cpu_map.xml
>
> Signed-off-by: Pradipta Kr. Banerjee <bpradip(a)in.ibm.com>
> ---
> src/cpu/cpu_map.xml | 22 ++++++++--------------
> src/cpu/cpu_powerpc.c | 7 ++++++-
> 2 files changed, 14 insertions(+), 15 deletions(-)
>
> diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
> index 18c7b0d..f2f13fb 100644
> --- a/src/cpu/cpu_map.xml
> +++ b/src/cpu/cpu_map.xml
> @@ -602,30 +602,24 @@
> <vendor name='IBM'/>
>
> <!-- IBM-based CPU models -->
> - <model name='POWER7'>
> + <model name='power6'>
> <vendor name='IBM'/>
> - <pvr value='0x003f0200'/>
> + <pvr value='0x003e0000'/>
> </model>
>
> - <model name='POWER7_v2.1'>
> + <model name='power7'>
> <vendor name='IBM'/>
> - <pvr value='0x003f0201'/>
> + <pvr value='0x003f0000'/>
> </model>
>
> - <model name='POWER7_v2.3'>
> + <model name='power7+'>
> <vendor name='IBM'/>
> - <pvr value='0x003f0203'/>
> + <pvr value='0x004a0000'/>
> </model>
>
> - <model name='POWER7+_v2.1'>
> + <model name='power8'>
> <vendor name='IBM'/>
> - <pvr value='0x004a0201'/>
> + <pvr value='0x004b0000'/>
> </model>
> -
> - <model name='POWER8_v1.0'>
> - <vendor name='IBM'/>
> - <pvr value='0x004b0100'/>
> - </model>
Changing names of all the CPU models in this way is going to break every
existing XML config on PPC. So NACK to that.
Hi Dan,
One thing to note is that official KVM support on Power processor is from Power8
only. So possibility of breakage is very limited imo.
However I see your point. What is your advise? Should I retain all the existing
processor models in the cpu_map.xml ?
Regards,
Daniel
--
Regards,
Pradipta Kumar B(bpradip(a)in.ibm.com)
IBM Systems & Technology Labs,
India.
1:30 a.m.
New subject: [libvirt] [PATCH V2 2/2]cputest: Update cputest test cases for the updated IBM Power processor models
cputest: Update cputest test cases for the updated IBM Power processor models
Signed-off-by: Pradipta Kr. Banerjee <bpradip(a)in.ibm.com>
---
tests/cputest.c | 4 ++--
tests/cputestdata/ppc64-baseline-1-result.xml | 2 +-
tests/cputestdata/ppc64-baseline-incompatible-vendors.xml | 4 ++--
tests/cputestdata/ppc64-baseline-no-vendor-result.xml | 2 +-
tests/cputestdata/ppc64-baseline-no-vendor.xml | 2 +-
tests/cputestdata/ppc64-exact.xml | 2 +-
tests/cputestdata/ppc64-guest-nofallback.xml | 2 +-
tests/cputestdata/ppc64-guest.xml | 2 +-
tests/cputestdata/ppc64-host+guest,ppc_models-result.xml | 2 +-
.../ppc64-host+guest-nofallback,ppc_models,POWER7_v2.1-result.xml | 5 -----
tests/cputestdata/ppc64-host.xml | 2 +-
tests/cputestdata/ppc64-strict.xml | 2 +-
tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.args | 4 ++--
tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.xml | 2 +-
14 files changed, 16 insertions(+), 21 deletions(-)
diff --git a/tests/cputest.c b/tests/cputest.c
index a507576..e6e74a0 100644
--- a/tests/cputest.c
+++ b/tests/cputest.c
@@ -496,7 +496,7 @@ cpuTestRun(const char *name, const struct data *data)
static const char *model486[] = { "486" };
static const char *nomodel[] = { "nomodel" };
static const char *models[] = { "qemu64", "core2duo",
"Nehalem" };
-static const char *ppc_models[] = { "POWER7", "POWER7_v2.1",
"POWER8_v1.0"};
+static const char *ppc_models[] = { "power6", "power7"};
static int
mymain(void)
@@ -643,7 +643,7 @@ mymain(void)
models, "Penryn", -1);
DO_TEST_GUESTDATA("ppc64", "host", "guest", ppc_models,
NULL, 0);
- DO_TEST_GUESTDATA("ppc64", "host", "guest-nofallback",
ppc_models, "POWER7_v2.1", -1);
+ DO_TEST_GUESTDATA("ppc64", "host", "guest-nofallback",
ppc_models, "power7", -1);
return ret == 0 ? EXIT_SUCCESS : EXIT_FAILURE;
}
diff --git a/tests/cputestdata/ppc64-baseline-1-result.xml
b/tests/cputestdata/ppc64-baseline-1-result.xml
index cbdd9bc..a330ef6 100644
--- a/tests/cputestdata/ppc64-baseline-1-result.xml
+++ b/tests/cputestdata/ppc64-baseline-1-result.xml
@@ -1,3 +1,3 @@
<cpu mode='custom' match='exact'>
- <model fallback='allow'>POWER7+_v2.1</model>
+ <model fallback='allow'>power7</model>
</cpu>
diff --git a/tests/cputestdata/ppc64-baseline-incompatible-vendors.xml
b/tests/cputestdata/ppc64-baseline-incompatible-vendors.xml
index 97d3c9c..686f043 100644
--- a/tests/cputestdata/ppc64-baseline-incompatible-vendors.xml
+++ b/tests/cputestdata/ppc64-baseline-incompatible-vendors.xml
@@ -1,13 +1,13 @@
<cpuTest>
<cpu>
<arch>ppc64</arch>
- <model>POWER7+_v2.1</model>
+ <model>power6</model>
<vendor>Intel</vendor>
<topology sockets='2' cores='4' threads='1'/>
</cpu>
<cpu>
<arch>ppc64</arch>
- <model>POWER8_v1.0</model>
+ <model>power7</model>
<vendor>Intel</vendor>
<topology sockets='1' cores='1' threads='1'/>
</cpu>
diff --git a/tests/cputestdata/ppc64-baseline-no-vendor-result.xml
b/tests/cputestdata/ppc64-baseline-no-vendor-result.xml
index 36bae52..a330ef6 100644
--- a/tests/cputestdata/ppc64-baseline-no-vendor-result.xml
+++ b/tests/cputestdata/ppc64-baseline-no-vendor-result.xml
@@ -1,3 +1,3 @@
<cpu mode='custom' match='exact'>
- <model fallback='allow'>POWER7_v2.3</model>
+ <model fallback='allow'>power7</model>
</cpu>
diff --git a/tests/cputestdata/ppc64-baseline-no-vendor.xml
b/tests/cputestdata/ppc64-baseline-no-vendor.xml
index 5e69a62..6b88977 100644
--- a/tests/cputestdata/ppc64-baseline-no-vendor.xml
+++ b/tests/cputestdata/ppc64-baseline-no-vendor.xml
@@ -1,7 +1,7 @@
<cpuTest>
<cpu>
<arch>ppc64</arch>
- <model>POWER7_v2.3</model>
+ <model>power7</model>
<topology sockets='2' cores='4' threads='1'/>
</cpu>
</cpuTest>
diff --git a/tests/cputestdata/ppc64-exact.xml b/tests/cputestdata/ppc64-exact.xml
index c84f16a..76900e8 100644
--- a/tests/cputestdata/ppc64-exact.xml
+++ b/tests/cputestdata/ppc64-exact.xml
@@ -1,3 +1,3 @@
<cpu match='exact'>
- <model>POWER8_v1.0</model>
+ <model>power6</model>
</cpu>
diff --git a/tests/cputestdata/ppc64-guest-nofallback.xml
b/tests/cputestdata/ppc64-guest-nofallback.xml
index 42026b4..5539cfa 100644
--- a/tests/cputestdata/ppc64-guest-nofallback.xml
+++ b/tests/cputestdata/ppc64-guest-nofallback.xml
@@ -1,4 +1,4 @@
<cpu match='exact'>
- <model fallback='forbid'>POWER7_v2.1</model>
+ <model fallback='forbid'>power7</model>
<topology sockets='2' cores='4' threads='1'/>
</cpu>
diff --git a/tests/cputestdata/ppc64-guest.xml b/tests/cputestdata/ppc64-guest.xml
index ac81ec0..967ad5a 100644
--- a/tests/cputestdata/ppc64-guest.xml
+++ b/tests/cputestdata/ppc64-guest.xml
@@ -1,4 +1,4 @@
<cpu match='exact'>
- <model>POWER8_v1.0</model>
+ <model>power7</model>
<topology sockets='2' cores='4' threads='1'/>
</cpu>
diff --git a/tests/cputestdata/ppc64-host+guest,ppc_models-result.xml
b/tests/cputestdata/ppc64-host+guest,ppc_models-result.xml
index 0cb0830..42e7bae 100644
--- a/tests/cputestdata/ppc64-host+guest,ppc_models-result.xml
+++ b/tests/cputestdata/ppc64-host+guest,ppc_models-result.xml
@@ -1,5 +1,5 @@
<cpu mode='custom' match='exact'>
<arch>ppc64</arch>
- <model fallback='allow'>POWER8_v1.0</model>
+ <model fallback='allow'>power7</model>
<vendor>IBM</vendor>
</cpu>
diff --git
a/tests/cputestdata/ppc64-host+guest-nofallback,ppc_models,POWER7_v2.1-result.xml
b/tests/cputestdata/ppc64-host+guest-nofallback,ppc_models,POWER7_v2.1-result.xml
deleted file mode 100644
index 7e58361..0000000
--- a/tests/cputestdata/ppc64-host+guest-nofallback,ppc_models,POWER7_v2.1-result.xml
+++ /dev/null
@@ -1,5 +0,0 @@
-<cpu mode='custom' match='exact'>
- <arch>ppc64</arch>
- <model fallback='forbid'>POWER7_v2.1</model>
- <vendor>IBM</vendor>
-</cpu>
diff --git a/tests/cputestdata/ppc64-host.xml b/tests/cputestdata/ppc64-host.xml
index 39cb741..56d3d8f 100644
--- a/tests/cputestdata/ppc64-host.xml
+++ b/tests/cputestdata/ppc64-host.xml
@@ -1,6 +1,6 @@
<cpu>
<arch>ppc64</arch>
- <model>POWER7_v2.3</model>
+ <model>power7</model>
<vendor>IBM</vendor>
<topology sockets='1' cores='64' threads='1'/>
</cpu>
diff --git a/tests/cputestdata/ppc64-strict.xml b/tests/cputestdata/ppc64-strict.xml
index e91c6e7..a507e32 100644
--- a/tests/cputestdata/ppc64-strict.xml
+++ b/tests/cputestdata/ppc64-strict.xml
@@ -1,3 +1,3 @@
<cpu match='exact'>
- <model>POWER7_v2.3</model>
+ <model>power7</model>
</cpu>
diff --git a/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.args
b/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.args
index 1e09680..efa057f 100644
--- a/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.args
+++ b/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.args
@@ -1,6 +1,6 @@
LC_ALL=C PATH=/bin HOME=/home/test USER=test LOGNAME=test \
-/usr/bin/qemu-system-ppc64 -S -M pseries -cpu POWER7_v2.3 -m 512 -smp 1 -nographic \
--nodefconfig -nodefaults \
+/usr/bin/qemu-system-ppc64 -S -M pseries -cpu host,compat=power7 -m 512 \
+-smp 1 -nographic -nodefconfig -nodefaults \
-chardev socket,id=charmonitor,path=/tmp/test-monitor,server,nowait \
-mon chardev=charmonitor,id=monitor,mode=readline -no-acpi -boot c -usb \
-chardev pty,id=charserial0 \
diff --git a/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.xml
b/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.xml
index b54dae2..d196984 100644
--- a/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.xml
+++ b/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.xml
@@ -7,7 +7,7 @@
<type arch='ppc64' machine='pseries'>hvm</type>
</os>
<cpu match='exact'>
- <model>POWER7_v2.3</model>
+ <model>power7</model>
<vendor>IBM</vendor>
</cpu>
<clock offset='utc'/>
--
1.9.3
3721
days inactive
3723
days old
4 comments
3 participants
participants (3)
-
Daniel P. Berrange -
Pradipta Kr. Banerjee -
Pradipta Kumar Banerjee