This script is intended to help in synchronizing i386 QEMU cpu model definitions with libvirt. As the QEMU cpu model definitions are post processed by QEMU and not meant to be consumed by third parties directly, parsing this information is imperfect. Additionally, the libvirt models contain information that cannot be generated from the QEMU data, preventing fully automated usage. The output should nevertheless be helpful for a human in determining potentially interesting changes. Signed-off-by: Tim Wiederhake <twiederh@redhat.com> --- src/cpu_map/sync_qemu_i386.py | 361 ++++++++++++++++++++++++++++++++++ 1 file changed, 361 insertions(+) create mode 100755 src/cpu_map/sync_qemu_i386.py diff --git a/src/cpu_map/sync_qemu_i386.py b/src/cpu_map/sync_qemu_i386.py new file mode 100755 index 0000000000..c5c1e621a3 --- /dev/null +++ b/src/cpu_map/sync_qemu_i386.py @@ -0,0 +1,361 @@ +#!/usr/bin/env python3 + +import argparse +import copy +import json +import lark +import os +import re + + +T = { + # translating qemu -> libvirt cpu vendor names + "CPUID_VENDOR_AMD": "AMD", + "CPUID_VENDOR_INTEL": "Intel", + "CPUID_VENDOR_HYGON": "Hygon", + + # translating qemu -> libvirt cpu feature names + "CPUID_6_EAX_ARAT": "arat", + "CPUID_7_0_EBX_ADX": "adx", + "CPUID_7_0_EBX_AVX2": "avx2", + "CPUID_7_0_EBX_AVX512BW": "avx512bw", + "CPUID_7_0_EBX_AVX512CD": "avx512cd", + "CPUID_7_0_EBX_AVX512DQ": "avx512dq", + "CPUID_7_0_EBX_AVX512ER": "avx512er", + "CPUID_7_0_EBX_AVX512F": "avx512f", + "CPUID_7_0_EBX_AVX512PF": "avx512pf", + "CPUID_7_0_EBX_AVX512VL": "avx512vl", + "CPUID_7_0_EBX_BMI1": "bmi1", + "CPUID_7_0_EBX_BMI2": "bmi2", + "CPUID_7_0_EBX_CLFLUSHOPT": "clflushopt", + "CPUID_7_0_EBX_CLWB": "clwb", + "CPUID_7_0_EBX_ERMS": "erms", + "CPUID_7_0_EBX_FSGSBASE": "fsgsbase", + "CPUID_7_0_EBX_HLE": "hle", + "CPUID_7_0_EBX_INVPCID": "invpcid", + "CPUID_7_0_EBX_MPX": "mpx", + "CPUID_7_0_EBX_RDSEED": "rdseed", + "CPUID_7_0_EBX_RTM": "rtm", + "CPUID_7_0_EBX_SHA_NI": "sha-ni", + "CPUID_7_0_EBX_SMAP": "smap", + "CPUID_7_0_EBX_SMEP": "smep", + "CPUID_7_0_ECX_AVX512BITALG": "avx512bitalg", + "CPUID_7_0_ECX_AVX512_VBMI2": "avx512vbmi2", + "CPUID_7_0_ECX_AVX512_VBMI": "avx512vbmi", + "CPUID_7_0_ECX_AVX512VNNI": "avx512vnni", + "CPUID_7_0_ECX_AVX512_VPOPCNTDQ": "avx512-vpopcntdq", + "CPUID_7_0_ECX_CLDEMOTE": "cldemote", + "CPUID_7_0_ECX_GFNI": "gfni", + "CPUID_7_0_ECX_LA57": "la57", + "CPUID_7_0_ECX_MOVDIR64B": "movdir64b", + "CPUID_7_0_ECX_MOVDIRI": "movdiri", + "CPUID_7_0_ECX_PKU": "pku", + "CPUID_7_0_ECX_RDPID": "rdpid", + "CPUID_7_0_ECX_UMIP": "umip", + "CPUID_7_0_ECX_VAES": "vaes", + "CPUID_7_0_ECX_VPCLMULQDQ": "vpclmulqdq", + "CPUID_7_0_EDX_ARCH_CAPABILITIES": "arch-capabilities", + "CPUID_7_0_EDX_AVX512_4FMAPS": "avx512-4fmaps", + "CPUID_7_0_EDX_AVX512_4VNNIW": "avx512-4vnniw", + "CPUID_7_0_EDX_CORE_CAPABILITY": "core-capability", + "CPUID_7_0_EDX_SPEC_CTRL": "spec-ctrl", + "CPUID_7_0_EDX_SPEC_CTRL_SSBD": "ssbd", + "CPUID_7_0_EDX_STIBP": "stibp", + "CPUID_7_1_EAX_AVX512_BF16": "avx512-bf16", + "CPUID_8000_0008_EBX_CLZERO": "clzero", + "CPUID_8000_0008_EBX_IBPB": "ibpb", + "CPUID_8000_0008_EBX_STIBP": "amd-stibp", + "CPUID_8000_0008_EBX_WBNOINVD": "wbnoinvd", + "CPUID_8000_0008_EBX_XSAVEERPTR": "xsaveerptr", + "CPUID_ACPI": "acpi", + "CPUID_APIC": "apic", + "CPUID_CLFLUSH": "clflush", + "CPUID_CMOV": "cmov", + "CPUID_CX8": "cx8", + "CPUID_DE": "de", + "CPUID_EXT2_3DNOW": "3dnow", + "CPUID_EXT2_3DNOWEXT": "3dnowext", + "CPUID_EXT2_FFXSR": "fxsr_opt", + "CPUID_EXT2_LM": "lm", + "CPUID_EXT2_MMXEXT": "mmxext", + "CPUID_EXT2_NX": "nx", + "CPUID_EXT2_PDPE1GB": "pdpe1gb", + "CPUID_EXT2_RDTSCP": "rdtscp", + "CPUID_EXT2_SYSCALL": "syscall", + "CPUID_EXT3_3DNOWPREFETCH": "3dnowprefetch", + "CPUID_EXT3_ABM": "abm", + "CPUID_EXT3_CR8LEG": "cr8legacy", + "CPUID_EXT3_FMA4": "fma4", + "CPUID_EXT3_LAHF_LM": "lahf_lm", + "CPUID_EXT3_MISALIGNSSE": "misalignsse", + "CPUID_EXT3_OSVW": "osvw", + "CPUID_EXT3_PERFCORE": "perfctr_core", + "CPUID_EXT3_SSE4A": "sse4a", + "CPUID_EXT3_SVM": "svm", + "CPUID_EXT3_TBM": "tbm", + "CPUID_EXT3_XOP": "xop", + "CPUID_EXT_AES": "aes", + "CPUID_EXT_AVX": "avx", + "CPUID_EXT_CX16": "cx16", + "CPUID_EXT_F16C": "f16c", + "CPUID_EXT_FMA": "fma", + "CPUID_EXT_MOVBE": "movbe", + "CPUID_EXT_PCID": "pcid", + "CPUID_EXT_PCLMULQDQ": "pclmuldq", + "CPUID_EXT_POPCNT": "popcnt", + "CPUID_EXT_RDRAND": "rdrand", + "CPUID_EXT_SSE3": "pni", + "CPUID_EXT_SSE41": "sse4.1", + "CPUID_EXT_SSE42": "sse4.2", + "CPUID_EXT_SSSE3": "ssse3", + "CPUID_EXT_TSC_DEADLINE_TIMER": "tsc-deadline", + "CPUID_EXT_X2APIC": "x2apic", + "CPUID_EXT_XSAVE": "xsave", + "CPUID_FP87": "fpu", + "CPUID_FXSR": "fxsr", + "CPUID_MCA": "mca", + "CPUID_MCE": "mce", + "CPUID_MMX": "mmx", + "CPUID_MSR": "msr", + "CPUID_MTRR": "mtrr", + "CPUID_PAE": "pae", + "CPUID_PAT": "pat", + "CPUID_PGE": "pge", + "CPUID_PSE36": "pse36", + "CPUID_PSE": "pse", + "CPUID_SEP": "sep", + "CPUID_SSE2": "sse2", + "CPUID_SSE": "sse", + "CPUID_SS": "ss", + "CPUID_SVM_NPT": "npt", + "CPUID_SVM_NRIPSAVE": "nrip-save", + "CPUID_TSC": "tsc", + "CPUID_VME": "vme", + "CPUID_XSAVE_XGETBV1": "xgetbv1", + "CPUID_XSAVE_XSAVEC": "xsavec", + "CPUID_XSAVE_XSAVEOPT": "xsaveopt", + "CPUID_XSAVE_XSAVES": "xsaves", + "MSR_ARCH_CAP_IBRS_ALL": "ibrs-all", + "MSR_ARCH_CAP_MDS_NO": "mds-no", + "MSR_ARCH_CAP_PSCHANGE_MC_NO": "pschange-mc-no", + "MSR_ARCH_CAP_RDCL_NO": "rdctl-no", + "MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY": "skip-l1dfl-vmentry", + "MSR_ARCH_CAP_TAA_NO": "taa-no", + "MSR_CORE_CAP_SPLIT_LOCK_DETECT": "split-lock-detect", + + # always disabled features + "CPUID_EXT_MONITOR": None, + "0": None, + + # set to "no auto enable" by qemu + "CPUID_EXT3_TOPOEXT": None, + "MSR_VMX_BASIC_DUAL_MONITOR": None, +} + + +def readline_cont(f): + """Read one logical line from a file `f` i.e. continues lines that end in + a backslash.""" + + line = f.readline() + while line.endswith("\\\n"): + line = line[:-2] + " " + f.readline() + return line + + +def read_builtin_x86_defs(filename): + """Extract content between begin_mark and end_mark from file `filename` as + string, while expanding shorthand macros like "I486_FEATURES".""" + + begin_mark = "static X86CPUDefinition builtin_x86_defs[] = {\n" + end_mark = "};\n" + shorthand = re.compile("^#define ([A-Z0-9_]+_FEATURES) (.*)$") + lines = list() + shorthands = dict() + + with open(filename, "rt") as f: + while (line := readline_cont(f)) != begin_mark: + if not line: + raise RuntimeError("begin mark not found") + if match := shorthand.match(line): + # TCG definitions are irrelevant for cpu models + newk = match.group(1) + if newk.startswith("TCG_"): + continue + + # remove comments, whitespace and bit operators, effectively + # turning the bitfield into a list + newv = re.sub("([()|\t\n])|(/\*.*?\*/)", " ", match.group(2)) + + # resolve recursive shorthands + for k, v in shorthands.items(): + newv = newv.replace(k, v) + + shorthands[newk] = newv + + while (line := readline_cont(f)) != end_mark: + if not line: + raise RuntimeError("end marker not found") + + # apply shorthands + for k, v in shorthands.items(): + line = line.replace(k, v) + lines.append(line) + + return "".join(lines) + + +def transform(item): + """Recursively transform a Lark syntax tree into python native objects.""" + + if isinstance(item, lark.lexer.Token): + return str(item) + + if item.data == "list": + l = list() + for child in item.children: + value = transform(child) + if value is None: + continue + l.append(value) + return l + + if item.data == "map": + d = dict() + for child in item.children: + if len(child.children) != 2: + raise RuntimeError("map entry with more than 2 elements") + key = transform(child.children[0]) + value = transform(child.children[1]) + if key is None: + raise RuntimeError("map entry with 'None' key") + if value is None: + continue + d[key] = value + return d + + if item.data == "text": + l = list() + for child in item.children: + value = transform(child) + if value is None: + continue + l.append(value) + return " ".join(l) + + if item.data == "value": + if item.children: + raise RuntimeError("empty list is not empty") + return None + + raise RuntimeError("unexpected item type") + + +def expand_model(model): + """Expand a qemu cpu model description that has its feature split up into + different fields and may have differing versions into several libvirt- + friendly cpu models.""" + + result = { + "name": model.pop(".name"), + "vendor": T[model.pop(".vendor")], + "features": set(), + "extra": dict()} + + if ".family" in model and ".model" in model: + result["family"] = model.pop(".family") + result["model"] = model.pop(".model") + + for k in [k for k in model if k.startswith(".features")]: + v = model.pop(k) + for feature in v.split(): + if feature.startswith("VMX_") or feature.startswith("MSR_VMX_"): + continue + translated = T.get(feature, feature) + if translated: + result["features"].add(translated) + + versions = model.pop(".versions", []) + for k, v in model.items(): + result["extra"]["model" + k] = v + yield result + + for version in versions: + result = copy.deepcopy(result) + result["name"] = version.pop(".alias", result["name"]) + + props = version.pop(".props", dict()) + for k, v in props: + if v == "on": + result["features"].add(k) + elif v == "off" and k in result["features"]: + result["features"].remove(k) + else: + result["extra"]["property." + k] = v + + for k, v in version.items(): + result["extra"]["version" + k] = v + + yield result + + +def output_model(f, model): + if model["extra"]: + f.write("<!-- extra info from qemu:\n") + for k, v in model["extra"].items(): + f.write(" '{}': '{}'\n".format(k, v)) + f.write("-->\n") + + f.write("<cpus>\n") + f.write(" <model name='{}'>\n".format(model["name"])) + f.write(" <decode host='on' guest='on'/>\n") + f.write(" <signature family='{}' model='{}'/>\n".format( + model["family"], model["model"])) + f.write(" <vendor name='{}'/>\n".format(model["vendor"])) + for feature in sorted(model["features"]): + f.write(" <feature name='{}'/>\n".format(feature)) + f.write(" </model>\n") + f.write("</cpus>\n") + + +def main(): + parser = argparse.ArgumentParser( + description = "Synchronize x86 cpu models from QEMU i386 target.") + parser.add_argument("cpufile", + help="Path to 'target/i386/cpu.c' file in the QEMU repository", + type=os.path.realpath) + parser.add_argument("outdir", + help="Path to 'src/cpu_map' directory in the libvirt repository", + type=os.path.realpath) + + args = parser.parse_args() + + builtin_x86_defs = read_builtin_x86_defs(args.cpufile) + + ast = lark.Lark(r""" + list: value ( "," value )* ","? + map: keyvalue ( "," keyvalue )* ","? + keyvalue: IDENTIFIER "=" value + ?value: text | "{" "}" | "{" list "}" | "{" map "}" + text: (IDENTIFIER | "\"" (/[^"]+/)? "\"")+ + IDENTIFIER: /[\[\]\._&a-zA-Z0-9]/+ + %ignore (" " | "\r" | "\n" | "\t" | "|" )+ + %ignore "(" ( "X86CPUVersionDefinition" | "PropValue" ) "[])" + %ignore "//" /.*?/ "\n" + %ignore "/*" /(.|\n)*?/ "*/" + """, start="list").parse(builtin_x86_defs) + + models_json = transform(ast) + + models = list() + for model in models_json: + models.extend(expand_model(model)) + + for model in models: + name = os.path.join(args.outdir, "x86_{}.xml".format(model["name"])) + with open(name, "wt") as f: + output_model(f, model) + + +if __name__ == "__main__": + main() -- 2.26.2

Do not merge this commit. This commit contains the changes that would be suggested by the cpu_map sync script (see last commit): ./sync_qemu_i386.py ~/git/qemu/target/i386/cpu.c . Note: * Some models have "signature" / "vendor" added. * Models with multiple "signature"s lose all but one. * Comments are not preserved. * "stepping" in "signature" is not preseved. * "decode" is just flat on + on. * New models: denverton, knightsmill, snowridge --- src/cpu_map/x86_486.xml | 8 ++ src/cpu_map/x86_Broadwell-IBRS.xml | 19 ++++- src/cpu_map/x86_Broadwell-noTSX-IBRS.xml | 19 ++++- src/cpu_map/x86_Broadwell-noTSX.xml | 19 ++++- src/cpu_map/x86_Broadwell.xml | 18 ++++- src/cpu_map/x86_Cascadelake-Server-noTSX.xml | 20 ++++- src/cpu_map/x86_Cascadelake-Server.xml | 17 +++- src/cpu_map/x86_Conroe.xml | 10 ++- src/cpu_map/x86_Cooperlake.xml | 8 +- src/cpu_map/x86_Denverton.xml | 74 +++++++++++++++++ src/cpu_map/x86_Dhyana.xml | 12 ++- src/cpu_map/x86_EPYC-IBPB.xml | 19 ++++- src/cpu_map/x86_EPYC-Rome.xml | 9 +++ src/cpu_map/x86_EPYC.xml | 14 +++- src/cpu_map/x86_Haswell-IBRS.xml | 20 ++++- src/cpu_map/x86_Haswell-noTSX-IBRS.xml | 20 ++++- src/cpu_map/x86_Haswell-noTSX.xml | 20 ++++- src/cpu_map/x86_Haswell.xml | 18 ++++- src/cpu_map/x86_Icelake-Client-noTSX.xml | 14 +++- src/cpu_map/x86_Icelake-Client.xml | 11 ++- src/cpu_map/x86_Icelake-Server-noTSX.xml | 29 ++++++- src/cpu_map/x86_Icelake-Server.xml | 11 ++- src/cpu_map/x86_IvyBridge-IBRS.xml | 13 ++- src/cpu_map/x86_IvyBridge.xml | 12 ++- src/cpu_map/x86_KnightsMill.xml | 77 ++++++++++++++++++ src/cpu_map/x86_Nehalem-IBRS.xml | 14 +++- src/cpu_map/x86_Nehalem.xml | 13 ++- src/cpu_map/x86_Opteron_G1.xml | 9 ++- src/cpu_map/x86_Opteron_G2.xml | 10 ++- src/cpu_map/x86_Opteron_G3.xml | 10 ++- src/cpu_map/x86_Opteron_G4.xml | 11 ++- src/cpu_map/x86_Opteron_G5.xml | 11 ++- src/cpu_map/x86_Penryn.xml | 10 ++- src/cpu_map/x86_SandyBridge-IBRS.xml | 14 +++- src/cpu_map/x86_SandyBridge.xml | 13 ++- src/cpu_map/x86_Skylake-Client-IBRS.xml | 16 ++-- src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml | 18 +++-- src/cpu_map/x86_Skylake-Client.xml | 15 ++-- src/cpu_map/x86_Skylake-Server-IBRS.xml | 12 ++- src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml | 15 +++- src/cpu_map/x86_Skylake-Server.xml | 12 ++- src/cpu_map/x86_Snowridge.xml | 79 +++++++++++++++++++ src/cpu_map/x86_Westmere-IBRS.xml | 13 ++- src/cpu_map/x86_Westmere.xml | 14 +++- src/cpu_map/x86_athlon.xml | 8 ++ src/cpu_map/x86_core2duo.xml | 12 ++- src/cpu_map/x86_coreduo.xml | 10 ++- src/cpu_map/x86_kvm32.xml | 9 +++ src/cpu_map/x86_kvm64.xml | 9 +++ src/cpu_map/x86_n270.xml | 12 ++- src/cpu_map/x86_pentium.xml | 9 +++ src/cpu_map/x86_pentium2.xml | 9 +++ src/cpu_map/x86_pentium3.xml | 9 +++ src/cpu_map/x86_phenom.xml | 17 +++- src/cpu_map/x86_qemu32.xml | 8 ++ src/cpu_map/x86_qemu64.xml | 17 ++-- 56 files changed, 819 insertions(+), 130 deletions(-) create mode 100644 src/cpu_map/x86_Denverton.xml create mode 100644 src/cpu_map/x86_KnightsMill.xml create mode 100644 src/cpu_map/x86_Snowridge.xml diff --git a/src/cpu_map/x86_486.xml b/src/cpu_map/x86_486.xml index d05b277392..ff68909012 100644 --- a/src/cpu_map/x86_486.xml +++ b/src/cpu_map/x86_486.xml @@ -1,6 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '1' + 'model.stepping': '0' + 'model.xlevel': '0' + 'model.model_id': '' +--> <cpus> <model name='486'> <decode host='on' guest='on'/> + <signature family='4' model='8'/> + <vendor name='Intel'/> <feature name='fpu'/> <feature name='pse'/> <feature name='vme'/> diff --git a/src/cpu_map/x86_Broadwell-IBRS.xml b/src/cpu_map/x86_Broadwell-IBRS.xml index 9033d5fcd5..ce7df8183c 100644 --- a/src/cpu_map/x86_Broadwell-IBRS.xml +++ b/src/cpu_map/x86_Broadwell-IBRS.xml @@ -1,15 +1,22 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '2' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Broadwell)' + 'version.version': '3' + 'property.model-id': 'Intel Core Processor (Broadwell, IBRS)' +--> <cpus> <model name='Broadwell-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='61'/> <!-- 0306d0 --> - <signature family='6' model='71'/> <!-- 040670 --> - <signature family='6' model='79'/> <!-- 0406f0 --> - <signature family='6' model='86'/> <!-- 050660 --> + <signature family='6' model='61'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> + <feature name='abm'/> <feature name='adx'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='avx2'/> <feature name='bmi1'/> @@ -20,6 +27,7 @@ <feature name='cx8'/> <feature name='de'/> <feature name='erms'/> + <feature name='f16c'/> <feature name='fma'/> <feature name='fpu'/> <feature name='fsgsbase'/> @@ -44,6 +52,7 @@ <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdrand'/> <feature name='rdseed'/> <feature name='rdtscp'/> <feature name='rtm'/> @@ -59,7 +68,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml b/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml index c044b60e36..e88ca0979d 100644 --- a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml @@ -1,15 +1,22 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '2' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Broadwell)' + 'version.version': '4' + 'property.model-id': 'Intel Core Processor (Broadwell, no TSX, IBRS)' +--> <cpus> <model name='Broadwell-noTSX-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='61'/> <!-- 0306d0 --> - <signature family='6' model='71'/> <!-- 040670 --> - <signature family='6' model='79'/> <!-- 0406f0 --> - <signature family='6' model='86'/> <!-- 050660 --> + <signature family='6' model='61'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> + <feature name='abm'/> <feature name='adx'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='avx2'/> <feature name='bmi1'/> @@ -20,6 +27,7 @@ <feature name='cx8'/> <feature name='de'/> <feature name='erms'/> + <feature name='f16c'/> <feature name='fma'/> <feature name='fpu'/> <feature name='fsgsbase'/> @@ -43,6 +51,7 @@ <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdrand'/> <feature name='rdseed'/> <feature name='rdtscp'/> <feature name='sep'/> @@ -57,7 +66,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_Broadwell-noTSX.xml b/src/cpu_map/x86_Broadwell-noTSX.xml index 637f29ba1c..cc6f621467 100644 --- a/src/cpu_map/x86_Broadwell-noTSX.xml +++ b/src/cpu_map/x86_Broadwell-noTSX.xml @@ -1,15 +1,22 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '2' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Broadwell)' + 'version.version': '2' + 'property.model-id': 'Intel Core Processor (Broadwell, no TSX)' +--> <cpus> <model name='Broadwell-noTSX'> <decode host='on' guest='on'/> - <signature family='6' model='61'/> <!-- 0306d0 --> - <signature family='6' model='71'/> <!-- 040670 --> - <signature family='6' model='79'/> <!-- 0406f0 --> - <signature family='6' model='86'/> <!-- 050660 --> + <signature family='6' model='61'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> + <feature name='abm'/> <feature name='adx'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='avx2'/> <feature name='bmi1'/> @@ -20,6 +27,7 @@ <feature name='cx8'/> <feature name='de'/> <feature name='erms'/> + <feature name='f16c'/> <feature name='fma'/> <feature name='fpu'/> <feature name='fsgsbase'/> @@ -43,6 +51,7 @@ <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdrand'/> <feature name='rdseed'/> <feature name='rdtscp'/> <feature name='sep'/> @@ -56,7 +65,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_Broadwell.xml b/src/cpu_map/x86_Broadwell.xml index 82939a4509..d60ec31660 100644 --- a/src/cpu_map/x86_Broadwell.xml +++ b/src/cpu_map/x86_Broadwell.xml @@ -1,15 +1,21 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '2' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Broadwell)' + 'version.version': '1' +--> <cpus> <model name='Broadwell'> <decode host='on' guest='on'/> - <signature family='6' model='61'/> <!-- 0306d0 --> - <signature family='6' model='71'/> <!-- 040670 --> - <signature family='6' model='79'/> <!-- 0406f0 --> - <signature family='6' model='86'/> <!-- 050660 --> + <signature family='6' model='61'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> + <feature name='abm'/> <feature name='adx'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='avx2'/> <feature name='bmi1'/> @@ -20,6 +26,7 @@ <feature name='cx8'/> <feature name='de'/> <feature name='erms'/> + <feature name='f16c'/> <feature name='fma'/> <feature name='fpu'/> <feature name='fsgsbase'/> @@ -44,6 +51,7 @@ <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdrand'/> <feature name='rdseed'/> <feature name='rdtscp'/> <feature name='rtm'/> @@ -58,7 +66,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml b/src/cpu_map/x86_Cascadelake-Server-noTSX.xml index bfd4629836..cb2c4c204d 100644 --- a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml +++ b/src/cpu_map/x86_Cascadelake-Server-noTSX.xml @@ -1,7 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '6' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon Processor (Cascadelake)' + 'version.version': '4' + 'version.note': 'ARCH_CAPABILITIES, no TSX' +--> <cpus> <model name='Cascadelake-Server-noTSX'> - <decode host='on' guest='off'/> - <signature family='6' model='85' stepping='5-7'/> <!-- 050654 --> + <decode host='on' guest='on'/> + <signature family='6' model='85'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -9,6 +17,7 @@ <feature name='aes'/> <feature name='apic'/> <feature name='arat'/> + <feature name='arch-capabilities'/> <feature name='avx'/> <feature name='avx2'/> <feature name='avx512bw'/> @@ -32,14 +41,15 @@ <feature name='fpu'/> <feature name='fsgsbase'/> <feature name='fxsr'/> + <feature name='ibrs-all'/> <feature name='invpcid'/> <feature name='lahf_lm'/> <feature name='lm'/> <feature name='mca'/> <feature name='mce'/> + <feature name='mds-no'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -49,14 +59,17 @@ <feature name='pclmuldq'/> <feature name='pdpe1gb'/> <feature name='pge'/> + <feature name='pku'/> <feature name='pni'/> <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdctl-no'/> <feature name='rdrand'/> <feature name='rdseed'/> <feature name='rdtscp'/> <feature name='sep'/> + <feature name='skip-l1dfl-vmentry'/> <feature name='smap'/> <feature name='smep'/> <feature name='spec-ctrl'/> @@ -70,6 +83,7 @@ <feature name='tsc'/> <feature name='tsc-deadline'/> <feature name='vme'/> + <feature name='vmx-eptp-switching'/> <feature name='x2apic'/> <feature name='xgetbv1'/> <feature name='xsave'/> diff --git a/src/cpu_map/x86_Cascadelake-Server.xml b/src/cpu_map/x86_Cascadelake-Server.xml index 335e9cb584..a68a332700 100644 --- a/src/cpu_map/x86_Cascadelake-Server.xml +++ b/src/cpu_map/x86_Cascadelake-Server.xml @@ -1,7 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '6' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon Processor (Cascadelake)' + 'version.version': '2' + 'version.note': 'ARCH_CAPABILITIES' +--> <cpus> <model name='Cascadelake-Server'> <decode host='on' guest='on'/> - <signature family='6' model='85' stepping='5-7'/> <!-- 050654 --> + <signature family='6' model='85'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -9,6 +17,7 @@ <feature name='aes'/> <feature name='apic'/> <feature name='arat'/> + <feature name='arch-capabilities'/> <feature name='avx'/> <feature name='avx2'/> <feature name='avx512bw'/> @@ -33,14 +42,15 @@ <feature name='fsgsbase'/> <feature name='fxsr'/> <feature name='hle'/> + <feature name='ibrs-all'/> <feature name='invpcid'/> <feature name='lahf_lm'/> <feature name='lm'/> <feature name='mca'/> <feature name='mce'/> + <feature name='mds-no'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -50,15 +60,18 @@ <feature name='pclmuldq'/> <feature name='pdpe1gb'/> <feature name='pge'/> + <feature name='pku'/> <feature name='pni'/> <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdctl-no'/> <feature name='rdrand'/> <feature name='rdseed'/> <feature name='rdtscp'/> <feature name='rtm'/> <feature name='sep'/> + <feature name='skip-l1dfl-vmentry'/> <feature name='smap'/> <feature name='smep'/> <feature name='spec-ctrl'/> diff --git a/src/cpu_map/x86_Conroe.xml b/src/cpu_map/x86_Conroe.xml index 4cacee6142..3484befbeb 100644 --- a/src/cpu_map/x86_Conroe.xml +++ b/src/cpu_map/x86_Conroe.xml @@ -1,8 +1,13 @@ +<!-- extra info from qemu: + 'model.level': '10' + 'model.stepping': '3' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Celeron_4x0 (Conroe/Merom Class Core 2)' +--> <cpus> <model name='Conroe'> <decode host='on' guest='on'/> - <signature family='6' model='15'/> <!-- 0006f0 --> - <signature family='6' model='22'/> <!-- 010660 --> + <signature family='6' model='15'/> <vendor name='Intel'/> <feature name='apic'/> <feature name='clflush'/> @@ -31,5 +36,6 @@ <feature name='ssse3'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_Cooperlake.xml b/src/cpu_map/x86_Cooperlake.xml index ceca687334..bb15c1f262 100644 --- a/src/cpu_map/x86_Cooperlake.xml +++ b/src/cpu_map/x86_Cooperlake.xml @@ -1,7 +1,13 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '10' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon Processor (Cooperlake)' +--> <cpus> <model name='Cooperlake'> <decode host='on' guest='on'/> - <signature family='6' model='85' stepping='10-11'/> <!-- 05065b --> + <signature family='6' model='85'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> diff --git a/src/cpu_map/x86_Denverton.xml b/src/cpu_map/x86_Denverton.xml new file mode 100644 index 0000000000..c6337bc12a --- /dev/null +++ b/src/cpu_map/x86_Denverton.xml @@ -0,0 +1,74 @@ +<!-- extra info from qemu: + 'model.level': '21' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Atom Processor (Denverton)' + 'version.version': '2' + 'property.monitor': 'off' + 'version.note': 'no MPX, no MONITOR' +--> +<cpus> + <model name='Denverton'> + <decode host='on' guest='on'/> + <signature family='6' model='95'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='arch-capabilities'/> + <feature name='clflush'/> + <feature name='clflushopt'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdctl-no'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sha-ni'/> + <feature name='skip-l1dfl-vmentry'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='ssbd'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu_map/x86_Dhyana.xml b/src/cpu_map/x86_Dhyana.xml index 689daf8649..3190d5357b 100644 --- a/src/cpu_map/x86_Dhyana.xml +++ b/src/cpu_map/x86_Dhyana.xml @@ -1,7 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '1' + 'model.xlevel': '0x8000001E' + 'model.model_id': 'Hygon Dhyana Processor' + 'model.cache_info': '&epyc_cache_info' +--> <cpus> <model name='Dhyana'> <decode host='on' guest='on'/> - <signature family='24' model='0'/> <!-- 900f00 --> + <signature family='24' model='0'/> <vendor name='Hygon'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -33,10 +40,11 @@ <feature name='misalignsse'/> <feature name='mmx'/> <feature name='mmxext'/> - <feature name='monitor'/> <feature name='movbe'/> <feature name='msr'/> <feature name='mtrr'/> + <feature name='npt'/> + <feature name='nrip-save'/> <feature name='nx'/> <feature name='osvw'/> <feature name='pae'/> diff --git a/src/cpu_map/x86_EPYC-IBPB.xml b/src/cpu_map/x86_EPYC-IBPB.xml index 983c5f4445..b9e90e0186 100644 --- a/src/cpu_map/x86_EPYC-IBPB.xml +++ b/src/cpu_map/x86_EPYC-IBPB.xml @@ -1,7 +1,17 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '2' + 'model.xlevel': '0x8000001E' + 'model.model_id': 'AMD EPYC Processor' + 'model.cache_info': '&epyc_cache_info' + 'model.use_epyc_apic_id_encoding': '1' + 'version.version': '3' + 'property.model-id': 'AMD EPYC Processor' +--> <cpus> <model name='EPYC-IBPB'> <decode host='on' guest='on'/> - <signature family='23' model='1'/> <!-- 800f10 --> + <signature family='23' model='1'/> <vendor name='AMD'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -15,6 +25,7 @@ <feature name='bmi2'/> <feature name='clflush'/> <feature name='clflushopt'/> + <feature name='clzero'/> <feature name='cmov'/> <feature name='cr8legacy'/> <feature name='cx16'/> @@ -34,16 +45,18 @@ <feature name='misalignsse'/> <feature name='mmx'/> <feature name='mmxext'/> - <feature name='monitor'/> <feature name='movbe'/> <feature name='msr'/> <feature name='mtrr'/> + <feature name='npt'/> + <feature name='nrip-save'/> <feature name='nx'/> <feature name='osvw'/> <feature name='pae'/> <feature name='pat'/> <feature name='pclmuldq'/> <feature name='pdpe1gb'/> + <feature name='perfctr-core'/> <feature name='pge'/> <feature name='pni'/> <feature name='popcnt'/> @@ -69,6 +82,8 @@ <feature name='xgetbv1'/> <feature name='xsave'/> <feature name='xsavec'/> + <feature name='xsaveerptr'/> <feature name='xsaveopt'/> + <feature name='xsaves'/> </model> </cpus> diff --git a/src/cpu_map/x86_EPYC-Rome.xml b/src/cpu_map/x86_EPYC-Rome.xml index e54d0a48d8..c26a715446 100644 --- a/src/cpu_map/x86_EPYC-Rome.xml +++ b/src/cpu_map/x86_EPYC-Rome.xml @@ -1,3 +1,11 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '0' + 'model.xlevel': '0x8000001E' + 'model.model_id': 'AMD EPYC-Rome Processor' + 'model.cache_info': '&epyc_rome_cache_info' + 'model.use_epyc_apic_id_encoding': '1' +--> <cpus> <model name='EPYC-Rome'> <decode host='on' guest='on'/> @@ -79,5 +87,6 @@ <feature name='xsavec'/> <feature name='xsaveerptr'/> <feature name='xsaveopt'/> + <feature name='xsaves'/> </model> </cpus> diff --git a/src/cpu_map/x86_EPYC.xml b/src/cpu_map/x86_EPYC.xml index 3ebba9f4ed..99478fd0d9 100644 --- a/src/cpu_map/x86_EPYC.xml +++ b/src/cpu_map/x86_EPYC.xml @@ -1,7 +1,16 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '2' + 'model.xlevel': '0x8000001E' + 'model.model_id': 'AMD EPYC Processor' + 'model.cache_info': '&epyc_cache_info' + 'model.use_epyc_apic_id_encoding': '1' + 'version.version': '1' +--> <cpus> <model name='EPYC'> <decode host='on' guest='on'/> - <signature family='23' model='1'/> <!-- 800f10 --> + <signature family='23' model='1'/> <vendor name='AMD'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -33,10 +42,11 @@ <feature name='misalignsse'/> <feature name='mmx'/> <feature name='mmxext'/> - <feature name='monitor'/> <feature name='movbe'/> <feature name='msr'/> <feature name='mtrr'/> + <feature name='npt'/> + <feature name='nrip-save'/> <feature name='nx'/> <feature name='osvw'/> <feature name='pae'/> diff --git a/src/cpu_map/x86_Haswell-IBRS.xml b/src/cpu_map/x86_Haswell-IBRS.xml index 0ffe2bae0d..067c19cb7a 100644 --- a/src/cpu_map/x86_Haswell-IBRS.xml +++ b/src/cpu_map/x86_Haswell-IBRS.xml @@ -1,13 +1,21 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '4' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Haswell)' + 'version.version': '3' + 'property.stepping': '4' + 'property.model-id': 'Intel Core Processor (Haswell, IBRS)' +--> <cpus> <model name='Haswell-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='60'/> <!-- 0306c0 --> - <signature family='6' model='63'/> <!-- 0306f0 --> - <signature family='6' model='69'/> <!-- 040650 --> - <signature family='6' model='70'/> <!-- 040660 --> + <signature family='6' model='60'/> <vendor name='Intel'/> + <feature name='abm'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='avx2'/> <feature name='bmi1'/> @@ -18,6 +26,7 @@ <feature name='cx8'/> <feature name='de'/> <feature name='erms'/> + <feature name='f16c'/> <feature name='fma'/> <feature name='fpu'/> <feature name='fsgsbase'/> @@ -42,6 +51,7 @@ <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdrand'/> <feature name='rdtscp'/> <feature name='rtm'/> <feature name='sep'/> @@ -55,7 +65,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_Haswell-noTSX-IBRS.xml b/src/cpu_map/x86_Haswell-noTSX-IBRS.xml index 75d709c009..c18f09acd9 100644 --- a/src/cpu_map/x86_Haswell-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Haswell-noTSX-IBRS.xml @@ -1,13 +1,21 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '4' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Haswell)' + 'version.version': '4' + 'property.stepping': '1' + 'property.model-id': 'Intel Core Processor (Haswell, no TSX, IBRS)' +--> <cpus> <model name='Haswell-noTSX-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='60'/> <!-- 0306c0 --> - <signature family='6' model='63'/> <!-- 0306f0 --> - <signature family='6' model='69'/> <!-- 040650 --> - <signature family='6' model='70'/> <!-- 040660 --> + <signature family='6' model='60'/> <vendor name='Intel'/> + <feature name='abm'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='avx2'/> <feature name='bmi1'/> @@ -18,6 +26,7 @@ <feature name='cx8'/> <feature name='de'/> <feature name='erms'/> + <feature name='f16c'/> <feature name='fma'/> <feature name='fpu'/> <feature name='fsgsbase'/> @@ -41,6 +50,7 @@ <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdrand'/> <feature name='rdtscp'/> <feature name='sep'/> <feature name='smep'/> @@ -53,7 +63,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_Haswell-noTSX.xml b/src/cpu_map/x86_Haswell-noTSX.xml index b0a0faa856..8cf672b3d2 100644 --- a/src/cpu_map/x86_Haswell-noTSX.xml +++ b/src/cpu_map/x86_Haswell-noTSX.xml @@ -1,13 +1,21 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '4' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Haswell)' + 'version.version': '2' + 'property.stepping': '1' + 'property.model-id': 'Intel Core Processor (Haswell, no TSX)' +--> <cpus> <model name='Haswell-noTSX'> <decode host='on' guest='on'/> - <signature family='6' model='60'/> <!-- 0306c0 --> - <signature family='6' model='63'/> <!-- 0306f0 --> - <signature family='6' model='69'/> <!-- 040650 --> - <signature family='6' model='70'/> <!-- 040660 --> + <signature family='6' model='60'/> <vendor name='Intel'/> + <feature name='abm'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='avx2'/> <feature name='bmi1'/> @@ -18,6 +26,7 @@ <feature name='cx8'/> <feature name='de'/> <feature name='erms'/> + <feature name='f16c'/> <feature name='fma'/> <feature name='fpu'/> <feature name='fsgsbase'/> @@ -41,6 +50,7 @@ <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdrand'/> <feature name='rdtscp'/> <feature name='sep'/> <feature name='smep'/> @@ -52,7 +62,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_Haswell.xml b/src/cpu_map/x86_Haswell.xml index ee16b30f19..16ffd6983a 100644 --- a/src/cpu_map/x86_Haswell.xml +++ b/src/cpu_map/x86_Haswell.xml @@ -1,13 +1,19 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '4' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Haswell)' + 'version.version': '1' +--> <cpus> <model name='Haswell'> <decode host='on' guest='on'/> - <signature family='6' model='60'/> <!-- 0306c0 --> - <signature family='6' model='63'/> <!-- 0306f0 --> - <signature family='6' model='69'/> <!-- 040650 --> - <signature family='6' model='70'/> <!-- 040660 --> + <signature family='6' model='60'/> <vendor name='Intel'/> + <feature name='abm'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='avx2'/> <feature name='bmi1'/> @@ -18,6 +24,7 @@ <feature name='cx8'/> <feature name='de'/> <feature name='erms'/> + <feature name='f16c'/> <feature name='fma'/> <feature name='fpu'/> <feature name='fsgsbase'/> @@ -42,6 +49,7 @@ <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdrand'/> <feature name='rdtscp'/> <feature name='rtm'/> <feature name='sep'/> @@ -54,7 +62,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_Icelake-Client-noTSX.xml b/src/cpu_map/x86_Icelake-Client-noTSX.xml index 65e648ae21..cf1634a0b8 100644 --- a/src/cpu_map/x86_Icelake-Client-noTSX.xml +++ b/src/cpu_map/x86_Icelake-Client-noTSX.xml @@ -1,7 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '0' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Icelake)' + 'version.version': '2' + 'version.note': 'no TSX' +--> <cpus> <model name='Icelake-Client-noTSX'> - <decode host='on' guest='off'/> - <signature family='6' model='126'/> <!-- 0706e0 --> + <decode host='on' guest='on'/> + <signature family='6' model='126'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -30,7 +38,6 @@ <feature name='fsgsbase'/> <feature name='fxsr'/> <feature name='gfni'/> - <feature name='intel-pt'/> <feature name='invpcid'/> <feature name='lahf_lm'/> <feature name='lm'/> @@ -38,7 +45,6 @@ <feature name='mce'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> diff --git a/src/cpu_map/x86_Icelake-Client.xml b/src/cpu_map/x86_Icelake-Client.xml index 5cf32e91fa..5b7b819182 100644 --- a/src/cpu_map/x86_Icelake-Client.xml +++ b/src/cpu_map/x86_Icelake-Client.xml @@ -1,7 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '0' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Icelake)' + 'version.version': '1' +--> <cpus> <model name='Icelake-Client'> <decode host='on' guest='on'/> - <signature family='6' model='126'/> <!-- 0706e0 --> + <signature family='6' model='126'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -31,7 +38,6 @@ <feature name='fxsr'/> <feature name='gfni'/> <feature name='hle'/> - <feature name='intel-pt'/> <feature name='invpcid'/> <feature name='lahf_lm'/> <feature name='lm'/> @@ -39,7 +45,6 @@ <feature name='mce'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> diff --git a/src/cpu_map/x86_Icelake-Server-noTSX.xml b/src/cpu_map/x86_Icelake-Server-noTSX.xml index 2fd6906406..69635fb96b 100644 --- a/src/cpu_map/x86_Icelake-Server-noTSX.xml +++ b/src/cpu_map/x86_Icelake-Server-noTSX.xml @@ -1,7 +1,16 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '0' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon Processor (Icelake)' + 'version.version': '4' + 'version.note': 'no TSX' + 'property.model': '106' +--> <cpus> <model name='Icelake-Server-noTSX'> - <decode host='on' guest='off'/> - <signature family='6' model='134'/> <!-- 080660 --> + <decode host='on' guest='on'/> + <signature family='6' model='134'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -9,6 +18,7 @@ <feature name='aes'/> <feature name='apic'/> <feature name='arat'/> + <feature name='arch-capabilities'/> <feature name='avx'/> <feature name='avx2'/> <feature name='avx512-vpopcntdq'/> @@ -17,6 +27,7 @@ <feature name='avx512cd'/> <feature name='avx512dq'/> <feature name='avx512f'/> + <feature name='avx512ifma'/> <feature name='avx512vbmi'/> <feature name='avx512vbmi2'/> <feature name='avx512vl'/> @@ -35,18 +46,19 @@ <feature name='fma'/> <feature name='fpu'/> <feature name='fsgsbase'/> + <feature name='fsrm'/> <feature name='fxsr'/> <feature name='gfni'/> - <feature name='intel-pt'/> + <feature name='ibrs-all'/> <feature name='invpcid'/> <feature name='la57'/> <feature name='lahf_lm'/> <feature name='lm'/> <feature name='mca'/> <feature name='mce'/> + <feature name='mds-no'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -59,12 +71,17 @@ <feature name='pku'/> <feature name='pni'/> <feature name='popcnt'/> + <feature name='pschange-mc-no'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdctl-no'/> + <feature name='rdpid'/> <feature name='rdrand'/> <feature name='rdseed'/> <feature name='rdtscp'/> <feature name='sep'/> + <feature name='sha-ni'/> + <feature name='skip-l1dfl-vmentry'/> <feature name='smap'/> <feature name='smep'/> <feature name='spec-ctrl'/> @@ -75,11 +92,15 @@ <feature name='sse4.2'/> <feature name='ssse3'/> <feature name='syscall'/> + <feature name='taa-no'/> <feature name='tsc'/> <feature name='tsc-deadline'/> <feature name='umip'/> <feature name='vaes'/> <feature name='vme'/> + <feature name='vmx-eptp-switching'/> + <feature name='vmx-pml'/> + <feature name='vmx-rdseed-exit'/> <feature name='vpclmulqdq'/> <feature name='wbnoinvd'/> <feature name='x2apic'/> diff --git a/src/cpu_map/x86_Icelake-Server.xml b/src/cpu_map/x86_Icelake-Server.xml index 367ade7240..a88df26ec2 100644 --- a/src/cpu_map/x86_Icelake-Server.xml +++ b/src/cpu_map/x86_Icelake-Server.xml @@ -1,7 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '0' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon Processor (Icelake)' + 'version.version': '1' +--> <cpus> <model name='Icelake-Server'> <decode host='on' guest='on'/> - <signature family='6' model='134'/> <!-- 080660 --> + <signature family='6' model='134'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -38,7 +45,6 @@ <feature name='fxsr'/> <feature name='gfni'/> <feature name='hle'/> - <feature name='intel-pt'/> <feature name='invpcid'/> <feature name='la57'/> <feature name='lahf_lm'/> @@ -47,7 +53,6 @@ <feature name='mce'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> diff --git a/src/cpu_map/x86_IvyBridge-IBRS.xml b/src/cpu_map/x86_IvyBridge-IBRS.xml index 430bc3232d..3323c51e4e 100644 --- a/src/cpu_map/x86_IvyBridge-IBRS.xml +++ b/src/cpu_map/x86_IvyBridge-IBRS.xml @@ -1,11 +1,19 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '9' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon E3-12xx v2 (Ivy Bridge)' + 'version.version': '2' + 'property.model-id': 'Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)' +--> <cpus> <model name='IvyBridge-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='58'/> <!-- 0306a0 --> - <signature family='6' model='62'/> <!-- 0306e0 --> + <signature family='6' model='58'/> <vendor name='Intel'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='clflush'/> <feature name='cmov'/> @@ -49,5 +57,6 @@ <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_IvyBridge.xml b/src/cpu_map/x86_IvyBridge.xml index eaf5d02e82..e4edad09b0 100644 --- a/src/cpu_map/x86_IvyBridge.xml +++ b/src/cpu_map/x86_IvyBridge.xml @@ -1,11 +1,18 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '9' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon E3-12xx v2 (Ivy Bridge)' + 'version.version': '1' +--> <cpus> <model name='IvyBridge'> <decode host='on' guest='on'/> - <signature family='6' model='58'/> <!-- 0306a0 --> - <signature family='6' model='62'/> <!-- 0306e0 --> + <signature family='6' model='58'/> <vendor name='Intel'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='clflush'/> <feature name='cmov'/> @@ -48,5 +55,6 @@ <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_KnightsMill.xml b/src/cpu_map/x86_KnightsMill.xml new file mode 100644 index 0000000000..df81bdf715 --- /dev/null +++ b/src/cpu_map/x86_KnightsMill.xml @@ -0,0 +1,77 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '0' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon Phi Processor (Knights Mill)' +--> +<cpus> + <model name='KnightsMill'> + <decode host='on' guest='on'/> + <signature family='6' model='133'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='avx512-4fmaps'/> + <feature name='avx512-4vnniw'/> + <feature name='avx512-vpopcntdq'/> + <feature name='avx512cd'/> + <feature name='avx512er'/> + <feature name='avx512f'/> + <feature name='avx512pf'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='f16c'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='ss'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xsave'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu_map/x86_Nehalem-IBRS.xml b/src/cpu_map/x86_Nehalem-IBRS.xml index 00d0d2fe51..3a5660454f 100644 --- a/src/cpu_map/x86_Nehalem-IBRS.xml +++ b/src/cpu_map/x86_Nehalem-IBRS.xml @@ -1,10 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '11' + 'model.stepping': '3' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core i7 9xx (Nehalem Class Core i7)' + 'version.version': '2' + 'property.model-id': 'Intel Core i7 9xx (Nehalem Core i7, IBRS update)' +--> <cpus> <model name='Nehalem-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='26'/> <!-- 0106a0 --> - <signature family='6' model='30'/> <!-- 0106e0 --> - <signature family='6' model='31'/> <!-- 0106f0 --> - <signature family='6' model='46'/> <!-- 0206e0 --> + <signature family='6' model='26'/> <vendor name='Intel'/> <feature name='apic'/> <feature name='clflush'/> @@ -38,5 +43,6 @@ <feature name='ssse3'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_Nehalem.xml b/src/cpu_map/x86_Nehalem.xml index 9968001fe7..d5811d27ba 100644 --- a/src/cpu_map/x86_Nehalem.xml +++ b/src/cpu_map/x86_Nehalem.xml @@ -1,10 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '11' + 'model.stepping': '3' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core i7 9xx (Nehalem Class Core i7)' + 'version.version': '1' +--> <cpus> <model name='Nehalem'> <decode host='on' guest='on'/> - <signature family='6' model='26'/> <!-- 0106a0 --> - <signature family='6' model='30'/> <!-- 0106e0 --> - <signature family='6' model='31'/> <!-- 0106f0 --> - <signature family='6' model='46'/> <!-- 0206e0 --> + <signature family='6' model='26'/> <vendor name='Intel'/> <feature name='apic'/> <feature name='clflush'/> @@ -37,5 +41,6 @@ <feature name='ssse3'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_Opteron_G1.xml b/src/cpu_map/x86_Opteron_G1.xml index 57648ca93f..ad6cd87ca5 100644 --- a/src/cpu_map/x86_Opteron_G1.xml +++ b/src/cpu_map/x86_Opteron_G1.xml @@ -1,7 +1,13 @@ +<!-- extra info from qemu: + 'model.level': '5' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'AMD Opteron 240 (Gen 1 Class Opteron)' +--> <cpus> <model name='Opteron_G1'> <decode host='on' guest='on'/> - <signature family='15' model='6'/> <!-- 100e60 --> + <signature family='15' model='6'/> <vendor name='AMD'/> <feature name='apic'/> <feature name='clflush'/> @@ -28,5 +34,6 @@ <feature name='sse2'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_Opteron_G2.xml b/src/cpu_map/x86_Opteron_G2.xml index db961b0067..6341f3f4ce 100644 --- a/src/cpu_map/x86_Opteron_G2.xml +++ b/src/cpu_map/x86_Opteron_G2.xml @@ -1,7 +1,13 @@ +<!-- extra info from qemu: + 'model.level': '5' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'AMD Opteron 22xx (Gen 2 Class Opteron)' +--> <cpus> <model name='Opteron_G2'> <decode host='on' guest='on'/> - <signature family='15' model='6'/> <!-- 100e60 --> + <signature family='15' model='6'/> <vendor name='AMD'/> <feature name='apic'/> <feature name='clflush'/> @@ -25,12 +31,12 @@ <feature name='pni'/> <feature name='pse'/> <feature name='pse36'/> - <feature name='rdtscp'/> <feature name='sep'/> <feature name='sse'/> <feature name='sse2'/> <feature name='svm'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_Opteron_G3.xml b/src/cpu_map/x86_Opteron_G3.xml index dab59d4f82..3085e180e8 100644 --- a/src/cpu_map/x86_Opteron_G3.xml +++ b/src/cpu_map/x86_Opteron_G3.xml @@ -1,7 +1,13 @@ +<!-- extra info from qemu: + 'model.level': '5' + 'model.stepping': '3' + 'model.xlevel': '0x80000008' + 'model.model_id': 'AMD Opteron 23xx (Gen 3 Class Opteron)' +--> <cpus> <model name='Opteron_G3'> <decode host='on' guest='on'/> - <signature family='15' model='6'/> <!-- 100e60 --> + <signature family='16' model='2'/> <vendor name='AMD'/> <feature name='abm'/> <feature name='apic'/> @@ -18,7 +24,6 @@ <feature name='mce'/> <feature name='misalignsse'/> <feature name='mmx'/> - <feature name='monitor'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -37,5 +42,6 @@ <feature name='svm'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_Opteron_G4.xml b/src/cpu_map/x86_Opteron_G4.xml index a7fc8d5828..30f8b7d33a 100644 --- a/src/cpu_map/x86_Opteron_G4.xml +++ b/src/cpu_map/x86_Opteron_G4.xml @@ -1,7 +1,13 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '2' + 'model.xlevel': '0x8000001A' + 'model.model_id': 'AMD Opteron 62xx class CPU' +--> <cpus> <model name='Opteron_G4'> <decode host='on' guest='on'/> - <signature family='21' model='1'/> <!-- 600f10 --> + <signature family='21' model='1'/> <vendor name='AMD'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -24,6 +30,8 @@ <feature name='mmx'/> <feature name='msr'/> <feature name='mtrr'/> + <feature name='npt'/> + <feature name='nrip-save'/> <feature name='nx'/> <feature name='pae'/> <feature name='pat'/> @@ -45,6 +53,7 @@ <feature name='svm'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> <feature name='xop'/> <feature name='xsave'/> </model> diff --git a/src/cpu_map/x86_Opteron_G5.xml b/src/cpu_map/x86_Opteron_G5.xml index ff775bdcef..148009a083 100644 --- a/src/cpu_map/x86_Opteron_G5.xml +++ b/src/cpu_map/x86_Opteron_G5.xml @@ -1,7 +1,13 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '0' + 'model.xlevel': '0x8000001A' + 'model.model_id': 'AMD Opteron 63xx class CPU' +--> <cpus> <model name='Opteron_G5'> <decode host='on' guest='on'/> - <signature family='21' model='2'/> <!-- 600f20 --> + <signature family='21' model='2'/> <vendor name='AMD'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -26,6 +32,8 @@ <feature name='mmx'/> <feature name='msr'/> <feature name='mtrr'/> + <feature name='npt'/> + <feature name='nrip-save'/> <feature name='nx'/> <feature name='pae'/> <feature name='pat'/> @@ -48,6 +56,7 @@ <feature name='syscall'/> <feature name='tbm'/> <feature name='tsc'/> + <feature name='vme'/> <feature name='xop'/> <feature name='xsave'/> </model> diff --git a/src/cpu_map/x86_Penryn.xml b/src/cpu_map/x86_Penryn.xml index 29d4cd635b..f30aaf4682 100644 --- a/src/cpu_map/x86_Penryn.xml +++ b/src/cpu_map/x86_Penryn.xml @@ -1,8 +1,13 @@ +<!-- extra info from qemu: + 'model.level': '10' + 'model.stepping': '3' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core 2 Duo P9xxx (Penryn Class Core 2)' +--> <cpus> <model name='Penryn'> <decode host='on' guest='on'/> - <signature family='6' model='23'/> <!-- 010670 --> - <signature family='6' model='29'/> <!-- 0106d0 --> + <signature family='6' model='23'/> <vendor name='Intel'/> <feature name='apic'/> <feature name='clflush'/> @@ -33,5 +38,6 @@ <feature name='ssse3'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_SandyBridge-IBRS.xml b/src/cpu_map/x86_SandyBridge-IBRS.xml index fbdb4f2bf6..a38c36763e 100644 --- a/src/cpu_map/x86_SandyBridge-IBRS.xml +++ b/src/cpu_map/x86_SandyBridge-IBRS.xml @@ -1,11 +1,19 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon E312xx (Sandy Bridge)' + 'version.version': '2' + 'property.model-id': 'Intel Xeon E312xx (Sandy Bridge, IBRS update)' +--> <cpus> <model name='SandyBridge-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='42'/> <!-- 0206a0 --> - <signature family='6' model='45'/> <!-- 0206d0 --> + <signature family='6' model='42'/> <vendor name='Intel'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='clflush'/> <feature name='cmov'/> @@ -41,7 +49,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_SandyBridge.xml b/src/cpu_map/x86_SandyBridge.xml index 7c85ed42df..d67525e569 100644 --- a/src/cpu_map/x86_SandyBridge.xml +++ b/src/cpu_map/x86_SandyBridge.xml @@ -1,11 +1,18 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon E312xx (Sandy Bridge)' + 'version.version': '1' +--> <cpus> <model name='SandyBridge'> <decode host='on' guest='on'/> - <signature family='6' model='42'/> <!-- 0206a0 --> - <signature family='6' model='45'/> <!-- 0206d0 --> + <signature family='6' model='42'/> <vendor name='Intel'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='avx'/> <feature name='clflush'/> <feature name='cmov'/> @@ -40,7 +47,9 @@ <feature name='syscall'/> <feature name='tsc'/> <feature name='tsc-deadline'/> + <feature name='vme'/> <feature name='x2apic'/> <feature name='xsave'/> + <feature name='xsaveopt'/> </model> </cpus> diff --git a/src/cpu_map/x86_Skylake-Client-IBRS.xml b/src/cpu_map/x86_Skylake-Client-IBRS.xml index 5709e7c2f9..7e5c6d3c41 100644 --- a/src/cpu_map/x86_Skylake-Client-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Client-IBRS.xml @@ -1,12 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '3' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Skylake)' + 'version.version': '2' + 'property.model-id': 'Intel Core Processor (Skylake, IBRS)' +--> <cpus> <model name='Skylake-Client-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='94'/> <!-- 0506e0 --> - <signature family='6' model='78'/> <!-- 0406e0 --> - <!-- These are Kaby Lake and Coffee Lake successors to Skylake, - but we don't have specific models for them. --> - <signature family='6' model='142'/> <!-- 0806e0 --> - <signature family='6' model='158'/> <!-- 0906e0 --> + <signature family='6' model='94'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -37,7 +40,6 @@ <feature name='mce'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> diff --git a/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml b/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml index ffba34502a..1b8fd4c1a0 100644 --- a/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml @@ -1,12 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '3' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Skylake)' + 'version.version': '3' + 'property.model-id': 'Intel Core Processor (Skylake, IBRS, no TSX)' +--> <cpus> <model name='Skylake-Client-noTSX-IBRS'> - <decode host='on' guest='off'/> - <signature family='6' model='94'/> <!-- 0506e0 --> - <signature family='6' model='78'/> <!-- 0406e0 --> - <!-- These are Kaby Lake and Coffee Lake successors to Skylake, - but we don't have specific models for them. --> - <signature family='6' model='142'/> <!-- 0806e0 --> - <signature family='6' model='158'/> <!-- 0906e0 --> + <decode host='on' guest='on'/> + <signature family='6' model='94'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -36,7 +39,6 @@ <feature name='mce'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> diff --git a/src/cpu_map/x86_Skylake-Client.xml b/src/cpu_map/x86_Skylake-Client.xml index 14cd57e176..aae96a8980 100644 --- a/src/cpu_map/x86_Skylake-Client.xml +++ b/src/cpu_map/x86_Skylake-Client.xml @@ -1,12 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '3' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Core Processor (Skylake)' + 'version.version': '1' +--> <cpus> <model name='Skylake-Client'> <decode host='on' guest='on'/> - <signature family='6' model='94'/> <!-- 0506e0 --> - <signature family='6' model='78'/> <!-- 0406e0 --> - <!-- These are Kaby Lake and Coffee Lake successors to Skylake, - but we don't have specific models for them. --> - <signature family='6' model='142'/> <!-- 0806e0 --> - <signature family='6' model='158'/> <!-- 0906e0 --> + <signature family='6' model='94'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -37,7 +39,6 @@ <feature name='mce'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> diff --git a/src/cpu_map/x86_Skylake-Server-IBRS.xml b/src/cpu_map/x86_Skylake-Server-IBRS.xml index 9fb3488809..35d5d55083 100644 --- a/src/cpu_map/x86_Skylake-Server-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Server-IBRS.xml @@ -1,7 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '4' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon Processor (Skylake)' + 'version.version': '2' + 'property.model-id': 'Intel Xeon Processor (Skylake, IBRS)' +--> <cpus> <model name='Skylake-Server-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='85' stepping='0-4'/> <!-- 050654 --> + <signature family='6' model='85'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -38,7 +46,6 @@ <feature name='mce'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -48,6 +55,7 @@ <feature name='pclmuldq'/> <feature name='pdpe1gb'/> <feature name='pge'/> + <feature name='pku'/> <feature name='pni'/> <feature name='popcnt'/> <feature name='pse'/> diff --git a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml b/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml index c162c0acc3..dc371cf83b 100644 --- a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml @@ -1,7 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '4' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon Processor (Skylake)' + 'version.version': '4' + 'property.model-id': 'Intel Xeon Processor (Skylake, IBRS, no TSX)' +--> <cpus> <model name='Skylake-Server-noTSX-IBRS'> - <decode host='on' guest='off'/> - <signature family='6' model='85' stepping='0-4'/> <!-- 050654 --> + <decode host='on' guest='on'/> + <signature family='6' model='85'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -37,7 +45,6 @@ <feature name='mce'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -47,6 +54,7 @@ <feature name='pclmuldq'/> <feature name='pdpe1gb'/> <feature name='pge'/> + <feature name='pku'/> <feature name='pni'/> <feature name='popcnt'/> <feature name='pse'/> @@ -67,6 +75,7 @@ <feature name='tsc'/> <feature name='tsc-deadline'/> <feature name='vme'/> + <feature name='vmx-eptp-switching'/> <feature name='x2apic'/> <feature name='xgetbv1'/> <feature name='xsave'/> diff --git a/src/cpu_map/x86_Skylake-Server.xml b/src/cpu_map/x86_Skylake-Server.xml index e022d94c84..c7735929d3 100644 --- a/src/cpu_map/x86_Skylake-Server.xml +++ b/src/cpu_map/x86_Skylake-Server.xml @@ -1,7 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '4' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Xeon Processor (Skylake)' + 'version.version': '1' +--> <cpus> <model name='Skylake-Server'> <decode host='on' guest='on'/> - <signature family='6' model='85' stepping='0-4'/> <!-- 050654 --> + <signature family='6' model='85'/> <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='abm'/> @@ -19,6 +26,7 @@ <feature name='bmi1'/> <feature name='bmi2'/> <feature name='clflush'/> + <feature name='clflushopt'/> <feature name='clwb'/> <feature name='cmov'/> <feature name='cx16'/> @@ -38,7 +46,6 @@ <feature name='mce'/> <feature name='mmx'/> <feature name='movbe'/> - <feature name='mpx'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -48,6 +55,7 @@ <feature name='pclmuldq'/> <feature name='pdpe1gb'/> <feature name='pge'/> + <feature name='pku'/> <feature name='pni'/> <feature name='popcnt'/> <feature name='pse'/> diff --git a/src/cpu_map/x86_Snowridge.xml b/src/cpu_map/x86_Snowridge.xml new file mode 100644 index 0000000000..ad3fdc6dad --- /dev/null +++ b/src/cpu_map/x86_Snowridge.xml @@ -0,0 +1,79 @@ +<!-- extra info from qemu: + 'model.level': '27' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel Atom Processor (SnowRidge)' + 'version.version': '2' + 'property.model-id': 'Intel Atom Processor (Snowridge, no MPX)' +--> +<cpus> + <model name='Snowridge'> + <decode host='on' guest='on'/> + <signature family='6' model='134'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='arat'/> + <feature name='arch-capabilities'/> + <feature name='cldemote'/> + <feature name='clflush'/> + <feature name='clflushopt'/> + <feature name='clwb'/> + <feature name='cmov'/> + <feature name='core-capability'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='gfni'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='movdir64b'/> + <feature name='movdiri'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdrand'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sha-ni'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='spec-ctrl'/> + <feature name='split-lock-detect'/> + <feature name='ssbd'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='umip'/> + <feature name='vme'/> + <feature name='x2apic'/> + <feature name='xgetbv1'/> + <feature name='xsave'/> + <feature name='xsavec'/> + <feature name='xsaveopt'/> + </model> +</cpus> diff --git a/src/cpu_map/x86_Westmere-IBRS.xml b/src/cpu_map/x86_Westmere-IBRS.xml index c7898f0c22..2372df2241 100644 --- a/src/cpu_map/x86_Westmere-IBRS.xml +++ b/src/cpu_map/x86_Westmere-IBRS.xml @@ -1,10 +1,19 @@ +<!-- extra info from qemu: + 'model.level': '11' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Westmere E56xx/L56xx/X56xx (Nehalem-C)' + 'version.version': '2' + 'property.model-id': 'Westmere E56xx/L56xx/X56xx (IBRS update)' +--> <cpus> <model name='Westmere-IBRS'> <decode host='on' guest='on'/> - <signature family='6' model='44'/> <!-- 0206c0 --> + <signature family='6' model='44'/> <vendor name='Intel'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='clflush'/> <feature name='cmov'/> <feature name='cx16'/> @@ -22,6 +31,7 @@ <feature name='nx'/> <feature name='pae'/> <feature name='pat'/> + <feature name='pclmuldq'/> <feature name='pge'/> <feature name='pni'/> <feature name='popcnt'/> @@ -36,5 +46,6 @@ <feature name='ssse3'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_Westmere.xml b/src/cpu_map/x86_Westmere.xml index 16e4ad6c30..3d51f0ae34 100644 --- a/src/cpu_map/x86_Westmere.xml +++ b/src/cpu_map/x86_Westmere.xml @@ -1,12 +1,18 @@ +<!-- extra info from qemu: + 'model.level': '11' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Westmere E56xx/L56xx/X56xx (Nehalem-C)' + 'version.version': '1' +--> <cpus> <model name='Westmere'> <decode host='on' guest='on'/> - <signature family='6' model='44'/> <!-- 0206c0 --> - <signature family='6' model='47'/> <!-- 0206f0 --> - <signature family='6' model='37'/> <!-- 020650 --> + <signature family='6' model='44'/> <vendor name='Intel'/> <feature name='aes'/> <feature name='apic'/> + <feature name='arat'/> <feature name='clflush'/> <feature name='cmov'/> <feature name='cx16'/> @@ -24,6 +30,7 @@ <feature name='nx'/> <feature name='pae'/> <feature name='pat'/> + <feature name='pclmuldq'/> <feature name='pge'/> <feature name='pni'/> <feature name='popcnt'/> @@ -37,5 +44,6 @@ <feature name='ssse3'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_athlon.xml b/src/cpu_map/x86_athlon.xml index 81c43c81e8..2f762cfb14 100644 --- a/src/cpu_map/x86_athlon.xml +++ b/src/cpu_map/x86_athlon.xml @@ -1,6 +1,13 @@ +<!-- extra info from qemu: + 'model.level': '2' + 'model.stepping': '3' + 'model.xlevel': '0x80000008' + 'model.model_id': 'QEMU Virtual CPU version QEMU_HW_VERSION' +--> <cpus> <model name='athlon'> <decode host='on' guest='on'/> + <signature family='6' model='2'/> <vendor name='AMD'/> <feature name='3dnow'/> <feature name='3dnowext'/> @@ -10,6 +17,7 @@ <feature name='de'/> <feature name='fpu'/> <feature name='fxsr'/> + <feature name='mca'/> <feature name='mce'/> <feature name='mmx'/> <feature name='mmxext'/> diff --git a/src/cpu_map/x86_core2duo.xml b/src/cpu_map/x86_core2duo.xml index 412039fe55..9b2f0bdf82 100644 --- a/src/cpu_map/x86_core2duo.xml +++ b/src/cpu_map/x86_core2duo.xml @@ -1,19 +1,28 @@ +<!-- extra info from qemu: + 'model.level': '10' + 'model.stepping': '11' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz' +--> <cpus> <model name='core2duo'> <decode host='on' guest='on'/> + <signature family='6' model='15'/> <vendor name='Intel'/> + <feature name='acpi'/> <feature name='apic'/> <feature name='clflush'/> <feature name='cmov'/> + <feature name='cx16'/> <feature name='cx8'/> <feature name='de'/> <feature name='fpu'/> <feature name='fxsr'/> + <feature name='lahf_lm'/> <feature name='lm'/> <feature name='mca'/> <feature name='mce'/> <feature name='mmx'/> - <feature name='monitor'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -24,6 +33,7 @@ <feature name='pse'/> <feature name='pse36'/> <feature name='sep'/> + <feature name='ss'/> <feature name='sse'/> <feature name='sse2'/> <feature name='ssse3'/> diff --git a/src/cpu_map/x86_coreduo.xml b/src/cpu_map/x86_coreduo.xml index e2fda9a1d4..439e13f21f 100644 --- a/src/cpu_map/x86_coreduo.xml +++ b/src/cpu_map/x86_coreduo.xml @@ -1,7 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '10' + 'model.stepping': '8' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Genuine Intel(R) CPU T2600 @ 2.16GHz' +--> <cpus> <model name='coreduo'> <decode host='on' guest='on'/> + <signature family='6' model='14'/> <vendor name='Intel'/> + <feature name='acpi'/> <feature name='apic'/> <feature name='clflush'/> <feature name='cmov'/> @@ -12,7 +20,6 @@ <feature name='mca'/> <feature name='mce'/> <feature name='mmx'/> - <feature name='monitor'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -22,6 +29,7 @@ <feature name='pni'/> <feature name='pse'/> <feature name='sep'/> + <feature name='ss'/> <feature name='sse'/> <feature name='sse2'/> <feature name='tsc'/> diff --git a/src/cpu_map/x86_kvm32.xml b/src/cpu_map/x86_kvm32.xml index 9dd96d5b56..2b208b25eb 100644 --- a/src/cpu_map/x86_kvm32.xml +++ b/src/cpu_map/x86_kvm32.xml @@ -1,6 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '5' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Common 32-bit KVM processor' +--> <cpus> <model name='kvm32'> <decode host='on' guest='on'/> + <signature family='15' model='6'/> + <vendor name='Intel'/> <feature name='apic'/> <feature name='clflush'/> <feature name='cmov'/> @@ -23,5 +31,6 @@ <feature name='sse'/> <feature name='sse2'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_kvm64.xml b/src/cpu_map/x86_kvm64.xml index 185af06f78..6ebf590858 100644 --- a/src/cpu_map/x86_kvm64.xml +++ b/src/cpu_map/x86_kvm64.xml @@ -1,6 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '1' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Common KVM processor' +--> <cpus> <model name='kvm64'> <decode host='on' guest='on'/> + <signature family='15' model='6'/> + <vendor name='Intel'/> <feature name='apic'/> <feature name='clflush'/> <feature name='cmov'/> @@ -27,5 +35,6 @@ <feature name='sse2'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_n270.xml b/src/cpu_map/x86_n270.xml index 5507d2ea3b..28c26e8535 100644 --- a/src/cpu_map/x86_n270.xml +++ b/src/cpu_map/x86_n270.xml @@ -1,7 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '10' + 'model.stepping': '2' + 'model.xlevel': '0x80000008' + 'model.model_id': 'Intel(R) Atom(TM) CPU N270 @ 1.60GHz' +--> <cpus> <model name='n270'> <decode host='on' guest='on'/> + <signature family='6' model='28'/> <vendor name='Intel'/> + <feature name='acpi'/> <feature name='apic'/> <feature name='clflush'/> <feature name='cmov'/> @@ -9,10 +17,11 @@ <feature name='de'/> <feature name='fpu'/> <feature name='fxsr'/> + <feature name='lahf_lm'/> <feature name='mca'/> <feature name='mce'/> <feature name='mmx'/> - <feature name='monitor'/> + <feature name='movbe'/> <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> @@ -22,6 +31,7 @@ <feature name='pni'/> <feature name='pse'/> <feature name='sep'/> + <feature name='ss'/> <feature name='sse'/> <feature name='sse2'/> <feature name='ssse3'/> diff --git a/src/cpu_map/x86_pentium.xml b/src/cpu_map/x86_pentium.xml index f0a8982115..ce6cb1820d 100644 --- a/src/cpu_map/x86_pentium.xml +++ b/src/cpu_map/x86_pentium.xml @@ -1,6 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '1' + 'model.stepping': '3' + 'model.xlevel': '0' + 'model.model_id': '' +--> <cpus> <model name='pentium'> <decode host='on' guest='on'/> + <signature family='5' model='4'/> + <vendor name='Intel'/> + <feature name='apic'/> <feature name='cx8'/> <feature name='de'/> <feature name='fpu'/> diff --git a/src/cpu_map/x86_pentium2.xml b/src/cpu_map/x86_pentium2.xml index aeba082297..def4a5c3c9 100644 --- a/src/cpu_map/x86_pentium2.xml +++ b/src/cpu_map/x86_pentium2.xml @@ -1,6 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '2' + 'model.stepping': '2' + 'model.xlevel': '0' + 'model.model_id': '' +--> <cpus> <model name='pentium2'> <decode host='on' guest='on'/> + <signature family='6' model='5'/> + <vendor name='Intel'/> + <feature name='apic'/> <feature name='cmov'/> <feature name='cx8'/> <feature name='de'/> diff --git a/src/cpu_map/x86_pentium3.xml b/src/cpu_map/x86_pentium3.xml index ab85d2967f..715599b9a4 100644 --- a/src/cpu_map/x86_pentium3.xml +++ b/src/cpu_map/x86_pentium3.xml @@ -1,6 +1,15 @@ +<!-- extra info from qemu: + 'model.level': '3' + 'model.stepping': '3' + 'model.xlevel': '0' + 'model.model_id': '' +--> <cpus> <model name='pentium3'> <decode host='on' guest='on'/> + <signature family='6' model='7'/> + <vendor name='Intel'/> + <feature name='apic'/> <feature name='cmov'/> <feature name='cx8'/> <feature name='de'/> diff --git a/src/cpu_map/x86_phenom.xml b/src/cpu_map/x86_phenom.xml index f0f8ece57a..57b77803d7 100644 --- a/src/cpu_map/x86_phenom.xml +++ b/src/cpu_map/x86_phenom.xml @@ -1,37 +1,52 @@ +<!-- extra info from qemu: + 'model.level': '5' + 'model.stepping': '3' + 'model.xlevel': '0x8000001A' + 'model.model_id': 'AMD Phenom(tm) 9550 Quad-Core Processor' +--> <cpus> <model name='phenom'> <decode host='on' guest='on'/> + <signature family='16' model='2'/> <vendor name='AMD'/> <feature name='3dnow'/> <feature name='3dnowext'/> + <feature name='abm'/> <feature name='apic'/> <feature name='clflush'/> <feature name='cmov'/> + <feature name='cx16'/> <feature name='cx8'/> <feature name='de'/> <feature name='fpu'/> <feature name='fxsr'/> <feature name='fxsr_opt'/> + <feature name='lahf_lm'/> <feature name='lm'/> <feature name='mca'/> <feature name='mce'/> <feature name='mmx'/> <feature name='mmxext'/> - <feature name='monitor'/> <feature name='msr'/> <feature name='mtrr'/> + <feature name='npt'/> <feature name='nx'/> <feature name='pae'/> <feature name='pat'/> + <feature name='pdpe1gb'/> <feature name='pge'/> <feature name='pni'/> + <feature name='popcnt'/> <feature name='pse'/> <feature name='pse36'/> + <feature name='rdtscp'/> <feature name='sep'/> <feature name='sse'/> <feature name='sse2'/> + <feature name='sse4a'/> <feature name='svm'/> <feature name='syscall'/> <feature name='tsc'/> + <feature name='vme'/> </model> </cpus> diff --git a/src/cpu_map/x86_qemu32.xml b/src/cpu_map/x86_qemu32.xml index f3fb1959be..3d20add85e 100644 --- a/src/cpu_map/x86_qemu32.xml +++ b/src/cpu_map/x86_qemu32.xml @@ -1,6 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '4' + 'model.stepping': '3' + 'model.xlevel': '0x80000004' + 'model.model_id': 'QEMU Virtual CPU version QEMU_HW_VERSION' +--> <cpus> <model name='qemu32'> <decode host='on' guest='on'/> + <signature family='6' model='6'/> + <vendor name='Intel'/> <feature name='apic'/> <feature name='cmov'/> <feature name='cx8'/> diff --git a/src/cpu_map/x86_qemu64.xml b/src/cpu_map/x86_qemu64.xml index 0fe207a2b4..09c0c2a1f1 100644 --- a/src/cpu_map/x86_qemu64.xml +++ b/src/cpu_map/x86_qemu64.xml @@ -1,14 +1,14 @@ +<!-- extra info from qemu: + 'model.level': '0xd' + 'model.stepping': '3' + 'model.xlevel': '0x8000000A' + 'model.model_id': 'QEMU Virtual CPU version QEMU_HW_VERSION' +--> <cpus> <model name='qemu64'> <decode host='on' guest='on'/> - <!-- These are supported only by TCG. KVM supports them only if the - host does. So we leave them out: - - <feature name='abm'/> - <feature name='lahf_lm'/> - <feature name='popcnt'/> - <feature name='sse4a'/> - --> + <signature family='6' model='6'/> + <vendor name='AMD'/> <feature name='apic'/> <feature name='clflush'/> <feature name='cmov'/> @@ -17,6 +17,7 @@ <feature name='de'/> <feature name='fpu'/> <feature name='fxsr'/> + <feature name='lahf_lm'/> <feature name='lm'/> <feature name='mca'/> <feature name='mce'/> -- 2.26.2