[libvirt] [PATCH 00/20] cpu_map.xml: Make CPU definitions easier to review
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch with a sorted list of features. Jiri Denemark (20): cpu_map.xml: Sort features in x86 CPU models cpu_map.xml: Expand 486 CPU model cpu_map.xml: Expand pentium CPU model cpu_map.xml: Expand pentium2 CPU model cpu_map.xml: Expand pentiumpro CPU model cpu_map.xml: Expand coreduo CPU model cpu_map.xml: Expand n270 CPU model cpu_map.xml: Expand qemu32 CPU model cpu_map.xml: Expand kvm32 CPU model cpu_map.xml: Expand cpu64-rhel5 CPU model cpu_map.xml: Expand kvm64 CPU model cpu_map.xml: Expand Conroe CPU model cpu_map.xml: Expand Penryn CPU model cpu_map.xml: Expand Nehalem CPU model cpu_map.xml: Expand Westmere CPU model cpu_map.xml: Expand SandyBridge CPU model cpu_map.xml: Expand Haswell-noTSX CPU model cpu_map.xml: Expand Opteron_G1 CPU model cpu_map.xml: Expand Opteron_G2 CPU model cpu_map.xml: Expand Opteron_G4 CPU model src/cpu/cpu_map.xml | 829 +++++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 729 insertions(+), 100 deletions(-) -- 2.4.4
Sorted feature list is easier to review or compare. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 146 ++++++++++++++++++++++++++-------------------------- 1 file changed, 73 insertions(+), 73 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 2110c0b..7c411fc 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -335,32 +335,32 @@ <!-- models --> <model name='486'> <feature name='fpu'/> - <feature name='vme'/> <feature name='pse'/> + <feature name='vme'/> </model> <!-- Intel-based QEMU generic CPU models --> <model name='pentium'> <model name='486'/> + <feature name='cx8'/> <feature name='de'/> - <feature name='tsc'/> - <feature name='msr'/> <feature name='mce'/> - <feature name='cx8'/> <feature name='mmx'/> + <feature name='msr'/> + <feature name='tsc'/> </model> <model name='pentium2'> <model name='pentium'/> - <feature name='pae'/> - <feature name='sep'/> - <feature name='mtrr'/> - <feature name='pge'/> - <feature name='mca'/> <feature name='cmov'/> + <feature name='fxsr'/> + <feature name='mca'/> + <feature name='mtrr'/> + <feature name='pae'/> <feature name='pat'/> + <feature name='pge'/> <feature name='pse36'/> - <feature name='fxsr'/> + <feature name='sep'/> </model> <model name='pentium3'> @@ -369,35 +369,35 @@ </model> <model name='pentiumpro'> - <feature name='fpu'/> - <feature name='de'/> - <feature name='pse'/> - <feature name='tsc'/> - <feature name='msr'/> - <feature name='pae'/> - <feature name='mce'/> - <feature name='cx8'/> <feature name='apic'/> - <feature name='sep'/> - <feature name='pge'/> <feature name='cmov'/> - <feature name='pat'/> - <feature name='mmx'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> <feature name='fxsr'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pse'/> + <feature name='sep'/> <feature name='sse'/> <feature name='sse2'/> + <feature name='tsc'/> </model> <model name='coreduo'> <model name='pentiumpro'/> <vendor name='Intel'/> - <feature name='vme'/> - <feature name='mtrr'/> - <feature name='mca'/> <feature name='clflush'/> - <feature name='pni'/> + <feature name='mca'/> <feature name='monitor'/> + <feature name='mtrr'/> <feature name='nx'/> + <feature name='pni'/> + <feature name='vme'/> </model> <model name='n270'> @@ -407,9 +407,9 @@ <model name='core2duo'> <model name='n270'/> + <feature name='lm'/> <feature name='pse36'/> <feature name='syscall'/> - <feature name='lm'/> </model> <!-- Generic QEMU CPU models --> @@ -420,17 +420,17 @@ <model name='kvm32'> <model name='qemu32'/> - <feature name='mtrr'/> + <feature name='clflush'/> <feature name='mca'/> + <feature name='mtrr'/> <feature name='pse36'/> - <feature name='clflush'/> </model> <model name='cpu64-rhel5'> <model name='kvm32'/> - <feature name='syscall'/> - <feature name='nx'/> <feature name='lm'/> + <feature name='nx'/> + <feature name='syscall'/> </model> <model name='cpu64-rhel6'> @@ -449,10 +449,10 @@ <!-- These are supported only by TCG. KVM supports them only if the host does. So we leave them out: - <feature name='popcnt'/> + <feature name='abm'/> <feature name='lahf_lm'/> + <feature name='popcnt'/> <feature name='sse4a'/> - <feature name='abm'/> --> <feature name='svm'/> </model> @@ -461,16 +461,16 @@ <model name='Conroe'> <model name='pentiumpro'/> <vendor name='Intel'/> - <feature name='mtrr'/> - <feature name='mca'/> - <feature name='pse36'/> <feature name='clflush'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mtrr'/> + <feature name='nx'/> <feature name='pni'/> + <feature name='pse36'/> <feature name='ssse3'/> <feature name='syscall'/> - <feature name='nx'/> - <feature name='lm'/> - <feature name='lahf_lm'/> </model> <model name='Penryn'> @@ -481,8 +481,8 @@ <model name='Nehalem'> <model name='Penryn'/> - <feature name='sse4.2'/> <feature name='popcnt'/> + <feature name='sse4.2'/> </model> <model name='Westmere'> @@ -492,26 +492,26 @@ <model name='SandyBridge'> <model name='Westmere'/> + <feature name='avx'/> <feature name='pclmuldq'/> - <feature name='x2apic'/> + <feature name='rdtscp'/> <feature name='tsc-deadline'/> + <feature name='x2apic'/> <feature name='xsave'/> - <feature name='avx'/> - <feature name='rdtscp'/> </model> <model name='Haswell-noTSX'> <model name='SandyBridge'/> - <feature name='fma'/> - <feature name='pcid'/> - <feature name='movbe'/> - <feature name='fsgsbase'/> - <feature name='bmi1'/> <feature name='avx2'/> - <feature name='smep'/> + <feature name='bmi1'/> <feature name='bmi2'/> <feature name='erms'/> + <feature name='fma'/> + <feature name='fsgsbase'/> <feature name='invpcid'/> + <feature name='movbe'/> + <feature name='pcid'/> + <feature name='smep'/> </model> <model name='Haswell'> @@ -523,8 +523,8 @@ <model name='Broadwell-noTSX'> <model name='Haswell-noTSX'/> <feature name='3dnowprefetch'/> - <feature name='rdseed'/> <feature name='adx'/> + <feature name='rdseed'/> <feature name='smap'/> </model> @@ -538,22 +538,22 @@ <model name='athlon'> <model name='pentiumpro'/> <vendor name='AMD'/> - <feature name='vme'/> + <feature name='3dnow'/> + <feature name='3dnowext'/> + <feature name='mmxext'/> <feature name='mtrr'/> <feature name='pse36'/> - <feature name='mmxext'/> - <feature name='3dnowext'/> - <feature name='3dnow'/> + <feature name='vme'/> </model> <model name='phenom'> <model name='cpu64-rhel5'/> <vendor name='AMD'/> - <feature name='monitor'/> - <feature name='mmxext'/> + <feature name='3dnow'/> + <feature name='3dnowext'/> <feature name='fxsr_opt'/> - <feature name='3dnowext'/> - <feature name='3dnow'/> + <feature name='mmxext'/> + <feature name='monitor'/> <feature name='svm'/> </model> @@ -565,39 +565,39 @@ <model name='Opteron_G2'> <model name='Opteron_G1'/> <feature name='cx16'/> - <feature name='rdtscp'/> <feature name='lahf_lm'/> + <feature name='rdtscp'/> <feature name='svm'/> </model> <model name='Opteron_G3'> <model name='Opteron_G2'/> + <feature name='abm'/> + <feature name='misalignsse'/> <feature name='monitor'/> <feature name='popcnt'/> - <feature name='abm'/> <feature name='sse4a'/> - <feature name='misalignsse'/> </model> <model name='Opteron_G4'> <model name='Opteron_G2'/> <!-- Can't inherit from G3 because of missing "monitor" feature --> - <feature name='pclmuldq'/> - <feature name='ssse3'/> - <feature name='sse4.1'/> - <feature name='sse4.2'/> - <feature name='popcnt'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> <feature name='aes'/> - <feature name='xsave'/> <feature name='avx'/> + <feature name='fma4'/> + <feature name='misalignsse'/> + <feature name='pclmuldq'/> <feature name='pdpe1gb'/> - <feature name='abm'/> + <feature name='popcnt'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> <feature name='sse4a'/> - <feature name='misalignsse'/> - <feature name='3dnowprefetch'/> + <feature name='ssse3'/> <feature name='xop'/> - <feature name='fma4'/> + <feature name='xsave'/> </model> <model name='Opteron_G5'> @@ -607,6 +607,7 @@ <feature name='tbm'/> </model> </arch> + <arch name='ppc64'> <!-- vendor definitions --> <vendor name='IBM'/> @@ -668,7 +669,7 @@ <pvr value='0x004d0000'/> </model> -<!-- Freescale-based CPU models --> + <!-- Freescale-based CPU models --> <model name='POWERPC_e5500'> <vendor name='Freescale'/> <pvr value='0x80240000'/> @@ -678,6 +679,5 @@ <vendor name='Freescale'/> <pvr value='0x80400000'/> </model> - </arch> </cpus> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:00 +0200, Jiri Denemark wrote:
Sorted feature list is easier to review or compare.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 146 ++++++++++++++++++++++++++-------------------------- 1 file changed, 73 insertions(+), 73 deletions(-)
@@ -607,6 +607,7 @@ <feature name='tbm'/> </model> </arch> + <arch name='ppc64'> <!-- vendor definitions --> <vendor name='IBM'/> @@ -668,7 +669,7 @@ <pvr value='0x004d0000'/> </model>
-<!-- Freescale-based CPU models --> + <!-- Freescale-based CPU models --> <model name='POWERPC_e5500'> <vendor name='Freescale'/> <pvr value='0x80240000'/> @@ -678,6 +679,5 @@ <vendor name='Freescale'/> <pvr value='0x80400000'/> </model> - </arch> </cpus>
The three hunks above are not exactly relevant to this patch but neither they are worth to be separated probably. ACK with or without the cleanup moved separately. Peter
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 7c411fc..7b1ee6a 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -341,13 +341,15 @@ <!-- Intel-based QEMU generic CPU models --> <model name='pentium'> - <model name='486'/> <feature name='cx8'/> <feature name='de'/> + <feature name='fpu'/> <feature name='mce'/> <feature name='mmx'/> <feature name='msr'/> + <feature name='pse'/> <feature name='tsc'/> + <feature name='vme'/> </model> <model name='pentium2'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:01 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
ACK, Peter
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 7b1ee6a..c21c7e0 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -353,16 +353,24 @@ </model> <model name='pentium2'> - <model name='pentium'/> <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> <feature name='fxsr'/> <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> <feature name='mtrr'/> <feature name='pae'/> <feature name='pat'/> <feature name='pge'/> + <feature name='pse'/> <feature name='pse36'/> <feature name='sep'/> + <feature name='tsc'/> + <feature name='vme'/> </model> <model name='pentium3'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:02 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
ACK, Peter
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index c21c7e0..22c7928 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -374,8 +374,25 @@ </model> <model name='pentium3'> - <model name='pentium2'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> <feature name='sse'/> + <feature name='tsc'/> + <feature name='vme'/> </model> <model name='pentiumpro'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:03 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 68 insertions(+), 4 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 22c7928..af2d96e 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -416,14 +416,30 @@ </model> <model name='coreduo'> - <model name='pentiumpro'/> <vendor name='Intel'/> + <feature name='apic'/> <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> <feature name='monitor'/> + <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> <feature name='pni'/> + <feature name='pse'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='tsc'/> <feature name='vme'/> </model> @@ -441,8 +457,24 @@ <!-- Generic QEMU CPU models --> <model name='qemu32'> - <model name='pentiumpro'/> + <feature name='apic'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> <feature name='pni'/> + <feature name='pse'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='tsc'/> </model> <model name='kvm32'> @@ -486,18 +518,34 @@ <!-- Intel CPU models --> <model name='Conroe'> - <model name='pentiumpro'/> <vendor name='Intel'/> + <feature name='apic'/> <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> <feature name='lahf_lm'/> <feature name='lm'/> <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> <feature name='mtrr'/> <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> <feature name='pni'/> + <feature name='pse'/> <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> <feature name='ssse3'/> <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='Penryn'> @@ -563,13 +611,29 @@ <!-- AMD CPUs --> <model name='athlon'> - <model name='pentiumpro'/> <vendor name='AMD'/> <feature name='3dnow'/> <feature name='3dnowext'/> + <feature name='apic'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mce'/> + <feature name='mmx'/> <feature name='mmxext'/> + <feature name='msr'/> <feature name='mtrr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pse'/> <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='tsc'/> <feature name='vme'/> </model> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:04 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 68 insertions(+), 4 deletions(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index af2d96e..495e11e 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -444,8 +444,32 @@ </model> <model name='n270'> - <model name='coreduo'/> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='monitor'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> <feature name='ssse3'/> + <feature name='tsc'/> + <feature name='vme'/> </model> <model name='core2duo'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:05 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 495e11e..1ad6687 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -473,10 +473,35 @@ </model> <model name='core2duo'> - <model name='n270'/> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='monitor'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='ssse3'/> <feature name='syscall'/> + <feature name='tsc'/> + <feature name='vme'/> </model> <!-- Generic QEMU CPU models --> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:06 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 1ad6687..b3d7d14 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -527,11 +527,28 @@ </model> <model name='kvm32'> - <model name='qemu32'/> + <feature name='apic'/> <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> <feature name='mtrr'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='tsc'/> </model> <model name='cpu64-rhel5'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:07 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index b3d7d14..1114c0c 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -552,10 +552,31 @@ </model> <model name='cpu64-rhel5'> - <model name='kvm32'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='cpu64-rhel6'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:08 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 104 ++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 100 insertions(+), 4 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 1114c0c..5e7534f 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -580,14 +580,62 @@ </model> <model name='cpu64-rhel6'> - <model name='cpu64-rhel5'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='kvm64'> - <model name='cpu64-rhel5'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='qemu64'> @@ -725,19 +773,67 @@ </model> <model name='phenom'> - <model name='cpu64-rhel5'/> <vendor name='AMD'/> <feature name='3dnow'/> <feature name='3dnowext'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> <feature name='fxsr_opt'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> <feature name='mmxext'/> <feature name='monitor'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='Opteron_G1'> - <model name='cpu64-rhel5'/> <vendor name='AMD'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='Opteron_G2'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:09 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 104 ++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 100 insertions(+), 4 deletions(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 5e7534f..6cdd97c 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -639,7 +639,6 @@ </model> <model name='qemu64'> - <model name='kvm64'/> <!-- These are supported only by TCG. KVM supports them only if the host does. So we leave them out: @@ -648,7 +647,33 @@ <feature name='popcnt'/> <feature name='sse4a'/> --> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <!-- Intel CPU models --> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:10 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 6cdd97c..73b0d8d 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -709,9 +709,36 @@ </model> <model name='Penryn'> - <model name='Conroe'/> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> <feature name='sse4.1'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='Nehalem'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:11 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 73b0d8d..66cf2ee 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -742,9 +742,38 @@ </model> <model name='Nehalem'> - <model name='Penryn'/> + <vendor name='Intel'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='Westmere'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:12 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 66cf2ee..a441a71 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -777,8 +777,39 @@ </model> <model name='Westmere'> - <model name='Nehalem'/> + <vendor name='Intel'/> <feature name='aes'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='SandyBridge'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:13 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index a441a71..71235bc 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -813,10 +813,42 @@ </model> <model name='SandyBridge'> - <model name='Westmere'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> <feature name='tsc-deadline'/> <feature name='x2apic'/> <feature name='xsave'/> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:14 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 40 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 71235bc..7e9dedf 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -855,17 +855,55 @@ </model> <model name='Haswell-noTSX'> - <model name='SandyBridge'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> <feature name='avx2'/> <feature name='bmi1'/> <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> <feature name='erms'/> <feature name='fma'/> + <feature name='fpu'/> <feature name='fsgsbase'/> + <feature name='fxsr'/> <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> </model> <model name='Haswell'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:15 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 40 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 50 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 7e9dedf..e6762f6 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -913,11 +913,59 @@ </model> <model name='Broadwell-noTSX'> - <model name='Haswell-noTSX'/> + <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> </model> <model name='Broadwell'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:16 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 50 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-)
ACK
On Thu, Jul 02, 2015 at 09:26:11 +0200, Peter Krempa wrote:
On Fri, Jun 26, 2015 at 15:17:16 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 50 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-)
ACK
Actually either the commit message or your intention is wrong since this patch does not expand <model name='Haswell'> which inherits from <model name='Haswell-noTSX'/>. So the ACK is retracted. Peter
On Thu, Jul 02, 2015 at 09:31:19 +0200, Peter Krempa wrote:
On Thu, Jul 02, 2015 at 09:26:11 +0200, Peter Krempa wrote:
On Fri, Jun 26, 2015 at 15:17:16 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 50 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-)
ACK
Actually either the commit message or your intention is wrong since this patch does not expand <model name='Haswell'> which inherits from <model name='Haswell-noTSX'/>. So the ACK is retracted.
It is intentional, although I forgot to mention it in the commit message. Haswell{,-noTSX} are basically just different revisions of the same CPU so it kind of makes sense to keep on of them reference the other one. On the other hand, it still makes comparing models harder so I will send a v2 which will expand everything. Jirka
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- Notes: Version 2: - expand all instances of Haswell-noTSX src/cpu/cpu_map.xml | 100 ++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 98 insertions(+), 2 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 7e9dedf..9f86891 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -907,17 +907,113 @@ </model> <model name='Haswell'> - <model name='Haswell-noTSX'/> + <vendor name='Intel'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> <feature name='rtm'/> + <feature name='sep'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> </model> <model name='Broadwell-noTSX'> - <model name='Haswell-noTSX'/> + <vendor name='Intel'/> <feature name='3dnowprefetch'/> <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> <feature name='rdseed'/> + <feature name='rdtscp'/> + <feature name='sep'/> <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> </model> <model name='Broadwell'> -- 2.4.5
On Thu, Jul 02, 2015 at 10:20:43 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> ---
Notes: Version 2: - expand all instances of Haswell-noTSX
src/cpu/cpu_map.xml | 100 ++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 98 insertions(+), 2 deletions(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index e6762f6..ab4ce6e 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1067,11 +1067,36 @@ </model> <model name='Opteron_G2'> - <model name='Opteron_G1'/> + <vendor name='AMD'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='pse'/> + <feature name='pse36'/> <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='Opteron_G3'> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:17 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 64 +++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 60 insertions(+), 4 deletions(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index ab4ce6e..2efe393 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1100,31 +1100,87 @@ </model> <model name='Opteron_G3'> - <model name='Opteron_G2'/> + <vendor name='AMD'/> <feature name='abm'/> + <feature name='apic'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> <feature name='misalignsse'/> + <feature name='mmx'/> <feature name='monitor'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pge'/> + <feature name='pni'/> <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> <feature name='sse4a'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> </model> <model name='Opteron_G4'> - <model name='Opteron_G2'/> - <!-- Can't inherit from G3 because of missing "monitor" - feature --> + <vendor name='AMD'/> <feature name='3dnowprefetch'/> <feature name='abm'/> <feature name='aes'/> + <feature name='apic'/> <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> <feature name='fma4'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> <feature name='misalignsse'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> <feature name='pclmuldq'/> <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> <feature name='sse4.1'/> <feature name='sse4.2'/> <feature name='sse4a'/> <feature name='ssse3'/> + <feature name='svm'/> + <feature name='syscall'/> + <feature name='tsc'/> <feature name='xop'/> <feature name='xsave'/> </model> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:18 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 64 +++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 60 insertions(+), 4 deletions(-)
ACK
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 46 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 2efe393..c55cbb5 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1186,10 +1186,54 @@ </model> <model name='Opteron_G5'> - <model name='Opteron_G4'/> + <vendor name='AMD'/> + <feature name='3dnowprefetch'/> + <feature name='abm'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> <feature name='f16c'/> <feature name='fma'/> + <feature name='fma4'/> + <feature name='fpu'/> + <feature name='fxsr'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='misalignsse'/> + <feature name='mmx'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pclmuldq'/> + <feature name='pdpe1gb'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdtscp'/> + <feature name='sep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='sse4a'/> + <feature name='ssse3'/> + <feature name='svm'/> + <feature name='syscall'/> <feature name='tbm'/> + <feature name='tsc'/> + <feature name='xop'/> + <feature name='xsave'/> </model> </arch> -- 2.4.4
On Fri, Jun 26, 2015 at 15:17:19 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_map.xml | 46 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-)
ACK
On Fri, Jun 26, 2015 at 03:16:59PM +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch with a sorted list of features.
Just to be clear, you are not making any functional changes in any of the patches here, are you ? This is just re-arranging code lines not adding any (previously missing) features. Regards, Daniel -- |: http://berrange.com -o- http://www.flickr.com/photos/dberrange/ :| |: http://libvirt.org -o- http://virt-manager.org :| |: http://autobuild.org -o- http://search.cpan.org/~danberr/ :| |: http://entangle-photo.org -o- http://live.gnome.org/gtk-vnc :|
On Fri, Jun 26, 2015 at 15:05:28 +0100, Daniel P. Berrange wrote:
On Fri, Jun 26, 2015 at 03:16:59PM +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch with a sorted list of features.
Just to be clear, you are not making any functional changes in any of the patches here, are you ? This is just re-arranging code lines not adding any (previously missing) features.
Yeah, that was the intent. Unless I screwed up something :-) Jirka
On Fri, Jun 26, 2015 at 15:16:59 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch with a sorted list of features.
Additionally to the one missing expansion in one of the patches that I've pointed out, this series is also missing expansion of the Broadwell-noTSX model into the Broadwell model. Peter
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- Notes: Version 2: - new patch src/cpu/cpu_map.xml | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 9f86891..2fedf05 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1017,9 +1017,61 @@ </model> <model name='Broadwell'> - <model name='Broadwell-noTSX'/> + <vendor name='Intel'/> + <feature name='3dnowprefetch'/> + <feature name='adx'/> + <feature name='aes'/> + <feature name='apic'/> + <feature name='avx'/> + <feature name='avx2'/> + <feature name='bmi1'/> + <feature name='bmi2'/> + <feature name='clflush'/> + <feature name='cmov'/> + <feature name='cx16'/> + <feature name='cx8'/> + <feature name='de'/> + <feature name='erms'/> + <feature name='fma'/> + <feature name='fpu'/> + <feature name='fsgsbase'/> + <feature name='fxsr'/> <feature name='hle'/> + <feature name='invpcid'/> + <feature name='lahf_lm'/> + <feature name='lm'/> + <feature name='mca'/> + <feature name='mce'/> + <feature name='mmx'/> + <feature name='movbe'/> + <feature name='msr'/> + <feature name='mtrr'/> + <feature name='nx'/> + <feature name='pae'/> + <feature name='pat'/> + <feature name='pcid'/> + <feature name='pclmuldq'/> + <feature name='pge'/> + <feature name='pni'/> + <feature name='popcnt'/> + <feature name='pse'/> + <feature name='pse36'/> + <feature name='rdseed'/> + <feature name='rdtscp'/> <feature name='rtm'/> + <feature name='sep'/> + <feature name='smap'/> + <feature name='smep'/> + <feature name='sse'/> + <feature name='sse2'/> + <feature name='sse4.1'/> + <feature name='sse4.2'/> + <feature name='ssse3'/> + <feature name='syscall'/> + <feature name='tsc'/> + <feature name='tsc-deadline'/> + <feature name='x2apic'/> + <feature name='xsave'/> </model> <!-- AMD CPUs --> -- 2.4.5
On Thu, Jul 02, 2015 at 10:21:09 +0200, Jiri Denemark wrote:
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> ---
Notes: Version 2: - new patch
src/cpu/cpu_map.xml | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-)
ACK
participants (3)
-
Daniel P. Berrange -
Jiri Denemark -
Peter Krempa