On Tue, 4 Feb 2025 at 09:57, Daniel P. Berrangé <berrange(a)redhat.com> wrote:
On Tue, Feb 04, 2025 at 10:51:04AM +0100, Philippe Mathieu-Daudé wrote:
> On 4/2/25 10:22, Peter Maydell wrote:
> > On Tue, 4 Feb 2025 at 00:23, Philippe Mathieu-Daudé <philmd(a)linaro.org>
wrote:
> > >
> > > All previous raspi machines can be created using the
> > > generic machine. Deprecate the old names to maintain
> > > a single one. Update the tests.
> > >
> > > Signed-off-by: Philippe Mathieu-Daudé <philmd(a)linaro.org>
> >
> > > diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
> > > index 4a3c302962a..c9a11a52f78 100644
> > > --- a/docs/about/deprecated.rst
> > > +++ b/docs/about/deprecated.rst
> > > @@ -257,6 +257,19 @@ Big-Endian variants of MicroBlaze ``petalogix-ml605``
and ``xlnx-zynqmp-pmu`` ma
> > > Both ``petalogix-ml605`` and ``xlnx-zynqmp-pmu`` were added for little
endian
> > > CPUs. Big endian support is not tested.
> > >
> > > +ARM ``raspi0``, ``raspi1ap``, ``raspi2b``, ``raspi3ap``, ``raspi3b`` and
``raspi4b`` machines (since 10.0)
> > >
+''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
> > > +
> > > +The Raspberry Pi machines have been unified under the generic ``raspi``
machine,
> > > +which takes the model as argument.
> > > +
> > > + - `raspi0`` is now an alias for ``raspi,model=Zero``
> > > + - `raspi1ap`` is now an alias for ``raspi,model=1A+``
> > > + - `raspi2b`` is now an alias for ``raspi,model=2B``
> > > + - `raspi3ap`` is now an alias for ``raspi,model=3A+``
> > > + - `raspi3b`` is now an alias for ``raspi,model=3B``
> > > + - `raspi4b`` is now an alias for ``raspi,model=4B``
> >
> > This is not how we typically handle "we have a bunch
> > of different devboards in one family". What's wrong with the
> > existing set of machine names?
>
> Zoltan and you don't want to add more machine names, then you
> don't want a generic machine. This is very confusing.
IMHO we can have distinct machines for each model, but
*NOT* have further machines for each RAM size within a
model.
Yes, this was what I was intending to suggest. Apologies
if I was confusing with what I said the previous time round.
thanks
-- PMM