Re: [libvirt] [PATCH 2/2] cpu: Add new EPYC CPU model

On Wed, Sep 06, 2017 at 02:08:01PM +0200, Jiri Denemark wrote: > From: Brijesh Singh <brijesh.singh(a)amd.com&gt; > > Add a new CPU model called 'EPYC' to model processors from AMD EPYC > family (which includes EPYC 76xx,75xx,74xx, 73xx and 72xx). > > The following features bits have been added/removed compare to Opteron_G5 > > Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw, > fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap, clfshopt, sha > xsaveopt, xsavec, xgetbv1, arat > > Removed: xop, fma4, tbm > > The patch is depend on EPYC CPU model supported introduced in qemu [1] > > [1] https://patchwork.kernel.org/patch/9902205/ > > Cc: Tom Lendacky <Thomas.Lendacky(a)amd.com&gt; > Signed-off-by: Brijesh Singh <brijesh.singh(a)amd.com&gt; > Signed-off-by: Jiri Denemark <jdenemar(a)redhat.com&gt; The first patch adds CPUID data for Ryzen CPU model but this patch introduced EPYC CPU model. It would be probably worth to get CPUID data for EPYC and introduce Ryzen CPU model as well. Another question is whether we should named it "Zen" instead of EPYC since EPYC and Ryzen are CPU models like Intel Core or Xeon. For Intel we use the architecture name which is "Skylake" for example. In the past we used CPU model names for AMD, Opteron_G5 for example, but from consistency POW it should have been "Piledriver" and Opteron_G4 should have been "Bulldozer".