[PATCH v2 00/36] Add support for versioned CPU models

Each CPU model with -v* suffix is defined as a standalone model copying all attributes of the previous version although CPU model versions with an alias are handled differently. The full definition is used for the alias and the versioned model is created as an identical copy of the alias. To avoid breaking migration compatibility of host-model CPUs all versioned models are marked with <decode guest='off'/> so that they are ignored when selecting candidates for host-model. It's not ideal but not doing so would break almost all host-model CPUs as the new versioned CPU models have all vmx-* features included since their introduction while existing CPU models were updated later. This meas existing models would be accompanied with a long list of vmx-* features to properly describe a host CPU while the newly added CPU models would have those features enabled implicitly and their list of features would be significantly shorter. Thus the new models would always be better candidates for host-model than the existing models. Version 2: - removed patches - cpu_x86: Copy added and removed features from ancestor - qemu: Canonicalize CPU models - new patches - cpu_x86: Annotate virCPUx86Model fields - cpu_x86: Promote added/removed from ancestor - cpu_x86: Record relations between CPU models - cpu: Introduce virCPUGetCanonicalModel - domain_capabilities: Report canonical names of CPU models - cpu_map: Add Denverton CPU model - cpu_map: Add KnightsMill CPU model - make -v? variants linked to their corresponding non-versioned models (such as -noTSX, -IBRS, etc.) - all -v? variants are marked with <decode host='on' guest='off'/> - do not add absolute path to CPU model XMLs to index.xml - use <group name='...'> for all groups rather than a strange mix of <group name='...'> and <group vendor='...'> Jiri Denemark (36): cpu_x86: Annotate virCPUx86Model fields cpu_x86: Promote added/removed from ancestor sync_qemu_features_i386: Add some removed features back sync_qemu_models_i386: Use f-strings sync_qemu_models_i386: Do not overwrite existing models sync_qemu_models_i386: Do not require full path to QEMU's cpu.c sync_qemu_models_i386: Add support for versioned CPU models sync_qemu_models_i386: Store extra info in a separate file sync_qemu_models_i386: Switch to lxml cpu_map: Properly group models in index.xml sync_qemu_models_i386: Update index.xml sync_qemu_models_i386: Copy signatures from base model cpu_x86: Record relations between CPU models cpu: Introduce virCPUGetCanonicalModel domain_capabilities: Report canonical names of CPU models cpu_map: Add versions of SierraForest CPU model cpu_map: Add versions of GraniteRapids CPU model cpu_map: Add versions of SapphireRapids CPU model cpu_map: Add versions of Snowridge CPU model cpu_map: Add versions of Cooperlake CPU model cpu_map: Add versions of Icelake-Server CPU model cpu_map: Add versions of Cascadelake-Server CPU model cpu_map: Add versions of Skylake-Server CPU model cpu_map: Add versions of Skylake-Client CPU model cpu_map: Add versions of Broadwell CPU model cpu_map: Add versions of Haswell CPU model cpu_map: Add versions of IvyBridge CPU model cpu_map: Add versions of SandyBridge CPU model cpu_map: Add versions of Westmere CPU model cpu_map: Add versions of Nehalem CPU model cpu_map: Add versions of EPYC-Milan CPU model cpu_map: Add versions of EPYC-Rome CPU model cpu_map: Add versions of EPYC CPU model cpu_map: Add versions of Dhyana CPU model cpu_map: Add Denverton CPU model cpu_map: Add KnightsMill CPU model docs/formatdomaincaps.rst | 8 +- src/conf/domain_capabilities.c | 11 +- src/conf/domain_capabilities.h | 4 +- src/cpu/cpu.c | 25 + src/cpu/cpu.h | 8 + src/cpu/cpu_map.c | 2 +- src/cpu/cpu_x86.c | 88 +- src/cpu_map/index.xml | 291 ++-- src/cpu_map/meson.build | 60 + src/cpu_map/sync_qemu_features_i386.py | 3 + src/cpu_map/sync_qemu_models_i386.py | 184 +- src/cpu_map/x86_Broadwell-v1.xml | 6 + src/cpu_map/x86_Broadwell-v2.xml | 6 + src/cpu_map/x86_Broadwell-v3.xml | 6 + src/cpu_map/x86_Broadwell-v4.xml | 6 + src/cpu_map/x86_Cascadelake-Server-v1.xml | 6 + src/cpu_map/x86_Cascadelake-Server-v2.xml | 157 ++ src/cpu_map/x86_Cascadelake-Server-v3.xml | 6 + src/cpu_map/x86_Cascadelake-Server-v4.xml | 156 ++ src/cpu_map/x86_Cascadelake-Server-v5.xml | 158 ++ src/cpu_map/x86_Cooperlake-v1.xml | 6 + src/cpu_map/x86_Cooperlake-v2.xml | 164 ++ src/cpu_map/x86_Denverton-v1.xml | 6 + src/cpu_map/x86_Denverton-v2.xml | 137 ++ src/cpu_map/x86_Denverton-v3.xml | 139 ++ src/cpu_map/x86_Denverton.xml | 138 ++ src/cpu_map/x86_Dhyana-v1.xml | 6 + src/cpu_map/x86_Dhyana-v2.xml | 73 + src/cpu_map/x86_EPYC-Milan-v1.xml | 6 + src/cpu_map/x86_EPYC-Milan-v2.xml | 99 ++ src/cpu_map/x86_EPYC-Rome-v1.xml | 6 + src/cpu_map/x86_EPYC-Rome-v2.xml | 86 + src/cpu_map/x86_EPYC-Rome-v3.xml | 86 + src/cpu_map/x86_EPYC-Rome-v4.xml | 85 + src/cpu_map/x86_EPYC-v1.xml | 6 + src/cpu_map/x86_EPYC-v2.xml | 6 + src/cpu_map/x86_EPYC-v3.xml | 79 + src/cpu_map/x86_EPYC-v4.xml | 79 + src/cpu_map/x86_GraniteRapids-v1.xml | 6 + src/cpu_map/x86_Haswell-v1.xml | 6 + src/cpu_map/x86_Haswell-v2.xml | 6 + src/cpu_map/x86_Haswell-v3.xml | 6 + src/cpu_map/x86_Haswell-v4.xml | 6 + src/cpu_map/x86_Icelake-Server-v1.xml | 6 + src/cpu_map/x86_Icelake-Server-v2.xml | 6 + src/cpu_map/x86_Icelake-Server-v3.xml | 165 ++ src/cpu_map/x86_Icelake-Server-v4.xml | 172 ++ src/cpu_map/x86_Icelake-Server-v5.xml | 174 ++ src/cpu_map/x86_Icelake-Server-v6.xml | 175 ++ src/cpu_map/x86_Icelake-Server-v7.xml | 177 ++ src/cpu_map/x86_IvyBridge-v1.xml | 6 + src/cpu_map/x86_IvyBridge-v2.xml | 6 + src/cpu_map/x86_KnightsMill.xml | 71 + src/cpu_map/x86_Nehalem-v1.xml | 6 + src/cpu_map/x86_Nehalem-v2.xml | 6 + src/cpu_map/x86_SandyBridge-v1.xml | 6 + src/cpu_map/x86_SandyBridge-v2.xml | 6 + src/cpu_map/x86_SapphireRapids-v1.xml | 6 + src/cpu_map/x86_SapphireRapids-v2.xml | 193 +++ src/cpu_map/x86_SapphireRapids-v3.xml | 198 +++ src/cpu_map/x86_SierraForest-v1.xml | 6 + src/cpu_map/x86_Skylake-Client-v1.xml | 6 + src/cpu_map/x86_Skylake-Client-v2.xml | 6 + src/cpu_map/x86_Skylake-Client-v3.xml | 6 + src/cpu_map/x86_Skylake-Client-v4.xml | 141 ++ src/cpu_map/x86_Skylake-Server-v1.xml | 6 + src/cpu_map/x86_Skylake-Server-v2.xml | 6 + src/cpu_map/x86_Skylake-Server-v3.xml | 6 + src/cpu_map/x86_Skylake-Server-v4.xml | 148 ++ src/cpu_map/x86_Skylake-Server-v5.xml | 150 ++ src/cpu_map/x86_Snowridge-v1.xml | 6 + src/cpu_map/x86_Snowridge-v2.xml | 143 ++ src/cpu_map/x86_Snowridge-v3.xml | 145 ++ src/cpu_map/x86_Snowridge-v4.xml | 143 ++ src/cpu_map/x86_Westmere-v1.xml | 6 + src/cpu_map/x86_Westmere-v2.xml | 6 + src/libvirt_private.syms | 1 + src/qemu/qemu_capabilities.c | 10 +- tests/cputest.c | 5 +- .../x86_64-cpuid-Atom-P5362-host.xml | 2 +- .../x86_64-cpuid-Cooperlake-host.xml | 2 +- .../x86_64-cpuid-Core-i5-2500-host.xml | 2 +- .../x86_64-cpuid-Core-i5-2540M-host.xml | 2 +- .../x86_64-cpuid-Core-i5-4670T-host.xml | 2 +- .../x86_64-cpuid-Core-i5-650-host.xml | 2 +- .../x86_64-cpuid-Core-i5-6600-host.xml | 2 +- .../x86_64-cpuid-Core-i7-2600-host.xml | 2 +- ...86_64-cpuid-Core-i7-2600-xsaveopt-host.xml | 2 +- .../x86_64-cpuid-Core-i7-3520M-host.xml | 2 +- .../x86_64-cpuid-Core-i7-3740QM-host.xml | 2 +- .../x86_64-cpuid-Core-i7-3770-host.xml | 2 +- .../x86_64-cpuid-Core-i7-4510U-host.xml | 2 +- .../x86_64-cpuid-Core-i7-4600U-host.xml | 2 +- .../x86_64-cpuid-Core-i7-5600U-arat-host.xml | 2 +- .../x86_64-cpuid-Core-i7-5600U-host.xml | 2 +- .../x86_64-cpuid-Core-i7-5600U-ibrs-host.xml | 2 +- .../x86_64-cpuid-Core-i7-7600U-host.xml | 2 +- .../x86_64-cpuid-Core-i7-7700-host.xml | 2 +- .../x86_64-cpuid-Core-i7-8550U-host.xml | 2 +- .../x86_64-cpuid-Core-i7-8700-host.xml | 2 +- .../x86_64-cpuid-EPYC-7502-32-Core-host.xml | 5 +- .../x86_64-cpuid-EPYC-7601-32-Core-host.xml | 2 +- ...6_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml | 8 +- ...6_64-cpuid-Hygon-C86-7185-32-core-host.xml | 5 +- .../x86_64-cpuid-Ice-Lake-Server-host.xml | 2 +- ...64-cpuid-Ryzen-7-1800X-Eight-Core-host.xml | 2 +- ...86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml | 2 +- .../x86_64-cpuid-Xeon-E3-1225-v5-host.xml | 2 +- .../x86_64-cpuid-Xeon-E3-1245-v5-host.xml | 2 +- .../x86_64-cpuid-Xeon-E5-2609-v3-host.xml | 2 +- .../x86_64-cpuid-Xeon-E5-2623-v4-host.xml | 2 +- .../x86_64-cpuid-Xeon-E5-2630-v3-host.xml | 2 +- .../x86_64-cpuid-Xeon-E5-2630-v4-host.xml | 2 +- .../x86_64-cpuid-Xeon-E5-2650-host.xml | 2 +- .../x86_64-cpuid-Xeon-E5-2650-v3-host.xml | 2 +- .../x86_64-cpuid-Xeon-E5-2650-v4-host.xml | 2 +- .../x86_64-cpuid-Xeon-E7-4820-host.xml | 2 +- .../x86_64-cpuid-Xeon-E7-4830-host.xml | 2 +- .../x86_64-cpuid-Xeon-E7-8890-v3-host.xml | 2 +- .../x86_64-cpuid-Xeon-E7540-host.xml | 2 +- .../x86_64-cpuid-Xeon-Gold-5115-host.xml | 2 +- .../x86_64-cpuid-Xeon-Gold-6130-host.xml | 2 +- .../x86_64-cpuid-Xeon-Gold-6148-host.xml | 2 +- .../x86_64-cpuid-Xeon-Platinum-8268-host.xml | 2 +- .../x86_64-cpuid-Xeon-Platinum-9242-host.xml | 2 +- .../x86_64-cpuid-Xeon-W3520-host.xml | 2 +- .../domaincapsdata/qemu_5.2.0-q35.x86_64.xml | 462 ++++- .../domaincapsdata/qemu_5.2.0-tcg.x86_64.xml | 836 +++++++++- tests/domaincapsdata/qemu_5.2.0.x86_64.xml | 462 ++++- .../domaincapsdata/qemu_6.0.0-q35.x86_64.xml | 477 +++++- .../domaincapsdata/qemu_6.0.0-tcg.x86_64.xml | 896 +++++++++- tests/domaincapsdata/qemu_6.0.0.x86_64.xml | 477 +++++- .../domaincapsdata/qemu_6.1.0-q35.x86_64.xml | 576 ++++++- .../domaincapsdata/qemu_6.1.0-tcg.x86_64.xml | 1458 +++++++++++++--- tests/domaincapsdata/qemu_6.1.0.x86_64.xml | 576 ++++++- .../domaincapsdata/qemu_6.2.0-q35.x86_64.xml | 583 ++++++- .../domaincapsdata/qemu_6.2.0-tcg.x86_64.xml | 1461 +++++++++++++--- tests/domaincapsdata/qemu_6.2.0.x86_64.xml | 583 ++++++- .../domaincapsdata/qemu_7.0.0-q35.x86_64.xml | 609 ++++++- .../domaincapsdata/qemu_7.0.0-tcg.x86_64.xml | 1485 ++++++++++++++--- tests/domaincapsdata/qemu_7.0.0.x86_64.xml | 609 ++++++- .../domaincapsdata/qemu_7.1.0-q35.x86_64.xml | 609 ++++++- .../domaincapsdata/qemu_7.1.0-tcg.x86_64.xml | 1425 +++++++++++++--- tests/domaincapsdata/qemu_7.1.0.x86_64.xml | 609 ++++++- .../domaincapsdata/qemu_7.2.0-q35.x86_64.xml | 609 ++++++- .../qemu_7.2.0-tcg.x86_64+hvf.xml | 979 ++++++++++- .../domaincapsdata/qemu_7.2.0-tcg.x86_64.xml | 979 ++++++++++- tests/domaincapsdata/qemu_7.2.0.x86_64.xml | 609 ++++++- .../domaincapsdata/qemu_8.0.0-q35.x86_64.xml | 652 +++++++- .../domaincapsdata/qemu_8.0.0-tcg.x86_64.xml | 1015 ++++++++++- tests/domaincapsdata/qemu_8.0.0.x86_64.xml | 652 +++++++- .../domaincapsdata/qemu_8.1.0-q35.x86_64.xml | 815 ++++++++- .../domaincapsdata/qemu_8.1.0-tcg.x86_64.xml | 1063 +++++++++++- tests/domaincapsdata/qemu_8.1.0.x86_64.xml | 815 ++++++++- .../domaincapsdata/qemu_8.2.0-q35.x86_64.xml | 815 ++++++++- .../domaincapsdata/qemu_8.2.0-tcg.x86_64.xml | 959 ++++++++++- tests/domaincapsdata/qemu_8.2.0.x86_64.xml | 815 ++++++++- .../domaincapsdata/qemu_9.0.0-q35.x86_64.xml | 815 ++++++++- .../domaincapsdata/qemu_9.0.0-tcg.x86_64.xml | 915 +++++++++- tests/domaincapsdata/qemu_9.0.0.x86_64.xml | 815 ++++++++- .../domaincapsdata/qemu_9.1.0-q35.x86_64.xml | 922 +++++++++- .../domaincapsdata/qemu_9.1.0-tcg.x86_64.xml | 1139 +++++++++++-- tests/domaincapsdata/qemu_9.1.0.x86_64.xml | 922 +++++++++- .../domaincapsdata/qemu_9.2.0-q35.x86_64.xml | 922 +++++++++- .../domaincapsdata/qemu_9.2.0-tcg.x86_64.xml | 1139 +++++++++++-- tests/domaincapsdata/qemu_9.2.0.x86_64.xml | 922 +++++++++- 166 files changed, 35711 insertions(+), 2629 deletions(-) create mode 100644 src/cpu_map/x86_Broadwell-v1.xml create mode 100644 src/cpu_map/x86_Broadwell-v2.xml create mode 100644 src/cpu_map/x86_Broadwell-v3.xml create mode 100644 src/cpu_map/x86_Broadwell-v4.xml create mode 100644 src/cpu_map/x86_Cascadelake-Server-v1.xml create mode 100644 src/cpu_map/x86_Cascadelake-Server-v2.xml create mode 100644 src/cpu_map/x86_Cascadelake-Server-v3.xml create mode 100644 src/cpu_map/x86_Cascadelake-Server-v4.xml create mode 100644 src/cpu_map/x86_Cascadelake-Server-v5.xml create mode 100644 src/cpu_map/x86_Cooperlake-v1.xml create mode 100644 src/cpu_map/x86_Cooperlake-v2.xml create mode 100644 src/cpu_map/x86_Denverton-v1.xml create mode 100644 src/cpu_map/x86_Denverton-v2.xml create mode 100644 src/cpu_map/x86_Denverton-v3.xml create mode 100644 src/cpu_map/x86_Denverton.xml create mode 100644 src/cpu_map/x86_Dhyana-v1.xml create mode 100644 src/cpu_map/x86_Dhyana-v2.xml create mode 100644 src/cpu_map/x86_EPYC-Milan-v1.xml create mode 100644 src/cpu_map/x86_EPYC-Milan-v2.xml create mode 100644 src/cpu_map/x86_EPYC-Rome-v1.xml create mode 100644 src/cpu_map/x86_EPYC-Rome-v2.xml create mode 100644 src/cpu_map/x86_EPYC-Rome-v3.xml create mode 100644 src/cpu_map/x86_EPYC-Rome-v4.xml create mode 100644 src/cpu_map/x86_EPYC-v1.xml create mode 100644 src/cpu_map/x86_EPYC-v2.xml create mode 100644 src/cpu_map/x86_EPYC-v3.xml create mode 100644 src/cpu_map/x86_EPYC-v4.xml create mode 100644 src/cpu_map/x86_GraniteRapids-v1.xml create mode 100644 src/cpu_map/x86_Haswell-v1.xml create mode 100644 src/cpu_map/x86_Haswell-v2.xml create mode 100644 src/cpu_map/x86_Haswell-v3.xml create mode 100644 src/cpu_map/x86_Haswell-v4.xml create mode 100644 src/cpu_map/x86_Icelake-Server-v1.xml create mode 100644 src/cpu_map/x86_Icelake-Server-v2.xml create mode 100644 src/cpu_map/x86_Icelake-Server-v3.xml create mode 100644 src/cpu_map/x86_Icelake-Server-v4.xml create mode 100644 src/cpu_map/x86_Icelake-Server-v5.xml create mode 100644 src/cpu_map/x86_Icelake-Server-v6.xml create mode 100644 src/cpu_map/x86_Icelake-Server-v7.xml create mode 100644 src/cpu_map/x86_IvyBridge-v1.xml create mode 100644 src/cpu_map/x86_IvyBridge-v2.xml create mode 100644 src/cpu_map/x86_KnightsMill.xml create mode 100644 src/cpu_map/x86_Nehalem-v1.xml create mode 100644 src/cpu_map/x86_Nehalem-v2.xml create mode 100644 src/cpu_map/x86_SandyBridge-v1.xml create mode 100644 src/cpu_map/x86_SandyBridge-v2.xml create mode 100644 src/cpu_map/x86_SapphireRapids-v1.xml create mode 100644 src/cpu_map/x86_SapphireRapids-v2.xml create mode 100644 src/cpu_map/x86_SapphireRapids-v3.xml create mode 100644 src/cpu_map/x86_SierraForest-v1.xml create mode 100644 src/cpu_map/x86_Skylake-Client-v1.xml create mode 100644 src/cpu_map/x86_Skylake-Client-v2.xml create mode 100644 src/cpu_map/x86_Skylake-Client-v3.xml create mode 100644 src/cpu_map/x86_Skylake-Client-v4.xml create mode 100644 src/cpu_map/x86_Skylake-Server-v1.xml create mode 100644 src/cpu_map/x86_Skylake-Server-v2.xml create mode 100644 src/cpu_map/x86_Skylake-Server-v3.xml create mode 100644 src/cpu_map/x86_Skylake-Server-v4.xml create mode 100644 src/cpu_map/x86_Skylake-Server-v5.xml create mode 100644 src/cpu_map/x86_Snowridge-v1.xml create mode 100644 src/cpu_map/x86_Snowridge-v2.xml create mode 100644 src/cpu_map/x86_Snowridge-v3.xml create mode 100644 src/cpu_map/x86_Snowridge-v4.xml create mode 100644 src/cpu_map/x86_Westmere-v1.xml create mode 100644 src/cpu_map/x86_Westmere-v2.xml -- 2.47.0