RE: [PATCH RFC v6 08/12] target/riscv: Handle KVM_EXIT_RISCV_SBI exit

-----Original Message----- From: Qemu-riscv [mailto:qemu-riscv-bounces+jiangyifei=huawei.com@nongnu.org] On Behalf Of Alistair Francis Sent: Thursday, August 19, 2021 2:14 PM To: Jiangyifei <jiangyifei(a)huawei.com&gt; Cc: Anup Patel <anup.patel(a)wdc.com>; open list:RISC-V <qemu-riscv(a)nongnu.org>; open list:Overall <kvm(a)vger.kernel.org>; limingwang (A) <limingwang(a)huawei.com>; libvir-list(a)redhat.com; Bin Meng <bin.meng(a)windriver.com>; qemu-devel(a)nongnu.org Developers <qemu-devel(a)nongnu.org>; Alistair Francis <Alistair.Francis(a)wdc.com>; kvm-riscv(a)lists.infradead.org; Wanghaibin (D) <wanghaibin.wang(a)huawei.com>; Fanliang (EulerOS) <fanliang(a)huawei.com>; Palmer Dabbelt <palmer(a)dabbelt.com>; Wubin (H) <wu.wubin(a)huawei.com&gt; Subject: Re: [PATCH RFC v6 08/12] target/riscv: Handle KVM_EXIT_RISCV_SBI exit On Tue, Aug 17, 2021 at 1:25 PM Yifei Jiang <jiangyifei(a)huawei.com&gt; wrote: > > Use char-fe to handle console sbi call, which implement early console > io while apply 'earlycon=sbi' into kernel parameters. > > Signed-off-by: Yifei Jiang <jiangyifei(a)huawei.com&gt; > Signed-off-by: Mingwang Li <limingwang(a)huawei.com&gt; > --- > target/riscv/kvm.c | 42 ++++++++++++++++- > target/riscv/sbi_ecall_interface.h | 72 > ++++++++++++++++++++++++++++++ > 2 files changed, 113 insertions(+), 1 deletion(-) create mode 100644 > target/riscv/sbi_ecall_interface.h > > diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index > bc9cb5d8f9..a68f31c2f3 100644 > --- a/target/riscv/kvm.c > +++ b/target/riscv/kvm.c > @@ -38,6 +38,8 @@ > #include "qemu/log.h" > #include "hw/loader.h" > #include "kvm_riscv.h" > +#include "sbi_ecall_interface.h" > +#include "chardev/char-fe.h" > > static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type, > uint64_t idx) { @@ -435,9 +437,47 @@ bool > kvm_arch_stop_on_emulation_error(CPUState *cs) > return true; > } > > +static int kvm_riscv_handle_sbi(struct kvm_run *run) { > + int ret = 0; > + unsigned char ch; > + switch (run->riscv_sbi.extension_id) { > + case SBI_EXT_0_1_CONSOLE_PUTCHAR: > + ch = run->riscv_sbi.args[0]; > + qemu_chr_fe_write(serial_hd(0)->be, &ch, sizeof(ch)); > + break; > + case SBI_EXT_0_1_CONSOLE_GETCHAR: > + ret = qemu_chr_fe_read_all(serial_hd(0)->be, &ch, sizeof(ch)); > + if (ret == sizeof(ch)) { > + run->riscv_sbi.args[0] = ch; > + } else { > + run->riscv_sbi.args[0] = -1; > + } > + break; These have been deprecated (see https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc#4-legac... ensions-eids-0x00---0x0f), is it even worth supporting them?

> + default: > + qemu_log_mask(LOG_UNIMP, > + "%s: un-handled SBI EXIT, specific reasons is %lu\n", > + __func__, run->riscv_sbi.extension_id); > + ret = -1; > + break; > + } > + return ret; > +} > + > int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) { > - return 0; > + int ret = 0; > + switch (run->exit_reason) { > + case KVM_EXIT_RISCV_SBI: > + ret = kvm_riscv_handle_sbi(run); > + break; > + default: > + qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", > + __func__, run->exit_reason); > + ret = -1; > + break; > + } > + return ret; > } > > void kvm_riscv_reset_vcpu(RISCVCPU *cpu) diff --git > a/target/riscv/sbi_ecall_interface.h > b/target/riscv/sbi_ecall_interface.h > new file mode 100644 > index 0000000000..fb1a3fa8f2 > --- /dev/null > +++ b/target/riscv/sbi_ecall_interface.h > @@ -0,0 +1,72 @@ > +/* > + * SPDX-License-Identifier: BSD-2-Clause > + * > + * Copyright (c) 2019 Western Digital Corporation or its affiliates. > + * > + * Authors: > + * Anup Patel <anup.patel(a)wdc.com&gt; > + */ > + > +#ifndef __SBI_ECALL_INTERFACE_H__ > +#define __SBI_ECALL_INTERFACE_H__ > + > +/* clang-format off */ > + > +/* SBI Extension IDs */ > +#define SBI_EXT_0_1_SET_TIMER 0x0 > +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 > +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 > +#define SBI_EXT_0_1_CLEAR_IPI 0x3 > +#define SBI_EXT_0_1_SEND_IPI 0x4 > +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 > +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 > +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 > +#define SBI_EXT_0_1_SHUTDOWN 0x8 > +#define SBI_EXT_BASE 0x10 > +#define SBI_EXT_TIME 0x54494D45 > +#define SBI_EXT_IPI 0x735049 > +#define SBI_EXT_RFENCE 0x52464E43 > +#define SBI_EXT_HSM 0x48534D > + > +/* SBI function IDs for BASE extension*/ > +#define SBI_EXT_BASE_GET_SPEC_VERSION 0x0 > +#define SBI_EXT_BASE_GET_IMP_ID 0x1 > +#define SBI_EXT_BASE_GET_IMP_VERSION 0x2 > +#define SBI_EXT_BASE_PROBE_EXT 0x3 > +#define SBI_EXT_BASE_GET_MVENDORID 0x4 > +#define SBI_EXT_BASE_GET_MARCHID 0x5 > +#define SBI_EXT_BASE_GET_MIMPID 0x6 > + > +/* SBI function IDs for TIME extension*/ > +#define SBI_EXT_TIME_SET_TIMER 0x0 > + > +/* SBI function IDs for IPI extension*/ > +#define SBI_EXT_IPI_SEND_IPI 0x0 > + > +/* SBI function IDs for RFENCE extension*/ > +#define SBI_EXT_RFENCE_REMOTE_FENCE_I 0x0 > +#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA 0x1 > +#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID 0x2 > +#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA 0x3 > +#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID 0x4 > +#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA 0x5 > +#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID 0x6 > + > +/* SBI function IDs for HSM extension */ > +#define SBI_EXT_HSM_HART_START 0x0 > +#define SBI_EXT_HSM_HART_STOP 0x1 > +#define SBI_EXT_HSM_HART_GET_STATUS 0x2 > + > +#define SBI_HSM_HART_STATUS_STARTED 0x0 > +#define SBI_HSM_HART_STATUS_STOPPED 0x1 > +#define SBI_HSM_HART_STATUS_START_PENDING 0x2 > +#define SBI_HSM_HART_STATUS_STOP_PENDING 0x3 > + > +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 > +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f > +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff > +#define SBI_EXT_VENDOR_START 0x09000000 > +#define SBI_EXT_VENDOR_END 0x09FFFFFF > +/* clang-format on */ > + > +#endif > -- > 2.19.1 > >