On Wed, Dec 11, 2024 at 04:24:21PM -0800, Nathan Chen via Devel wrote:
Add a pcie-expander-bus controller to the VM definition for each
"nestedSmmuv3"
device that is generated when the "nestedSmmuv3" IOMMU model is parsed from
the
VM definition. Assign each "nestedSmmuv3" device to one PXB controller, and
route any unmanaged "hostdev" VFIO devices with associated host SMMU nodes to
their corresponding PXB controller based on the "name" attributes of
"nestedSmmuv3" devices attached to these PXB controllers.
Signed-off-by: Nathan Chen <nathanc(a)nvidia.com>
---
src/conf/domain_addr.c | 26 ++++++-
src/conf/domain_addr.h | 3 +-
src/conf/domain_conf.c | 1 +
src/qemu/qemu_domain_address.c | 134 +++++++++++++++++++++++++++++++++
4 files changed, 162 insertions(+), 2 deletions(-)
diff --git a/src/qemu/qemu_domain_address.c
b/src/qemu/qemu_domain_address.c
index 31004bfc7e..dee198a7d2 100644
--- a/src/qemu/qemu_domain_address.c
+++ b/src/qemu/qemu_domain_address.c
@@ -1627,6 +1627,19 @@ qemuDomainPCIAddressSetCreate(virDomainDef *def,
addrs->dryRun = dryRun;
+ /* PXB indices must come before pcie-root-port indices in qemu,
+ * so add PXB buses to addrs before the pcie-root-ports. */
Can you elaborate on that requirement - I don't get why QEMU cares
which order slots are chosen in for PXB vs PCIe-Root-Port devices.
+
+ if (addrs->dryRun) {
+ for (i = 0; i < def->nnestedsmmus; i++) {
+ if (!virDeviceInfoPCIAddressIsWanted(def->nestedsmmus[i]->info))
+ continue;
+ if (qemuDomainPCIAddressReserveNextAddr(addrs,
+ def->nestedsmmus[i]->info)
< 0)
+ return NULL;
+ }
+ }
+
With regards,
Daniel
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