On Thu, Jan 16, 2025 at 14:38:26 +0100, Michal Prívozník wrote:
On 1/16/25 14:05, Jiri Denemark wrote:
The list of CPU features we probe from various MSR grew significantly over time and the CPU map currently mentions 11 distinct MSR indexes. But the code for directly probing host CPU features was still reading only the original 0x10a index. Thus the CPU model in host capabilities was missing a lot of features.
Instead of specifying a static list of indexes to read (which we would forget to update in the future), let's just read all indexes found in the CPU map.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> --- src/cpu/cpu_x86.c | 62 ++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 53 insertions(+), 9 deletions(-)
Reviewed-by: Michal Privoznik <mprivozn@redhat.com>
Thanks, I was reminded declaring more variables on a single line is bad so I squashed the following trivial patch before pushing. Jirka @@ -2841,7 +2841,7 @@ virCPUx86ListMSRs(virCPUx86Map *map, unsigned long **msrs) { size_t n = 0; - size_t i, j, k; + size_t i; /* These three nested loops look horrible, but data->len is always 1 here * and thanks to grouping features in the CPU map by their MSR index the @@ -2850,11 +2850,13 @@ virCPUx86ListMSRs(virCPUx86Map *map, */ for (i = 0; i < map->nfeatures; i++) { virCPUx86Data *data = &map->features[i]->data; + size_t j; for (j = 0; j < data->len; j++) { virCPUx86DataItem *item = &data->items[j]; bool found = false; unsigned long msr; + size_t k; if (item->type != VIR_CPU_X86_DATA_MSR) continue;