[PULL 41/66] target/mips: Remove now unused ASE_MSA definition

We don't use ASE_MSA anymore (replaced by ase_msa_available() checking MSAP bit from CP0_Config3). Remove it. Reviewed-by: Jiaxun Yang <jiaxun.yang(a)flygoat.com&gt; Reviewed-by: Richard Henderson <richard.henderson(a)linaro.org&gt; Signed-off-by: Philippe Mathieu-Daudé <f4bug(a)amsat.org&gt; Tested-by: Jiaxun Yang <jiaxun.yang(a)flygoat.com&gt; Message-Id: <20201208003702.4088927-6-f4bug(a)amsat.org&gt; --- target/mips/mips-defs.h | 1 - target/mips/cpu-defs.c.inc | 8 ++++---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index 97866019a72..6b8e6800115 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -34,7 +34,6 @@ #define ASE_MT 0x0000000040000000ULL #define ASE_SMARTMIPS 0x0000000080000000ULL #define ASE_MICROMIPS 0x0000000100000000ULL -#define ASE_MSA 0x0000000200000000ULL /* * bits 40-51: vendor-specific base instruction sets */ diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index fe0f47aadf8..3d44b394773 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -410,7 +410,7 @@ const mips_def_t mips_defs[] = .CP1_fcr31_rw_bitmask = 0xFF83FFFF, .SEGBITS = 32, .PABITS = 40, - .insn_flags = CPU_MIPS32R5 | ASE_MSA, + .insn_flags = CPU_MIPS32R5, .mmu_type = MMU_TYPE_R4000, }, { @@ -723,7 +723,7 @@ const mips_def_t mips_defs[] = .MSAIR = 0x03 << MSAIR_ProcID, .SEGBITS = 48, .PABITS = 48, - .insn_flags = CPU_MIPS64R6 | ASE_MSA, + .insn_flags = CPU_MIPS64R6, .mmu_type = MMU_TYPE_R4000, }, { @@ -763,7 +763,7 @@ const mips_def_t mips_defs[] = .MSAIR = 0x03 << MSAIR_ProcID, .SEGBITS = 48, .PABITS = 48, - .insn_flags = CPU_MIPS64R6 | ASE_MSA, + .insn_flags = CPU_MIPS64R6, .mmu_type = MMU_TYPE_R4000, }, { @@ -889,7 +889,7 @@ const mips_def_t mips_defs[] = .CP1_fcr31_rw_bitmask = 0xFF83FFFF, .SEGBITS = 48, .PABITS = 48, - .insn_flags = CPU_LOONGSON3A | ASE_MSA, + .insn_flags = CPU_LOONGSON3A, .mmu_type = MMU_TYPE_R4000, }, { -- 2.26.2