On Mon, Mar 23, 2020 at 06:28:34PM +0100, Andrea Bolognani wrote:
On Thu, 2020-03-19 at 18:44 -0300, Daniel Henrique Barboza wrote:
> The Perfomance Monitoring Unit (PMU) feature is not available for
> the Power architecture. The "<pmu/>" feature will always have a
value
> 'on' or 'off' after saving the domain XML, and both will be
rejected
> by QEMU when launching. This is the error message for
> "<pmu state='on'/>":
>
> qemu-kvm: can't apply global host-powerpc64-cpu.pmu=on: Property '.pmu'
not found
>
> A similar error message is thrown for "<pmu state='off'/>".
>
> This patch prevents the pseries guest from launching with any
> pmu setting with a more informative error message:
>
> error: unsupported configuration: The 'pmu' feature is not
> supported for architecture 'ppc64' or machine type 'pseries'
I don't think this is right. While you are correct that PMU can't be
configured for pSeries guests, I think that's because of the opposite
reason: it's always on, and can't be turned off.
For comparison's sake: in an x86 guest with <pmu state='on'/> I get
$ perf list | grep -E 'Hardware.*event'
branch-instructions OR branches [Hardware event]
branch-misses [Hardware event]
bus-cycles [Hardware event]
cache-misses [Hardware event]
cache-references [Hardware event]
cpu-cycles OR cycles [Hardware event]
instructions [Hardware event]
ref-cycles [Hardware event]
L1-dcache-load-misses [Hardware cache event]
L1-dcache-loads [Hardware cache event]
L1-dcache-stores [Hardware cache event]
L1-icache-load-misses [Hardware cache event]
branch-load-misses [Hardware cache event]
branch-loads [Hardware cache event]
dTLB-load-misses [Hardware cache event]
dTLB-loads [Hardware cache event]
dTLB-store-misses [Hardware cache event]
dTLB-stores [Hardware cache event]
iTLB-load-misses [Hardware cache event]
iTLB-loads [Hardware cache event]
whereas when I turn off PMU all of those are gone.
In a pSeries guest running on POWER8, without any configuration,
I get:
$ perf list | grep -E 'Hardware.*event'
branch-instructions OR branches [Hardware event]
branch-misses [Hardware event]
cache-misses [Hardware event]
cache-references [Hardware event]
cpu-cycles OR cycles [Hardware event]
instructions [Hardware event]
stalled-cycles-backend OR idle-cycles-backend [Hardware event]
stalled-cycles-frontend OR idle-cycles-frontend [Hardware event]
L1-dcache-load-misses [Hardware cache event]
L1-dcache-loads [Hardware cache event]
L1-dcache-prefetches [Hardware cache event]
L1-dcache-store-misses [Hardware cache event]
L1-icache-load-misses [Hardware cache event]
L1-icache-loads [Hardware cache event]
L1-icache-prefetches [Hardware cache event]
LLC-load-misses [Hardware cache event]
LLC-loads [Hardware cache event]
LLC-prefetches [Hardware cache event]
LLC-store-misses [Hardware cache event]
LLC-stores [Hardware cache event]
branch-load-misses [Hardware cache event]
branch-loads [Hardware cache event]
dTLB-load-misses [Hardware cache event]
iTLB-load-misses [Hardware cache event]
So it seems to me that, if anything, the PMU feature should be
treated like the <panic/> device, that is, automatically added to
pSeries guests if it's not present already.
David, what's your opinion on the matter?
You're correct. The difference originates at the hardware level. On
x86 the host always "owns" the PMU, and it requires explicit work in
KVM to make it available to the guest. On POWER, the guest owns the
PMU. I'm not sure if it's possible to disable guest access to the PMU
at all. Even if it is, it must be some obscure bit in the HFCR or
somewhere which I don't believe we've wired up at all.
So for now, certainly, pmu is effectively always on.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson