[libvirt] [PATCH 2/5] conf: showing cache/memoryBW monitor features in capabilities

From: Huaqiang <huaqiang.wang(a)intel.com&gt; We learned that the hardware features of CAT, CMT, MBA and MBM are orthogonal ones, if CAT or MBA is not supported in system, but CMT or MBM are supported, then the cache monitor or memoryBW monitor features may not be correctly displayed in host capabilities through command 'virsh capabilites'. Showing the cache/memoryBW monitor capabilities even there is no support of cache allocation or memoryBW allocation features. Signed-off-by: Huaqiang <huaqiang.wang(a)intel.com&gt; --- src/conf/capabilities.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/conf/capabilities.c b/src/conf/capabilities.c index 7edec75c31..a048427241 100644 --- a/src/conf/capabilities.c +++ b/src/conf/capabilities.c @@ -939,7 +939,7 @@ virCapabilitiesFormatCaches(virBufferPtr buf, size_t i = 0; size_t j = 0; - if (!cache->nbanks) + if (!cache->nbanks && !cache->monitor) return 0; virBufferAddLit(buf, "<cache>\n"); @@ -1025,7 +1025,7 @@ virCapabilitiesFormatMemoryBandwidth(virBufferPtr buf, { size_t i = 0; - if (!memBW->nnodes) + if (!memBW->nnodes && !memBW->monitor) return 0; virBufferAddLit(buf, "<memory_bandwidth>\n"); -- 2.23.0