Hello Martin,
Yes, I'm sending this patch because I'm having the following problem
on a Neoverse-N1 machine.
# grep "Cannot find CPU model" /var/log/libvirt/libvirtd.log
operation failed: Cannot find CPU model with PVR 0xd0c
And I saw that Fujitsu sent a similar patch to support their CPU model
We have a lot of Ampere machines in our beaker, so we always get this error.
QE has a tp-libvirt auto case that always fails with this error logging.
So I want to send this patch to fix it.
Thanks in advance :)
Zhenyu
On Mon, Sep 26, 2022 at 8:19 PM Martin Kletzander <mkletzan(a)redhat.com> wrote:
On Mon, Sep 26, 2022 at 02:28:51AM -0400, Zhenyu Zhang wrote:
>Add Neoverse N1/N2/V1 as a supported cpu model.
>
Sorry for misleading you earlier. Looking at it now it seems that
all the Neoverse CPUs are from Arm and Ampere computing only makes the
Altra which is based on Neoverse N1.
I guess I am not the right one to review this code, sorry for that. But
I would guess we need to recognise Neoverse models as Arm and I have no
idea how the Ampere behaves wrt PVR. Are you basing this on some HW as
well?
Thanks,
Martin
>Signed-off-by: Zhenyu Zhang <zhenyzha(a)redhat.com>
>
>v1:
https://listman.redhat.com/archives/libvir-list/2022-September/234294.html
>
>Changelog
>=========
>v2:
> * Introduce Neoverse N1/N2/V1 (Martin)
> * Corrected ampere vendor value (Martin)
>---
> src/cpu_map/arm_Neoverse-N1.xml | 7 +++++++
> src/cpu_map/arm_Neoverse-N2.xml | 7 +++++++
> src/cpu_map/arm_Neoverse-V1.xml | 7 +++++++
> src/cpu_map/arm_vendors.xml | 1 +
> src/cpu_map/index.xml | 5 +++++
> src/cpu_map/meson.build | 3 +++
> 6 files changed, 30 insertions(+)
> create mode 100644 src/cpu_map/arm_Neoverse-N1.xml
> create mode 100644 src/cpu_map/arm_Neoverse-N2.xml
> create mode 100644 src/cpu_map/arm_Neoverse-V1.xml
>
>diff --git a/src/cpu_map/arm_Neoverse-N1.xml b/src/cpu_map/arm_Neoverse-N1.xml
>new file mode 100644
>index 0000000000..db25813cd9
>--- /dev/null
>+++ b/src/cpu_map/arm_Neoverse-N1.xml
>@@ -0,0 +1,7 @@
>+<cpus>
>+ <model name='Neoverse-N1'>
>+ <vendor name='Ampere'/>
>+ <pvr value='0xd0c'/>
>+ </model>
>+</cpus>
>+
>diff --git a/src/cpu_map/arm_Neoverse-N2.xml b/src/cpu_map/arm_Neoverse-N2.xml
>new file mode 100644
>index 0000000000..8e8c9d202c
>--- /dev/null
>+++ b/src/cpu_map/arm_Neoverse-N2.xml
>@@ -0,0 +1,7 @@
>+<cpus>
>+ <model name='Neoverse-N2'>
>+ <vendor name='Ampere'/>
>+ <pvr value='0xd49'/>
>+ </model>
>+</cpus>
>+
>diff --git a/src/cpu_map/arm_Neoverse-V1.xml b/src/cpu_map/arm_Neoverse-V1.xml
>new file mode 100644
>index 0000000000..82a7d86b08
>--- /dev/null
>+++ b/src/cpu_map/arm_Neoverse-V1.xml
>@@ -0,0 +1,7 @@
>+<cpus>
>+ <model name='Neoverse-V1'>
>+ <vendor name='Ampere'/>
>+ <pvr value='0xd40'/>
>+ </model>
>+</cpus>
>+
>diff --git a/src/cpu_map/arm_vendors.xml b/src/cpu_map/arm_vendors.xml
>index 92d10565f4..3bbaf35ab7 100644
>--- a/src/cpu_map/arm_vendors.xml
>+++ b/src/cpu_map/arm_vendors.xml
>@@ -13,4 +13,5 @@
> <vendor name='Marvell' value='0x56'/>
> <vendor name='Intel' value='0x69'/>
> <vendor name='Phytium' value='0x70'/>
>+ <vendor name='Ampere' value='0xc0'/>
> </cpus>
>diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml
>index d533a28865..01fa61f4a4 100644
>--- a/src/cpu_map/index.xml
>+++ b/src/cpu_map/index.xml
>@@ -98,6 +98,11 @@
> <include filename='arm_cortex-a57.xml'/>
> <include filename='arm_cortex-a72.xml'/>
>
>+ <!-- Ampere-based CPU models -->
>+ <include filename='arm_Neoverse-N1.xml'/>
>+ <include filename='arm_Neoverse-N2.xml'/>
>+ <include filename='arm_Neoverse-V1.xml'/>
>+
> <!-- Qualcomm-based CPU models -->
> <include filename='arm_Falkor.xml'/>
>
>diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build
>index 99264289e2..55c3703006 100644
>--- a/src/cpu_map/meson.build
>+++ b/src/cpu_map/meson.build
>@@ -7,6 +7,9 @@ cpumap_data = [
> 'arm_FT-2000plus.xml',
> 'arm_features.xml',
> 'arm_Kunpeng-920.xml',
>+ 'arm_Neoverse-N1.xml',
>+ 'arm_Neoverse-N2.xml',
>+ 'arm_Neoverse-V1.xml',
> 'arm_Tengyun-S2500.xml',
> 'arm_ThunderX299xx.xml',
> 'arm_vendors.xml',
>--
>2.31.1
>