On 07/17/2015 02:43 PM, Laine Stump wrote:
This is the upstream part of a PCIe switch. It connects to a PCIe
port
(but not PCI) on the upstream side, and can have up to 31
xio3130-downstream controllers (but no other types of devices)
connected to its downstream side.
This device will be used to implement the "pcie-switch" model of pci
controller.
---
unchanged from V1
src/qemu/qemu_capabilities.c | 2 ++
src/qemu/qemu_capabilities.h | 1 +
tests/qemucapabilitiesdata/caps_1.2.2-1.caps | 1 +
tests/qemucapabilitiesdata/caps_1.3.1-1.caps | 1 +
tests/qemucapabilitiesdata/caps_1.4.2-1.caps | 1 +
tests/qemucapabilitiesdata/caps_1.5.3-1.caps | 1 +
tests/qemucapabilitiesdata/caps_1.6.0-1.caps | 1 +
tests/qemucapabilitiesdata/caps_1.6.50-1.caps | 1 +
tests/qemucapabilitiesdata/caps_2.1.1-1.caps | 1 +
tests/qemuhelptest.c | 6 ++++--
10 files changed, 14 insertions(+), 2 deletions(-)
Similar comments to those made in 9/17 w/r/t when this is supported in
qemu and of course having a local copy with merges from a patch that may
end up being reverted. Hopefully that decision is made before this
series is accepted...
In any case, still assuming the naming has been agreed upon...
ACK
John