[RFC PATCH v2 05/16] hw/timer/xilinx_timer: Allow down to 8-bit memory access

Allow down to 8-bit access, per the datasheet (reference added in previous commit): "Timer Counter registers are accessed as one of the following types: • Byte (8 bits) • Half word (2 bytes) • Word (4 bytes)" Signed-off-by: Philippe Mathieu-Daudé <philmd(a)linaro.org&gt; Reviewed-by: Anton Johansson <anjo(a)rev.ng&gt; Acked-by: Alistair Francis <alistair.francis(a)wdc.com&gt; Reviewed-by: Edgar E. Iglesias <edgar.iglesias(a)amd.com&gt; --- RFC: This breaks the UART qtest, instead of having TX register receiving 'T' = 0x54, it receives 0x54000000, converted to '\0' char. It works if we use SWI instead of SBI (storing 32-bit). --- hw/timer/xilinx_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 383fc8b3c8..c117bff225 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -198,7 +198,7 @@ static const MemoryRegionOps timer_ops = { .max_access_size = 4, }, .valid = { - .min_access_size = 4, + .min_access_size = 1, .max_access_size = 4 } }; -- 2.45.2