Consider the CPU ENDI bit, swap instructions when the CPU
endianness doesn't match the binary one.
Signed-off-by: Philippe Mathieu-Daudé <philmd(a)linaro.org>
---
target/microblaze/cpu.h | 7 +++++++
target/microblaze/translate.c | 5 +++--
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 3e5a3e5c605..6d540713eb5 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -412,6 +412,13 @@ void mb_tcg_init(void);
/* Ensure there is no overlap between the two masks. */
QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK);
+static inline bool mb_cpu_is_big_endian(CPUState *cs)
+{
+ MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
+
+ return !cpu->cfg.endi;
+}
+
static inline void cpu_get_tb_cpu_state(CPUMBState *env, vaddr *pc,
uint64_t *cs_base, uint32_t *flags)
{
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 0b466db694c..5595ae4fadb 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -709,7 +709,7 @@ static void record_unaligned_ess(DisasContext *dc, int rd,
static inline MemOp mo_endian(DisasContext *dc)
{
- return MO_TE;
+ return dc->cfg->endi ? MO_LE : MO_BE;
}
static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
@@ -1646,7 +1646,8 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState
*cs)
dc->tb_flags_to_set = 0;
- ir = translator_ldl(cpu_env(cs), &dc->base, dc->base.pc_next);
+ ir = translator_ldl_swap(cpu_env(cs), &dc->base, dc->base.pc_next,
+ mb_cpu_is_big_endian(cs) != TARGET_BIG_ENDIAN);
if (!decode(dc, ir)) {
trap_illegal(dc, true);
}
--
2.45.2