On Thu, Apr 06, 2017 at 08:09:35PM +0800, Eli Qiao wrote:
On Thursday, 6 April 2017 at 7:56 PM, Daniel P. Berrange wrote:
On Thu, Apr 06, 2017 at 07:32:59PM +0800, Eli Qiao wrote:
This patch is based on Martin's cache branch.
This patch amends the cache bank capability as follow:
<cache> <bank id='0' level='3' type='unified' size='15360' unit='KiB' cpus='0-5'/> <control min='768' unit='KiB' type='unified' nallocations='4'/> <bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11'/> <control min='768' unit='KiB' type='unified' nallocations='4'/> </cache>
This is still wrong per my previous comments.
I will repost V3 to change it as your comments.
one question, if there’s no `control`, what’s the bank should be like?
<bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11’/>
This is preferred Regards, Daniel -- |: http://berrange.com -o- http://www.flickr.com/photos/dberrange/ :| |: http://libvirt.org -o- http://virt-manager.org :| |: http://entangle-photo.org -o- http://search.cpan.org/~danberr/ :|