)
On Tuesday, 7 February 2017 at 12:02 AM, Daniel P. Berrange wrote:
On Mon, Feb 06, 2017 at 10:23:37AM +0800, Eli Qiao wrote:
> This patch expose cache information to host's capabilites xml.
>
> For l3 cache allocation
> <cache>
> <bank id='0' type='l3' size='56320' unit='KiB'
cpus='0-21,44-65'>
> <control min='2816' reserved='2816' unit='KiB'
scope='L3'/>
> </bank>
> <bank id='1' type='l3' size='56320' unit='KiB'
cpus='22-43,66-87'>
> <control min='2816' reserved='2816' unit='KiB'
scope='L3'/>
> </bank>
> </cache>
>
> For l3 cache allocation supported cdp(seperate data/code):
> <cache>
> <bank id='0' type='l3' size='56320' unit='KiB'
cpus='0-21,44-65'>
> <control min='2816' reserved='2816' unit='KiB'
scope='L3DATA'/>
> <control min='2816' reserved='2816' unit='KiB'
scope='L3CODE'/>
> </bank>
> <bank id='1' type='l3' size='56320' unit='KiB'
cpus='22-43,66-87'>
> <control min='2816' reserved='2816' unit='KiB'
scope='L3DATA'/>
> <control min='2816' reserved='2816' unit='KiB'
scope='L3CODE'/>
> </bank>
> </cache>
>
> RFC on mailing list.
>
https://www.redhat.com/archives/libvir-list/2017-January/msg00644.html
>
> Signed-off-by: Eli Qiao <liyong.qiao(a)intel.com
(mailto:liyong.qiao@intel.com)>
> ---
> src/conf/capabilities.c | 56 ++++++++++++++++++++++++++++++++++++
> src/conf/capabilities.h | 23 +++++++++++++++
> src/libvirt_private.syms | 1 +
> src/qemu/qemu_capabilities.c | 68 ++++++++++++++++++++++++++++++++++++++++++++
> src/qemu/qemu_driver.c | 4 +++
> 5 files changed, 152 insertions(+)
>
> diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
> index 3247d25..23f416d 100644
> --- a/src/qemu/qemu_capabilities.c
> +++ b/src/qemu/qemu_capabilities.c
> @@ -45,6 +45,7 @@
> #include "qemu_domain.h"
> #define __QEMU_CAPSRIV_H_ALLOW__
> #include "qemu_capspriv.h"
> +#include "virresctrl.h"
>
> #include <fcntl.h>
> #include <sys/stat.h>
> @@ -1098,7 +1099,71 @@ virQEMUCapsInitCPU(virCapsPtr caps,
> goto cleanup;
> }
>
> +static int
> +virQEMUCapsInitCache(virCapsPtr caps)
> +{
> + int i, j;
> + virResCtrlPtr resctrl;
> + virCapsHostCacheBankPtr bank;
> +
> + for (i = 0; i < RDT_NUM_RESOURCES; i ++)
> + {
> + /* L3DATA and L3CODE share L3 resources */
> + if ( i == RDT_RESOURCE_L3CODE )
> + continue;
>
> + resctrl = virResCtrlGet(i);
> +
> + if(resctrl->enabled) {
> + for( j = 0; j < resctrl->num_banks; j++)
> + {
> + if(VIR_RESIZE_N(caps->host.cachebank, caps->host.ncachebank_max,
> + caps->host.ncachebank, 1) < 0)
> + return -1;
> +
> + if(VIR_ALLOC(bank) < 0)
> + return -1;
> +
> + bank->id = resctrl->cache_banks[j].host_id;
> + if(VIR_STRDUP(bank->type, resctrl->cache_level) < 0)
> + goto err;
> + if(VIR_STRDUP(bank->cpus, virBitmapFormat(resctrl->cache_banks[j].cpu_mask))
< 0)
> + goto err;
> + bank->size = resctrl->cache_banks[j].cache_size;
> + /*L3DATA and L3CODE shares L3 cache resources, so fill them to the control
element*/
> + if ( i == RDT_RESOURCE_L3DATA ) {
> + if(VIR_EXPAND_N(bank->control, bank->ncontrol, 2) < 0)
> + goto err;
> +
> + bank->control[0].min =
virResCtrlGet(RDT_RESOURCE_L3DATA)->cache_banks[j].cache_min;
> + bank->control[0].reserved = bank->control[0].min *
(virResCtrlGet(RDT_RESOURCE_L3DATA)->min_cbm_bits);
> + if(VIR_STRDUP(bank->control[0].scope,
> + virResCtrlGet(RDT_RESOURCE_L3DATA)->name) < 0)
> + goto err;
> +
> + bank->control[1].min =
virResCtrlGet(RDT_RESOURCE_L3CODE)->cache_banks[j].cache_min;
> + bank->control[1].reserved = bank->control[1].min *
(virResCtrlGet(RDT_RESOURCE_L3CODE)->min_cbm_bits);
> + if(VIR_STRDUP(bank->control[1].scope,
> + virResCtrlGet(RDT_RESOURCE_L3CODE)->name) < 0)
> + goto err;
> + }
> + else {
> + if(VIR_EXPAND_N(bank->control, bank->ncontrol, 1) < 0)
> + goto err;
> + bank->control[0].min = resctrl->cache_banks[j].cache_min;
> + bank->control[0].reserved = bank->control[0].min *
resctrl->min_cbm_bits;
> + if(VIR_STRDUP(bank->control[0].scope, resctrl->name) < 0)
> + goto err;
> + }
> + caps->host.cachebank[caps->host.ncachebank++] = bank;
> + }
> + }
> + }
> + return 0;
> +err:
> + VIR_FREE(bank);
> + return -1;
> +}
>
I don't think this code should be in the QEMU driver - better to have
it in nodeinfo.c so it is common to all drivers.