4:22 p.m.
translate_init.c.inc mostly contains CPU definitions.
msa_reset() doesn't belong here, move it with the MSA
helpers.
One comment style is updated to avoid checkpatch.pl warning.
Signed-off-by: Philippe Mathieu-Daudé <f4bug(a)amsat.org>
Reviewed-by: Richard Henderson <richard.henderson(a)linaro.org>
Message-Id: <20201215225757.764263-15-f4bug(a)amsat.org>
Tested-by: Jiaxun Yang <jiaxun.yang(a)flygoat.com>
---
target/mips/internal.h | 2 ++
target/mips/cpu.c | 1 +
target/mips/msa_helper.c | 36 ++++++++++++++++++++++++++++++++++++
target/mips/cpu-defs.c.inc | 36 ------------------------------------
4 files changed, 39 insertions(+), 36 deletions(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 1048781bcf4..5dd17ff7333 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -199,6 +199,8 @@ static inline bool cpu_mips_hw_interrupts_pending(CPUMIPSState *env)
void mips_tcg_init(void);
+void msa_reset(CPUMIPSState *env);
+
/* cp0_timer.c */
uint32_t cpu_mips_get_count(CPUMIPSState *env);
void cpu_mips_store_count(CPUMIPSState *env, uint32_t value);
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 4c590b90b25..f45164012a4 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -33,6 +33,7 @@
#include "hw/qdev-clock.h"
#include "hw/semihosting/semihost.h"
#include "qapi/qapi-commands-machine-target.h"
+#include "fpu_helper.h"
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index b89b4c44902..f0d728c03f0 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -8201,3 +8201,39 @@ void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t
wd,
msa_move_v(pwd, pwx);
}
+
+void msa_reset(CPUMIPSState *env)
+{
+ if (!ase_msa_available(env)) {
+ return;
+ }
+
+#ifdef CONFIG_USER_ONLY
+ /* MSA access enabled */
+ env->CP0_Config5 |= 1 << CP0C5_MSAEn;
+ env->CP0_Status |= (1 << CP0St_CU1) | (1 << CP0St_FR);
+#endif
+
+ /*
+ * MSA CSR:
+ * - non-signaling floating point exception mode off (NX bit is 0)
+ * - Cause, Enables, and Flags are all 0
+ * - round to nearest / ties to even (RM bits are 0)
+ */
+ env->active_tc.msacsr = 0;
+
+ restore_msa_fp_status(env);
+
+ /* tininess detected after rounding.*/
+ set_float_detect_tininess(float_tininess_after_rounding,
+ &env->active_tc.msa_fp_status);
+
+ /* clear float_status exception flags */
+ set_float_exception_flags(0, &env->active_tc.msa_fp_status);
+
+ /* clear float_status nan mode */
+ set_default_nan_mode(0, &env->active_tc.msa_fp_status);
+
+ /* set proper signanling bit meaning ("1" means "quiet") */
+ set_snan_bit_is_one(0, &env->active_tc.msa_fp_status);
+}
diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc
index 3d44b394773..ba22ff4bcd1 100644
--- a/target/mips/cpu-defs.c.inc
+++ b/target/mips/cpu-defs.c.inc
@@ -18,8 +18,6 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>;.
*/
-#include "fpu_helper.h"
-
/* CPU / CPU family specific config register values. */
/* Have config1, uncached coherency */
@@ -975,37 +973,3 @@ static void mvp_init(CPUMIPSState *env)
(0x0 << CP0MVPC1_PCX) | (0x0 << CP0MVPC1_PCP2)
|
(0x1 << CP0MVPC1_PCP1);
}
-
-static void msa_reset(CPUMIPSState *env)
-{
- if (!ase_msa_available(env)) {
- return;
- }
-
-#ifdef CONFIG_USER_ONLY
- /* MSA access enabled */
- env->CP0_Config5 |= 1 << CP0C5_MSAEn;
- env->CP0_Status |= (1 << CP0St_CU1) | (1 << CP0St_FR);
-#endif
-
- /* MSA CSR:
- - non-signaling floating point exception mode off (NX bit is 0)
- - Cause, Enables, and Flags are all 0
- - round to nearest / ties to even (RM bits are 0) */
- env->active_tc.msacsr = 0;
-
- restore_msa_fp_status(env);
-
- /* tininess detected after rounding.*/
- set_float_detect_tininess(float_tininess_after_rounding,
- &env->active_tc.msa_fp_status);
-
- /* clear float_status exception flags */
- set_float_exception_flags(0, &env->active_tc.msa_fp_status);
-
- /* clear float_status nan mode */
- set_default_nan_mode(0, &env->active_tc.msa_fp_status);
-
- /* set proper signanling bit meaning ("1" means "quiet") */
- set_snan_bit_is_one(0, &env->active_tc.msa_fp_status);
-}
--
2.26.2