Use the single ISA_MIPS32R5 definition to check if the Release 5
ISA is supported, whether the CPU support 32/64-bit.
For now we keep '32' in the definition name, we will rename it
as ISA_MIPS_R5 in few commits.
Reviewed-by: Richard Henderson <richard.henderson(a)linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug(a)amsat.org>
Message-Id: <20210104221154.3127610-10-f4bug(a)amsat.org>
---
target/mips/mips-defs.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index ccdde0b4a43..b71127ddd7c 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -20,7 +20,6 @@
#define ISA_MIPS32R2 0x0000000000000040ULL
#define ISA_MIPS32R3 0x0000000000000200ULL
#define ISA_MIPS32R5 0x0000000000000800ULL
-#define ISA_MIPS64R5 0x0000000000001000ULL
#define ISA_MIPS32R6 0x0000000000002000ULL
#define ISA_MIPS64R6 0x0000000000004000ULL
#define ISA_NANOMIPS32 0x0000000000008000ULL
@@ -84,7 +83,7 @@
/* MIPS Technologies "Release 5" */
#define CPU_MIPS32R5 (CPU_MIPS32R3 | ISA_MIPS32R5)
-#define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
+#define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5)
/* MIPS Technologies "Release 6" */
#define CPU_MIPS32R6 (CPU_MIPS32R5 | ISA_MIPS32R6)
--
2.26.2