[PATCH v3 13/17] target/microblaze: Introduce mo_endian() helper
mo_endian() returns the target endianness, currently static.
Signed-off-by: Philippe Mathieu-Daudé <philmd(a)linaro.org>
Reviewed-by: Richard Henderson <richard.henderson(a)linaro.org>
---
target/microblaze/translate.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 86f3c19618..0b466db694 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -707,12 +707,17 @@ static void record_unaligned_ess(DisasContext *dc, int rd,
}
#endif
+static inline MemOp mo_endian(DisasContext *dc)
+{
+ return MO_TE;
+}
+
static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
int mem_index, bool rev)
{
MemOp size = mop & MO_SIZE;
- mop |= MO_TE;
+ mop |= mo_endian(dc);
/*
* When doing reverse accesses we need to do two things.
@@ -847,7 +852,8 @@ static bool trans_lwx(DisasContext *dc, arg_typea *arg)
/* lwx does not throw unaligned access errors, so force alignment */
tcg_gen_andi_tl(addr, addr, ~3);
- tcg_gen_qemu_ld_i32(cpu_res_val, addr, dc->mem_index, MO_TE | MO_UL);
+ tcg_gen_qemu_ld_i32(cpu_res_val, addr, dc->mem_index,
+ mo_endian(dc) | MO_UL);
tcg_gen_mov_tl(cpu_res_addr, addr);
if (arg->rd) {
@@ -864,7 +870,7 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop,
{
MemOp size = mop & MO_SIZE;
- mop |= MO_TE;
+ mop |= mo_endian(dc);
/*
* When doing reverse accesses we need to do two things.
@@ -1018,7 +1024,7 @@ static bool trans_swx(DisasContext *dc, arg_typea *arg)
tcg_gen_atomic_cmpxchg_i32(tval, cpu_res_addr, cpu_res_val,
reg_for_write(dc, arg->rd),
- dc->mem_index, MO_TE | MO_UL);
+ dc->mem_index, mo_endian(dc) | MO_UL);
tcg_gen_brcond_i32(TCG_COND_NE, cpu_res_val, tval, swx_fail);
--
2.45.2