Add a new aw_bits attribute to the iommu device to control the address width of the intel-iommu Signed-off-by Menno Lageman <menno.lageman(a)oracle.com&gt; --- docs/formatdomain.html.in | 9 +++++ docs/schemas/domaincommon.rng | 5 +++ src/conf/domain_conf.c | 21 +++++++++++ src/conf/domain_conf.h | 1 + .../qemuxml2argvdata/intel-iommu-aw-bits.xml | 35 +++++++++++++++++++ .../intel-iommu-aw-bits.x86_64-latest.xml | 1 + tests/qemuxml2xmltest.c | 1 + 7 files changed, 73 insertions(+) create mode 100644 tests/qemuxml2argvdata/intel-iommu-aw-bits.xml create mode 120000 tests/qemuxml2xmloutdata/intel-iommu-aw-bits.x86_64-latest.xml diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in index 33cec1e6dd9f..64d4100dcd92 100644 --- a/docs/formatdomain.html.in +++ b/docs/formatdomain.html.in @@ -9326,6 +9326,15 @@ qemu-kvm -net nic,model=? /dev/null <span class="since">Since 3.5.0</span> (QEMU/KVM only) </p> </dd> + <dt><code>aw_bits</code></dt> + <dd> + <p> + The <code>aw_bits</code> attribute can be used to set + the address width to allow mapping larger iova addresses + in the guest. + <span class="since">Since 2.12.2</span> (QEMU/KVM only) + </p> + </dd> </dl> </dd> </dl> diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng index 6727cd743b7e..91addcbcee52 100644 --- a/docs/schemas/domaincommon.rng +++ b/docs/schemas/domaincommon.rng @@ -4749,6 +4749,11 @@ <ref name="virOnOff"/> </attribute> </optional> + <optional> + <attribute name="aw_bits"> + <ref name="uint8"/> + </attribute> + </optional> </element> </optional> </element> diff --git a/src/conf/domain_conf.c b/src/conf/domain_conf.c index 1cdc7971fca6..9bae30152c0f 100644 --- a/src/conf/domain_conf.c +++ b/src/conf/domain_conf.c @@ -16814,6 +16814,15 @@ virDomainIOMMUDefParseXML(xmlNodePtr node, } iommu->eim = val; } + + VIR_FREE(tmp); + if ((tmp = virXMLPropString(driver, "aw_bits"))) { + if (virStrToLong_ui(tmp, NULL, 10, &iommu->aw_bits) < 0) { + virReportError(VIR_ERR_XML_ERROR, _("unknown aw_bits value: %s"), tmp); + return NULL; + } + } + } return g_steal_pointer(&iommu); @@ -23891,6 +23900,14 @@ virDomainIOMMUDefCheckABIStability(virDomainIOMMUDefPtr src, virTristateSwitchTypeToString(src->iotlb)); return false; } + if (src->aw_bits != dst->aw_bits) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, + _("Target domain IOMMU device aw_bits value '%d' " + "does not match source '%d'"), + dst->aw_bits, src->aw_bits); + return false; + } + return true; } @@ -28886,6 +28903,10 @@ virDomainIOMMUDefFormat(virBufferPtr buf, virBufferAsprintf(&driverAttrBuf, " iotlb='%s'", virTristateSwitchTypeToString(iommu->iotlb)); } + if (iommu->aw_bits > 0) { + virBufferAsprintf(&driverAttrBuf, " aw_bits='%d'", + iommu->aw_bits); + } virXMLFormatElement(&childBuf, "driver", &driverAttrBuf, NULL); diff --git a/src/conf/domain_conf.h b/src/conf/domain_conf.h index e152c599cac3..53c941364122 100644 --- a/src/conf/domain_conf.h +++ b/src/conf/domain_conf.h @@ -2454,6 +2454,7 @@ struct _virDomainIOMMUDef { virTristateSwitch caching_mode; virTristateSwitch eim; virTristateSwitch iotlb; + unsigned int aw_bits; }; typedef enum { diff --git a/tests/qemuxml2argvdata/intel-iommu-aw-bits.xml b/tests/qemuxml2argvdata/intel-iommu-aw-bits.xml new file mode 100644 index 000000000000..23e3ef581677 --- /dev/null +++ b/tests/qemuxml2argvdata/intel-iommu-aw-bits.xml @@ -0,0 +1,35 @@ +<domain type='kvm'> + <name>QEMUGuest1</name> + <uuid>c7a5fdbd-edaf-9455-926a-d65c16db1809</uuid> + <memory unit='KiB'>219100</memory> + <currentMemory unit='KiB'>219100</currentMemory> + <vcpu placement='static'>1</vcpu> + <os> + <type arch='x86_64' machine='q35'>hvm</type> + <boot dev='hd'/> + </os> + <features> + <ioapic driver='qemu'/> + </features> + <cpu mode='custom' match='exact' check='none'> + <model fallback='forbid'>qemu64</model> + </cpu> + <clock offset='utc'/> + <on_poweroff>destroy</on_poweroff> + <on_reboot>restart</on_reboot> + <on_crash>destroy</on_crash> + <devices> + <emulator>/usr/bin/qemu-system-x86_64</emulator> + <controller type='pci' index='0' model='pcie-root'/> + <controller type='usb' index='0' model='none'/> + <controller type='sata' index='0'> + <address type='pci' domain='0x0000' bus='0x00' slot='0x1f' function='0x2'/> + </controller> + <input type='mouse' bus='ps2'/> + <input type='keyboard' bus='ps2'/> + <memballoon model='none'/> + <iommu model='intel'> + <driver intremap='on' aw_bits='48'/> + </iommu> + </devices> +</domain> diff --git a/tests/qemuxml2xmloutdata/intel-iommu-aw-bits.x86_64-latest.xml b/tests/qemuxml2xmloutdata/intel-iommu-aw-bits.x86_64-latest.xml new file mode 120000 index 000000000000..dbd1dfd97a66 --- /dev/null +++ b/tests/qemuxml2xmloutdata/intel-iommu-aw-bits.x86_64-latest.xml @@ -0,0 +1 @@ +../qemuxml2argvdata/intel-iommu-aw-bits.xml \ No newline at end of file diff --git a/tests/qemuxml2xmltest.c b/tests/qemuxml2xmltest.c index dcc7b29ded3e..81d5669293b1 100644 --- a/tests/qemuxml2xmltest.c +++ b/tests/qemuxml2xmltest.c @@ -1336,6 +1336,7 @@ mymain(void) DO_TEST_CAPS_LATEST("intel-iommu-caching-mode"); DO_TEST_CAPS_LATEST("intel-iommu-eim"); DO_TEST_CAPS_LATEST("intel-iommu-device-iotlb"); + DO_TEST_CAPS_LATEST("intel-iommu-aw-bits"); DO_TEST_CAPS_ARCH_LATEST("iommu-smmuv3", "aarch64"); DO_TEST("cpu-check-none", NONE); -- 2.26.2

Format the address width attribute. Depending on the version of QEMU it is named 'aw-bits' or 'x-aw-bits'. Signed-off-by: Menno Lageman <menno.lageman(a)oracle.com&gt; --- src/qemu/qemu_capabilities.c | 6 ++++ src/qemu/qemu_capabilities.h | 4 +++ src/qemu/qemu_command.c | 6 ++++ src/qemu/qemu_validate.c | 9 ++++- .../caps_2.12.0.x86_64.xml | 1 + .../caps_3.0.0.x86_64.xml | 1 + .../caps_3.1.0.x86_64.xml | 1 + .../caps_4.0.0.x86_64.xml | 1 + .../caps_4.1.0.x86_64.xml | 1 + .../caps_4.2.0.x86_64.xml | 1 + .../caps_5.0.0.x86_64.xml | 1 + .../caps_5.1.0.x86_64.xml | 1 + .../intel-iommu-aw-bits.x86_64-latest.args | 33 +++++++++++++++++++ tests/qemuxml2argvtest.c | 1 + 14 files changed, 66 insertions(+), 1 deletion(-) create mode 100644 tests/qemuxml2argvdata/intel-iommu-aw-bits.x86_64-latest.args diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c index f12769635a86..fa305bf67f33 100644 --- a/src/qemu/qemu_capabilities.c +++ b/src/qemu/qemu_capabilities.c @@ -582,6 +582,10 @@ VIR_ENUM_IMPL(virQEMUCaps, "tcg", "virtio-blk-pci.scsi.default.disabled", "pvscsi", + + /* 370 */ + "intel-iommu.x-aw-bits", + "intel-iommu.aw-bits", ); @@ -1469,6 +1473,8 @@ static struct virQEMUCapsDevicePropsFlags virQEMUCapsDevicePropsIntelIOMMU[] = { { "caching-mode", QEMU_CAPS_INTEL_IOMMU_CACHING_MODE, NULL }, { "eim", QEMU_CAPS_INTEL_IOMMU_EIM, NULL }, { "device-iotlb", QEMU_CAPS_INTEL_IOMMU_DEVICE_IOTLB, NULL }, + { "x-aw-bits", QEMU_CAPS_INTEL_IOMMU_X_AW_BITS, NULL }, + { "aw-bits", QEMU_CAPS_INTEL_IOMMU_AW_BITS, NULL }, }; static struct virQEMUCapsDevicePropsFlags virQEMUCapsObjectPropsVirtualCSSBridge[] = { diff --git a/src/qemu/qemu_capabilities.h b/src/qemu/qemu_capabilities.h index 076ecad0f73b..c14561a4e70c 100644 --- a/src/qemu/qemu_capabilities.h +++ b/src/qemu/qemu_capabilities.h @@ -564,6 +564,10 @@ typedef enum { /* virQEMUCapsFlags grouping marker for syntax-check */ QEMU_CAPS_VIRTIO_BLK_SCSI_DEFAULT_DISABLED, /* virtio-blk-pci.scsi disabled by default */ QEMU_CAPS_SCSI_PVSCSI, /* -device pvscsi */ + /* 370 */ + QEMU_CAPS_INTEL_IOMMU_X_AW_BITS, /* intel-iommu.x-aw-bits */ + QEMU_CAPS_INTEL_IOMMU_AW_BITS, /* intel-iommu.aw-bits */ + QEMU_CAPS_LAST /* this must always be the last item */ } virQEMUCapsFlags; diff --git a/src/qemu/qemu_command.c b/src/qemu/qemu_command.c index 419eca5675cc..adcb48a66f18 100644 --- a/src/qemu/qemu_command.c +++ b/src/qemu/qemu_command.c @@ -6157,6 +6157,12 @@ qemuBuildIOMMUCommandLine(virCommandPtr cmd, virBufferAsprintf(&opts, ",device-iotlb=%s", virTristateSwitchTypeToString(iommu->iotlb)); } + if (iommu->aw_bits > 0) { + if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_INTEL_IOMMU_AW_BITS)) + virBufferAsprintf(&opts, ",aw-bits=%d", iommu->aw_bits); + else if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_INTEL_IOMMU_X_AW_BITS)) + virBufferAsprintf(&opts, ",x-aw-bits=%d", iommu->aw_bits); + } virCommandAddArg(cmd, "-device"); virCommandAddArgBuffer(cmd, &opts); diff --git a/src/qemu/qemu_validate.c b/src/qemu/qemu_validate.c index 584d1375b857..c7bcb77013b5 100644 --- a/src/qemu/qemu_validate.c +++ b/src/qemu/qemu_validate.c @@ -3858,7 +3858,14 @@ qemuValidateDomainDeviceDefIOMMU(const virDomainIOMMUDef *iommu, "with this QEMU binary")); return -1; } - + if (iommu->aw_bits > 0 && + !(virQEMUCapsGet(qemuCaps, QEMU_CAPS_INTEL_IOMMU_X_AW_BITS) || + virQEMUCapsGet(qemuCaps, QEMU_CAPS_INTEL_IOMMU_AW_BITS))) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s", + _("iommu: aw_bits is not supported " + "with this QEMU binary")); + return -1; + } return 0; } diff --git a/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml index 319dd6f2c3a5..9b632f025956 100644 --- a/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml @@ -200,6 +200,7 @@ <flag name='i8042'/> <flag name='tcg'/> <flag name='pvscsi'/> + <flag name='intel-iommu.x-aw-bits'/> <version>2011090</version> <kvmVersion>0</kvmVersion> <microcodeVersion>43100289</microcodeVersion> diff --git a/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml index 40cff641a89a..babbb5c0eec5 100644 --- a/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml @@ -206,6 +206,7 @@ <flag name='storage.werror'/> <flag name='tcg'/> <flag name='pvscsi'/> + <flag name='intel-iommu.x-aw-bits'/> <version>3000000</version> <kvmVersion>0</kvmVersion> <microcodeVersion>43100239</microcodeVersion> diff --git a/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml index 3dbda4b3f30c..73f8927a1e9d 100644 --- a/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml @@ -209,6 +209,7 @@ <flag name='storage.werror'/> <flag name='tcg'/> <flag name='pvscsi'/> + <flag name='intel-iommu.x-aw-bits'/> <version>3000092</version> <kvmVersion>0</kvmVersion> <microcodeVersion>43100240</microcodeVersion> diff --git a/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml index bf7735caf340..bae15e771da9 100644 --- a/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml @@ -214,6 +214,7 @@ <flag name='storage.werror'/> <flag name='tcg'/> <flag name='pvscsi'/> + <flag name='intel-iommu.aw-bits'/> <version>4000000</version> <kvmVersion>0</kvmVersion> <microcodeVersion>43100240</microcodeVersion> diff --git a/tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml index 8ce0f80e8a2c..e17ae7ffb04c 100644 --- a/tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml @@ -220,6 +220,7 @@ <flag name='storage.werror'/> <flag name='tcg'/> <flag name='pvscsi'/> + <flag name='intel-iommu.aw-bits'/> <version>4001000</version> <kvmVersion>0</kvmVersion> <microcodeVersion>43100241</microcodeVersion> diff --git a/tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml index 50ed35f092b3..e0685887e10a 100644 --- a/tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml @@ -228,6 +228,7 @@ <flag name='virtio.packed'/> <flag name='tcg'/> <flag name='pvscsi'/> + <flag name='intel-iommu.aw-bits'/> <version>4002000</version> <kvmVersion>0</kvmVersion> <microcodeVersion>43100242</microcodeVersion> diff --git a/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml index ba39fef7135d..538c8a8c8bcd 100644 --- a/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml @@ -234,6 +234,7 @@ <flag name='tcg'/> <flag name='virtio-blk-pci.scsi.default.disabled'/> <flag name='pvscsi'/> + <flag name='intel-iommu.aw-bits'/> <version>5000000</version> <kvmVersion>0</kvmVersion> <microcodeVersion>43100241</microcodeVersion> diff --git a/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml index c2bc121f737c..2380618fed6f 100644 --- a/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml +++ b/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml @@ -234,6 +234,7 @@ <flag name='tcg'/> <flag name='virtio-blk-pci.scsi.default.disabled'/> <flag name='pvscsi'/> + <flag name='intel-iommu.aw-bits'/> <version>5000050</version> <kvmVersion>0</kvmVersion> <microcodeVersion>43100242</microcodeVersion> diff --git a/tests/qemuxml2argvdata/intel-iommu-aw-bits.x86_64-latest.args b/tests/qemuxml2argvdata/intel-iommu-aw-bits.x86_64-latest.args new file mode 100644 index 000000000000..0ce0952b5152 --- /dev/null +++ b/tests/qemuxml2argvdata/intel-iommu-aw-bits.x86_64-latest.args @@ -0,0 +1,33 @@ +LC_ALL=C \ +PATH=/bin \ +HOME=/tmp/lib/domain--1-QEMUGuest1 \ +USER=test \ +LOGNAME=test \ +XDG_DATA_HOME=/tmp/lib/domain--1-QEMUGuest1/.local/share \ +XDG_CACHE_HOME=/tmp/lib/domain--1-QEMUGuest1/.cache \ +XDG_CONFIG_HOME=/tmp/lib/domain--1-QEMUGuest1/.config \ +QEMU_AUDIO_DRV=none \ +/usr/bin/qemu-system-x86_64 \ +-name guest=QEMUGuest1,debug-threads=on \ +-S \ +-object secret,id=masterKey0,format=raw,\ +file=/tmp/lib/domain--1-QEMUGuest1/master-key.aes \ +-machine q35,accel=kvm,usb=off,dump-guest-core=off,kernel_irqchip=split \ +-cpu qemu64 \ +-m 214 \ +-overcommit mem-lock=off \ +-smp 1,sockets=1,cores=1,threads=1 \ +-uuid c7a5fdbd-edaf-9455-926a-d65c16db1809 \ +-display none \ +-no-user-config \ +-nodefaults \ +-chardev socket,id=charmonitor,fd=1729,server,nowait \ +-mon chardev=charmonitor,id=monitor,mode=control \ +-rtc base=utc \ +-no-shutdown \ +-no-acpi \ +-boot strict=on \ +-device intel-iommu,intremap=on,aw-bits=48 \ +-sandbox on,obsolete=deny,elevateprivileges=deny,spawn=deny,\ +resourcecontrol=deny \ +-msg timestamp=on diff --git a/tests/qemuxml2argvtest.c b/tests/qemuxml2argvtest.c index 3103cac884d7..c5eda14b3bf9 100644 --- a/tests/qemuxml2argvtest.c +++ b/tests/qemuxml2argvtest.c @@ -3122,6 +3122,7 @@ mymain(void) DO_TEST_CAPS_LATEST("intel-iommu-caching-mode"); DO_TEST_CAPS_LATEST("intel-iommu-eim"); DO_TEST_CAPS_LATEST("intel-iommu-device-iotlb"); + DO_TEST_CAPS_LATEST("intel-iommu-aw-bits"); DO_TEST_CAPS_LATEST_PARSE_ERROR("intel-iommu-wrong-machine"); DO_TEST_CAPS_ARCH_LATEST("iommu-smmuv3", "aarch64"); -- 2.26.2

On 04/06/2020 10:38, Peter Krempa wrote: Ok, I'll remove x-aw-bits in v2. Is this 'we don't want to expose experimental stuff' documented somewhere I should have read? Thanks, Menno

On 04/06/2020 11:43, Peter Krempa wrote: Cool, it's simple enough I'd say. Let me know in case you do want a v2 from me.