[PATCH V2 2/3] qemu: Change default machine type for RISC-V

It's quite difficult, if not impossible, to create a working RISC-V VMs using the current default machine type of 'spike_v1.10'. Change the default to the more appropriate and virtualization friendly 'virt' machine type. Signed-off-by: Jim Fehlig <jfehlig(a)suse.com&gt; --- src/qemu/qemu_capabilities.c | 4 ++-- tests/qemucapabilitiesdata/caps_5.0.0_riscv64.xml | 2 +- tests/qemucapabilitiesdata/caps_5.2.0_riscv64.xml | 2 +- tests/qemucapabilitiesdata/caps_8.0.0_riscv64.xml | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c index 3af88010dc..cf85d42198 100644 --- a/src/qemu/qemu_capabilities.c +++ b/src/qemu/qemu_capabilities.c @@ -2714,8 +2714,8 @@ static const char *preferredMachines[] = "pseries", /* VIR_ARCH_PPC64LE */ "bamboo", /* VIR_ARCH_PPCEMB */ - "spike_v1.10", /* VIR_ARCH_RISCV32 */ - "spike_v1.10", /* VIR_ARCH_RISCV64 */ + "virt", /* VIR_ARCH_RISCV32 */ + "virt", /* VIR_ARCH_RISCV64 */ NULL, /* VIR_ARCH_S390 (no QEMU impl) */ "s390-ccw-virtio", /* VIR_ARCH_S390X */ "shix", /* VIR_ARCH_SH4 */ diff --git a/tests/qemucapabilitiesdata/caps_5.0.0_riscv64.xml b/tests/qemucapabilitiesdata/caps_5.0.0_riscv64.xml index fb460c9300..09a71875ef 100644 --- a/tests/qemucapabilitiesdata/caps_5.0.0_riscv64.xml +++ b/tests/qemucapabilitiesdata/caps_5.0.0_riscv64.xml @@ -122,8 +122,8 @@ <microcodeVersion>0</microcodeVersion> <package>v5.0.0</package> <arch>riscv64</arch> - <machine type='tcg' name='spike_v1.10' maxCpus='1'/> <machine type='tcg' name='virt' maxCpus='8' defaultCPU='rv64-riscv-cpu'/> + <machine type='tcg' name='spike_v1.10' maxCpus='1'/> <machine type='tcg' name='spike' maxCpus='1' default='yes' defaultCPU='rv64gcsu-v1.10.0-riscv-cpu'/> <machine type='tcg' name='sifive_e' maxCpus='1'/> <machine type='tcg' name='sifive_u' maxCpus='5'/> diff --git a/tests/qemucapabilitiesdata/caps_5.2.0_riscv64.xml b/tests/qemucapabilitiesdata/caps_5.2.0_riscv64.xml index fe4757a12e..4d03004fa1 100644 --- a/tests/qemucapabilitiesdata/caps_5.2.0_riscv64.xml +++ b/tests/qemucapabilitiesdata/caps_5.2.0_riscv64.xml @@ -127,8 +127,8 @@ <microcodeVersion>0</microcodeVersion> <package>v5.2.0</package> <arch>riscv64</arch> - <machine type='tcg' name='spike' maxCpus='8' default='yes' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes'/> <machine type='tcg' name='virt' maxCpus='8' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes'/> + <machine type='tcg' name='spike' maxCpus='8' default='yes' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes'/> <machine type='tcg' name='sifive_e' maxCpus='1' defaultCPU='sifive-e51-riscv-cpu'/> <machine type='tcg' name='sifive_u' maxCpus='5' defaultCPU='sifive-u54-riscv-cpu'/> <machine type='tcg' name='microchip-icicle-kit' maxCpus='5'/> diff --git a/tests/qemucapabilitiesdata/caps_8.0.0_riscv64.xml b/tests/qemucapabilitiesdata/caps_8.0.0_riscv64.xml index 361c5fb811..4c5e72ba56 100644 --- a/tests/qemucapabilitiesdata/caps_8.0.0_riscv64.xml +++ b/tests/qemucapabilitiesdata/caps_8.0.0_riscv64.xml @@ -147,11 +147,11 @@ <microcodeVersion>0</microcodeVersion> <package>v7.2.0-333-g222059a0fc</package> <arch>riscv64</arch> - <machine type='tcg' name='spike' maxCpus='8' default='yes' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes' defaultRAMid='riscv.spike.ram'/> + <machine type='tcg' name='virt' maxCpus='512' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes' defaultRAMid='riscv_virt_board.ram'/> <machine type='tcg' name='x-remote' maxCpus='1'/> + <machine type='tcg' name='spike' maxCpus='8' default='yes' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes' defaultRAMid='riscv.spike.ram'/> <machine type='tcg' name='microchip-icicle-kit' maxCpus='5' defaultRAMid='microchip.icicle.kit.ram'/> <machine type='tcg' name='sifive_u' maxCpus='5' defaultCPU='sifive-u54-riscv-cpu' defaultRAMid='riscv.sifive.u.ram'/> <machine type='tcg' name='shakti_c' maxCpus='1' defaultCPU='shakti-c-riscv-cpu' defaultRAMid='riscv.shakti.c.ram'/> <machine type='tcg' name='sifive_e' maxCpus='1' defaultCPU='sifive-e51-riscv-cpu' defaultRAMid='riscv.sifive.e.ram'/> - <machine type='tcg' name='virt' maxCpus='512' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes' defaultRAMid='riscv_virt_board.ram'/> </qemuCaps> -- 2.40.0